From 2c7c5b8951f131bd33d4eb58325d2e36b7a90525 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E6=9D=8E=E7=BF=94?= Date: Sun, 2 Apr 2023 13:06:09 +0000 Subject: [PATCH] =?UTF-8?q?=E8=A7=A3=E5=86=B3drv=5Fgpio.c=E6=96=87?= =?UTF-8?q?=E4=BB=B6=E4=B8=AD=E5=8F=82=E6=95=B0=E7=B1=BB=E5=9E=8B=E4=B8=8D?= =?UTF-8?q?=E5=8C=B9=E9=85=8D=E7=9A=84=E9=97=AE=E9=A2=98?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: 李翔 --- bsp/at32/libraries/rt_drivers/drv_gpio.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/bsp/at32/libraries/rt_drivers/drv_gpio.c b/bsp/at32/libraries/rt_drivers/drv_gpio.c index 0a52fac706..4d71064962 100644 --- a/bsp/at32/libraries/rt_drivers/drv_gpio.c +++ b/bsp/at32/libraries/rt_drivers/drv_gpio.c @@ -163,7 +163,7 @@ static rt_base_t at32_pin_get(const char *name) return pin; } -static void at32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) +static void at32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value) { gpio_type *gpio_port; @@ -180,7 +180,7 @@ static void at32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) gpio_bits_write(gpio_port, gpio_pin, (confirm_state)value); } -static int at32_pin_read(rt_device_t dev, rt_base_t pin) +static rt_int8_t at32_pin_read(rt_device_t dev, rt_base_t pin) { gpio_type *gpio_port; uint16_t gpio_pin; @@ -197,7 +197,7 @@ static int at32_pin_read(rt_device_t dev, rt_base_t pin) return value; } -static void at32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) +static void at32_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode) { gpio_init_type gpio_init_struct; gpio_type *gpio_port; @@ -279,8 +279,8 @@ rt_inline const struct pin_irq_map *get_pin_irq_map(uint32_t pinbit) return &pin_irq_map[mapindex]; }; -static rt_err_t at32_pin_attach_irq(struct rt_device *device, rt_int32_t pin, - rt_uint32_t mode, void (*hdr)(void *args), void *args) +static rt_err_t at32_pin_attach_irq(struct rt_device *device, rt_base_t pin, + rt_uint8_t mode, void (*hdr)(void *args), void *args) { uint16_t gpio_pin; rt_base_t level; @@ -324,7 +324,7 @@ static rt_err_t at32_pin_attach_irq(struct rt_device *device, rt_int32_t pin, return RT_EOK; } -static rt_err_t at32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) +static rt_err_t at32_pin_dettach_irq(struct rt_device *device, rt_base_t pin) { uint16_t gpio_pin; rt_base_t level; @@ -359,8 +359,8 @@ static rt_err_t at32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) return RT_EOK; } -static rt_err_t at32_pin_irq_enable(struct rt_device *device, rt_base_t pin, - rt_uint32_t enabled) +static rt_err_t at32_pin_irq_enable(struct rt_device *device, rt_uint8_t pin, + rt_uint8_t enabled) { gpio_init_type gpio_init_struct; exint_init_type exint_init_struct; -- Gitee