From b5d68e8b8463d3fb1683a6f3cc8237fd04f5b2f2 Mon Sep 17 00:00:00 2001 From: wangxiaoyao Date: Tue, 15 Nov 2022 18:43:39 +0800 Subject: [PATCH 1/2] =?UTF-8?q?[fix]=20=E4=BF=AE=E5=A4=8D=20rt=5Fhw=5Fffz?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- components/lwp/arch/arm/cortex-a/lwp_arch.h | 2 +- components/lwp/arch/risc-v/rv64/lwp_arch.h | 2 +- components/lwp/arch/x86/i386/lwp_arch.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/components/lwp/arch/arm/cortex-a/lwp_arch.h b/components/lwp/arch/arm/cortex-a/lwp_arch.h index 4980121dd9..6132ce46d9 100644 --- a/components/lwp/arch/arm/cortex-a/lwp_arch.h +++ b/components/lwp/arch/arm/cortex-a/lwp_arch.h @@ -30,7 +30,7 @@ extern "C" { rt_inline unsigned long rt_hw_ffz(unsigned long x) { - return __builtin_ffs(~x) - 1; + return __builtin_ffsll(~x) - 1; } rt_inline void icache_invalid_all(void) diff --git a/components/lwp/arch/risc-v/rv64/lwp_arch.h b/components/lwp/arch/risc-v/rv64/lwp_arch.h index 3e8653a0c3..cb7d883135 100644 --- a/components/lwp/arch/risc-v/rv64/lwp_arch.h +++ b/components/lwp/arch/risc-v/rv64/lwp_arch.h @@ -53,7 +53,7 @@ rt_mmu_info* arch_kernel_get_mmu_info(void); rt_inline unsigned long rt_hw_ffz(unsigned long x) { - return __builtin_ffs(~x) - 1; + return __builtin_ffsll(~x) - 1; } rt_inline void icache_invalid_all(void) diff --git a/components/lwp/arch/x86/i386/lwp_arch.h b/components/lwp/arch/x86/i386/lwp_arch.h index d8820eec8b..6d15aebcd1 100644 --- a/components/lwp/arch/x86/i386/lwp_arch.h +++ b/components/lwp/arch/x86/i386/lwp_arch.h @@ -37,7 +37,7 @@ void lwp_signal_do_return(rt_hw_stack_frame_t *frame); rt_inline unsigned long rt_hw_ffz(unsigned long x) { - return __builtin_ffs(~x) - 1; + return __builtin_ffsll(~x) - 1; } #ifdef __cplusplus -- Gitee From 237fd82e569ce4ed8ef545130b39f83f8ec58881 Mon Sep 17 00:00:00 2001 From: wangxiaoyao Date: Tue, 15 Nov 2022 18:44:31 +0800 Subject: [PATCH 2/2] [bsp/qemu-virt64-riscv] update readme --- bsp/qemu-virt64-riscv/README.md | 2 ++ bsp/qemu-virt64-riscv/README_ch.md | 28 ++++++++++++++++++++++++++++ 2 files changed, 30 insertions(+) create mode 100644 bsp/qemu-virt64-riscv/README_ch.md diff --git a/bsp/qemu-virt64-riscv/README.md b/bsp/qemu-virt64-riscv/README.md index 929c8946fe..97de017d9f 100644 --- a/bsp/qemu-virt64-riscv/README.md +++ b/bsp/qemu-virt64-riscv/README.md @@ -1,5 +1,7 @@ # RT-Smart QEMU SYSTEM RISC-V RV64 BSP +English | [中文](./README_ch.md) + ## 1. Introduction QEMU can emulate both 32-bit and 64-bit RISC-V CPUs. Use the qemu-system-riscv64 executable to simulate a 64-bit RISC-V machine, qemu-system-riscv32 executable to simulate a 32-bit RISC-V machine. diff --git a/bsp/qemu-virt64-riscv/README_ch.md b/bsp/qemu-virt64-riscv/README_ch.md new file mode 100644 index 0000000000..c9ef9f490c --- /dev/null +++ b/bsp/qemu-virt64-riscv/README_ch.md @@ -0,0 +1,28 @@ +# RT-Smart QEMU SYSTEM RISC-V RV64 BSP + +中文 | [English](./README.md) + +## 1. 简介 + +本工程是在QEMU System RISC-V 64 模拟器运行，针对 virt 机器的BSP + +## 2. 构建 + +1. 获取 [rt-smart SDK](http://117.143.63.254:9012/www/rt-smart/) risc-v 64版本. +1. 设置 `RTT_EXEC_PATH` 工具链的 bin 文件夹路径, 如 `/home/user/xxx/yyy/bin` +1. 设置 `RTT_CC_PREFIX` 为工具链前缀, 如 `riscv64-unknown-linux-musl-` +1. 设置 `RTT_CC` 为工具链名称, 如 `gcc` +1. 通过指令 `riscv64-unknown-linux-musl-gcc -v` 查看工具链的 -march 与 -mabi +1. 根据相关信息调整本目录下的 `rtconfig.py:40` 如 `DEVICE = ' -mcmodel=medany -march=rv64imac -mabi=lp64 '` +1. `scons --menuconfig` + * 如果 `-march` 包含 `v`, 选择 `Using RISC-V Vector Extension`, 反之关闭 + * 如果 `-march` 包含 `f/d`, 选择 `Enable FPU`, 反之关闭 +1. `scons` + +## 3. 运行 + +推荐拉取最新的 qemu 发行版在本地构建。使用指令确保qemu可用 `qemu-system-riscv64 --version`。 + +使用 `qemu-nographic.sh`/`qemu-nographic.bat` 启动虚拟机。 + +> if your -march contains characters v, using qemu-v-nographic.* -- Gitee