From b4aa0b6cf444c6156a8647805ff6d8a219178363 Mon Sep 17 00:00:00 2001 From: shaojinchun Date: Tue, 13 Jul 2021 16:14:49 +0800 Subject: [PATCH] =?UTF-8?q?=E4=BF=AE=E6=AD=A3arm=20cortex-a=E5=9C=A8?= =?UTF-8?q?=E4=B8=8D=E5=90=AF=E7=94=A8smart=E7=94=A8=E6=88=B7=E6=80=81?= =?UTF-8?q?=E6=97=B6=E7=BC=96=E8=AF=91=E5=87=BA=E9=94=99=E7=9A=84=E9=97=AE?= =?UTF-8?q?=E9=A2=98?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- libcpu/arm/cortex-a/context_gcc.S | 20 ++++++++++++++++---- libcpu/arm/cortex-a/mmu.c | 2 ++ libcpu/arm/cortex-a/start_gcc.S | 2 +- 3 files changed, 19 insertions(+), 5 deletions(-) diff --git a/libcpu/arm/cortex-a/context_gcc.S b/libcpu/arm/cortex-a/context_gcc.S index 4ee0594bdf..38008facdc 100644 --- a/libcpu/arm/cortex-a/context_gcc.S +++ b/libcpu/arm/cortex-a/context_gcc.S @@ -45,16 +45,18 @@ rt_hw_context_switch_to: #ifdef RT_USING_SMP mov r0, r1 bl rt_cpus_lock_status_restore +#ifdef RT_USING_USERSPACE bl rt_thread_self bl lwp_user_setting_restore +#endif #else - bl rt_thread_self #ifdef RT_USING_USERSPACE + bl rt_thread_self mov r4, r0 bl lwp_mmu_switch mov r0, r4 -#endif bl lwp_user_setting_restore +#endif #endif /*RT_USING_SMP*/ b rt_hw_context_switch_exit @@ -106,16 +108,18 @@ rt_hw_context_switch: #ifdef RT_USING_SMP mov r0, r2 bl rt_cpus_lock_status_restore +#ifdef RT_USING_USERSPACE bl rt_thread_self bl lwp_user_setting_restore +#endif #else - bl rt_thread_self #ifdef RT_USING_USERSPACE + bl rt_thread_self mov r4, r0 bl lwp_mmu_switch mov r0, r4 -#endif bl lwp_user_setting_restore +#endif #endif /*RT_USING_SMP*/ b rt_hw_context_switch_exit @@ -147,18 +151,24 @@ rt_hw_context_switch_interrupt: */ #ifdef RT_USING_LWP push {r0 - r3, lr} +#ifdef RT_USING_USERSPACE bl rt_thread_self bl lwp_user_setting_save +#endif pop {r0 - r3, lr} #endif str r0, [r1] ldr sp, [r2] mov r0, r3 +#ifdef RT_USING_USERSPACE mov r4, r0 +#endif bl rt_cpus_lock_status_restore +#ifdef RT_USING_USERSPACE mov r0, r4 bl lwp_user_setting_restore +#endif b rt_hw_context_switch_exit #else /*RT_USING_SMP*/ @@ -177,10 +187,12 @@ rt_hw_context_switch_interrupt: str r0, [r3] mov r3, #1 @ set rt_thread_switch_interrupt_flag to 1 str r3, [ip] +#ifdef RT_USING_USERSPACE push {r1, lr} mov r0, r2 bl lwp_user_setting_save pop {r1, lr} +#endif _reswitch: ldr ip, =rt_interrupt_to_thread @ set rt_interrupt_to_thread str r1, [ip] diff --git a/libcpu/arm/cortex-a/mmu.c b/libcpu/arm/cortex-a/mmu.c index af5392d35b..ea2cadae6f 100644 --- a/libcpu/arm/cortex-a/mmu.c +++ b/libcpu/arm/cortex-a/mmu.c @@ -506,7 +506,9 @@ static int __rt_hw_mmu_map(rt_mmu_info *mmu_info, void* v_addr, void* p_addr, si if (*mmu_l1 & ARCH_MMU_USED_MASK) { mmu_l2 = (size_t *)((*mmu_l1 & ~ARCH_PAGE_TBL_MASK) - mmu_info->pv_off); +#ifdef RT_USING_USERSPACE rt_page_ref_inc(mmu_l2, 0); +#endif } else { diff --git a/libcpu/arm/cortex-a/start_gcc.S b/libcpu/arm/cortex-a/start_gcc.S index 703b34a8ae..32e1065d19 100644 --- a/libcpu/arm/cortex-a/start_gcc.S +++ b/libcpu/arm/cortex-a/start_gcc.S @@ -480,8 +480,8 @@ rt_hw_context_switch_interrupt_do: mov r4, r0 bl lwp_mmu_switch mov r0, r4 -#endif bl lwp_user_setting_restore +#endif #ifdef RT_USING_FPU /* fpu context */ -- Gitee