From 1b6b4bcb7db022a663f1e0edb463f4e735362a6e Mon Sep 17 00:00:00 2001 From: BernardXiong Date: Thu, 8 Apr 2021 12:16:19 +0800 Subject: [PATCH] [BSP] Add interrupt disable protection for ETH driver --- bsp/raspberry-pi/raspi4-32/.config | 14 ++--- bsp/raspberry-pi/raspi4-32/driver/board.c | 4 +- bsp/raspberry-pi/raspi4-32/driver/drv_eth.c | 58 +++++++++------------ bsp/raspberry-pi/raspi4-32/driver/raspi4.h | 19 +++---- bsp/raspberry-pi/raspi4-32/rtconfig.h | 11 ++-- 5 files changed, 48 insertions(+), 58 deletions(-) diff --git a/bsp/raspberry-pi/raspi4-32/.config b/bsp/raspberry-pi/raspi4-32/.config index 92eeab9364..748d809aec 100644 --- a/bsp/raspberry-pi/raspi4-32/.config +++ b/bsp/raspberry-pi/raspi4-32/.config @@ -244,9 +244,9 @@ CONFIG_NETDEV_USING_IFCONFIG=y CONFIG_NETDEV_USING_PING=y CONFIG_NETDEV_USING_NETSTAT=y CONFIG_NETDEV_USING_AUTO_DEFAULT=y -# CONFIG_NETDEV_USING_IPV6 is not set +CONFIG_NETDEV_USING_IPV6=y CONFIG_NETDEV_IPV4=1 -CONFIG_NETDEV_IPV6=0 +CONFIG_NETDEV_IPV6=1 # CONFIG_NETDEV_IPV6_SCOPES is not set # @@ -256,7 +256,7 @@ CONFIG_RT_USING_LWIP=y # CONFIG_RT_USING_LWIP141 is not set CONFIG_RT_USING_LWIP202=y # CONFIG_RT_USING_LWIP212 is not set -# CONFIG_RT_USING_LWIP_IPV6 is not set +CONFIG_RT_USING_LWIP_IPV6=y CONFIG_RT_LWIP_MEM_ALIGNMENT=4 CONFIG_RT_LWIP_IGMP=y CONFIG_RT_LWIP_ICMP=y @@ -276,11 +276,11 @@ CONFIG_RT_LWIP_UDP=y CONFIG_RT_LWIP_TCP=y CONFIG_RT_LWIP_RAW=y # CONFIG_RT_LWIP_PPP is not set -CONFIG_RT_MEMP_NUM_NETCONN=8 +CONFIG_RT_MEMP_NUM_NETCONN=16 CONFIG_RT_LWIP_PBUF_NUM=16 CONFIG_RT_LWIP_RAW_PCB_NUM=4 -CONFIG_RT_LWIP_UDP_PCB_NUM=4 -CONFIG_RT_LWIP_TCP_PCB_NUM=4 +CONFIG_RT_LWIP_UDP_PCB_NUM=8 +CONFIG_RT_LWIP_TCP_PCB_NUM=8 CONFIG_RT_LWIP_TCP_SEG_NUM=40 CONFIG_RT_LWIP_TCP_SND_BUF=8196 CONFIG_RT_LWIP_TCP_WND=8196 @@ -292,7 +292,7 @@ CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=4096 CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12 CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=4096 CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8 -# CONFIG_RT_LWIP_REASSEMBLY_FRAG is not set +CONFIG_RT_LWIP_REASSEMBLY_FRAG=y CONFIG_LWIP_NETIF_STATUS_CALLBACK=1 CONFIG_LWIP_NETIF_LINK_CALLBACK=1 CONFIG_SO_REUSE=1 diff --git a/bsp/raspberry-pi/raspi4-32/driver/board.c b/bsp/raspberry-pi/raspi4-32/driver/board.c index a06cddb215..05f19adc3b 100644 --- a/bsp/raspberry-pi/raspi4-32/driver/board.c +++ b/bsp/raspberry-pi/raspi4-32/driver/board.c @@ -125,6 +125,8 @@ void rt_hw_board_init(void) rt_hw_mmu_map_init(&mmu_info, (void*)GPIO_BASE_ADDR, 0x10000000, MMUTable, 0); #endif + /* map peripheral address to virtual address */ + //gpio gpio_base_addr = (size_t)rt_hw_kernel_phys_to_virt((void*)GPIO_BASE_ADDR, 0x1000); //uart @@ -185,11 +187,9 @@ void rt_hw_board_init(void) #ifdef RT_USING_COMPONENTS_INIT rt_components_board_init(); #endif - } #ifdef RT_USING_GDBSERVER - #include #define GDB_CONNECT_DEVICE "/dev/uart4" diff --git a/bsp/raspberry-pi/raspi4-32/driver/drv_eth.c b/bsp/raspberry-pi/raspi4-32/driver/drv_eth.c index 20ae855b6c..12c7ee89e8 100644 --- a/bsp/raspberry-pi/raspi4-32/driver/drv_eth.c +++ b/bsp/raspberry-pi/raspi4-32/driver/drv_eth.c @@ -19,8 +19,6 @@ #include "raspi4.h" #include "drv_eth.h" -//#define ETH_RX_POLL - #define DBG_LEVEL DBG_LOG #include #define LOG_TAG "drv.eth" @@ -28,7 +26,7 @@ static int link_speed = 0; static int link_flag = 0; -#define RECV_CACHE_BUF (1024) +#define RECV_CACHE_BUF (2048) #define DMA_DISC_ADDR_SIZE (4 * 1024 *1024) #define RX_DESC_BASE (mac_reg_base_addr + GENET_RX_OFF) @@ -50,7 +48,8 @@ static rt_uint32_t tx_index = 0; static rt_uint32_t rx_index = 0; static rt_uint32_t index_flag = 0; -static rt_uint32_t send_cache_pbuf[RECV_CACHE_BUF]; +static rt_uint8_t send_cache_pbuf[RECV_CACHE_BUF]; +static rt_uint8_t recv_data[RX_BUF_LENGTH]; struct rt_eth_dev { @@ -61,7 +60,6 @@ struct rt_eth_dev int state; int index; struct rt_timer link_timer; - struct rt_timer rx_poll_timer; void *priv; }; static struct rt_eth_dev eth_dev; @@ -80,11 +78,13 @@ static inline void write32(void *addr, rt_uint32_t value) static void eth_rx_irq(int irq, void *param) { -#ifndef ETH_RX_POLL rt_uint32_t val = 0; + val = read32(mac_reg_base_addr + GENET_INTRL2_CPU_STAT); val &= ~read32(mac_reg_base_addr + GENET_INTRL2_CPU_STAT_MASK); + write32(mac_reg_base_addr + GENET_INTRL2_CPU_CLEAR, val); + if (val & GENET_IRQ_RXDMA_DONE) { eth_device_ready(ð_dev.parent); @@ -94,9 +94,6 @@ static void eth_rx_irq(int irq, void *param) { //todo } -#else - eth_device_ready(ð_dev.parent); -#endif } /* We only support RGMII (as used on the RPi4). */ @@ -109,6 +106,7 @@ static int bcmgenet_interface_set(void) case PHY_INTERFACE_MODE_RGMII_RXID: write32(mac_reg_base_addr + SYS_PORT_CTRL, PORT_MODE_EXT_GPHY); break; + default: rt_kprintf("unknown phy mode: %d\n", mac_reg_base_addr); return -1; @@ -127,16 +125,20 @@ static void bcmgenet_umac_reset(void) write32((mac_reg_base_addr + SYS_RBUF_FLUSH_CTRL), reg); DELAY_MICROS(10); + write32((mac_reg_base_addr + SYS_RBUF_FLUSH_CTRL), 0); DELAY_MICROS(10); + write32(mac_reg_base_addr + UMAC_CMD, 0); write32(mac_reg_base_addr + UMAC_CMD, (CMD_SW_RESET | CMD_LCL_LOOP_EN)); DELAY_MICROS(2); + write32(mac_reg_base_addr + UMAC_CMD, 0); /* clear tx/rx counter */ write32(mac_reg_base_addr + UMAC_MIB_CTRL, MIB_RESET_RX | MIB_RESET_TX | MIB_RESET_RUNT); write32(mac_reg_base_addr + UMAC_MIB_CTRL, 0); write32(mac_reg_base_addr + UMAC_MAX_FRAME_LEN, ENET_MAX_MTU_SIZE); + /* init rx registers, enable ip header optimization */ reg = read32(mac_reg_base_addr + RBUF_CTRL); reg |= RBUF_ALIGN_2B; @@ -213,7 +215,6 @@ static int bcmgenet_mdio_read(rt_uint32_t addr, rt_uint32_t reg) static int bcmgenet_gmac_write_hwaddr(void) { - //{0xdc,0xa6,0x32,0x28,0x22,0x50}; rt_uint8_t addr[6]; rt_uint32_t reg; bcm271x_mbox_hardware_get_mac_address(&addr[0]); @@ -248,10 +249,8 @@ static void bcmgenet_mdio_init(void) rt_uint32_t ret = 0; /*get ethernet uid*/ ret = get_ethernet_uid(); - if (ret == 0) - { - return; - } + if (ret == 0) return; + /* reset phy */ bcmgenet_mdio_write(1, BCM54213PE_MII_CONTROL, MII_CONTROL_PHY_RESET); /* read control reg */ @@ -405,11 +404,11 @@ static int bcmgenet_gmac_eth_start(void) /* Enable Rx/Tx */ rt_uint32_t rx_tx_en; rx_tx_en = read32(mac_reg_base_addr + UMAC_CMD); - rx_tx_en |= (CMD_TX_EN | CMD_RX_EN); write32(mac_reg_base_addr + UMAC_CMD, rx_tx_en); - //IRQ + + // eanble IRQ for TxDMA done and RxDMA done write32(mac_reg_base_addr + GENET_INTRL2_CPU_CLEAR_MASK, GENET_IRQ_TXDMA_DONE | GENET_IRQ_RXDMA_DONE); return 0; } @@ -467,6 +466,7 @@ static rt_uint32_t bcmgenet_gmac_eth_recv(rt_uint8_t **packetp) static int bcmgenet_gmac_eth_send(void *packet, int length) { + rt_ubase_t level; void *desc_base = (TX_DESC_BASE + tx_index * DMA_DESC_SIZE); rt_uint32_t len_stat = length << DMA_BUFLENGTH_SHIFT; @@ -482,7 +482,7 @@ static int bcmgenet_gmac_eth_send(void *packet, int length) write32((desc_base + DMA_DESC_ADDRESS_HI), 0); write32((desc_base + DMA_DESC_LENGTH_STATUS), len_stat); - tx_index = tx_index + 1; + tx_index = tx_index == 255? 0 : tx_index + 1; prod_index = prod_index + 1; if (prod_index == 0xe000) @@ -491,24 +491,22 @@ static int bcmgenet_gmac_eth_send(void *packet, int length) prod_index = 0; } - if (tx_index == 256) - { - tx_index = 0; - } - /* Start Transmisson */ write32(mac_reg_base_addr + TDMA_PROD_INDEX, prod_index); + level = rt_hw_interrupt_disable(); do { cons = read32(mac_reg_base_addr + TDMA_CONS_INDEX); } while ((cons & 0xffff) < prod_index && --tries); + rt_hw_interrupt_enable(level); if (!tries) { rt_kprintf("send err! tries is %d\n", tries); return -1; } + return 0; } @@ -517,8 +515,10 @@ static void link_task_entry(void *param) struct eth_device *eth_device = (struct eth_device *)param; RT_ASSERT(eth_device != RT_NULL); struct rt_eth_dev *dev = ð_dev; + //start mdio bcmgenet_mdio_init(); + //start timer link rt_timer_init(&dev->link_timer, "link_timer", link_irq, @@ -533,7 +533,7 @@ static void link_task_entry(void *param) rt_timer_stop(&dev->link_timer); //set mac - bcmgenet_gmac_write_hwaddr(); + // bcmgenet_gmac_write_hwaddr(); bcmgenet_gmac_write_hwaddr(); //check link speed @@ -554,19 +554,10 @@ static void link_task_entry(void *param) } bcmgenet_gmac_eth_start(); - //irq or poll -#ifdef ETH_RX_POLL - rt_timer_init(&dev->rx_poll_timer, "rx_poll_timer", - eth_rx_irq, - NULL, - 1, - RT_TIMER_FLAG_PERIODIC); - rt_timer_start(&dev->rx_poll_timer); -#else rt_hw_interrupt_install(ETH_IRQ, eth_rx_irq, NULL, "eth_irq"); rt_hw_interrupt_umask(ETH_IRQ); -#endif + link_flag = 1; } @@ -645,7 +636,6 @@ rt_err_t rt_eth_tx(rt_device_t device, struct pbuf *p) return RT_EOK; } -char recv_data[RX_BUF_LENGTH]; struct pbuf *rt_eth_rx(rt_device_t device) { int recv_len = 0; diff --git a/bsp/raspberry-pi/raspi4-32/driver/raspi4.h b/bsp/raspberry-pi/raspi4-32/driver/raspi4.h index db431bf4d4..e0afd1f712 100644 --- a/bsp/raspberry-pi/raspi4-32/driver/raspi4.h +++ b/bsp/raspberry-pi/raspi4-32/driver/raspi4.h @@ -1,5 +1,6 @@ #ifndef __RASPI4_H__ #define __RASPI4_H__ + //https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2711/rpi_DATA_2711_1p0.pdf #define __REG32(x) (*((volatile unsigned int *)(x))) @@ -76,7 +77,8 @@ extern uint32_t arm_timer_base; #define PACTL_CS_ADDR (PER_BASE + PACTL_CS_OFFSET) extern uint32_t pactl_cs_base; #define PACTL_CS HWREG32(pactl_cs_base) -typedef enum { +typedef enum +{ IRQ_SPI0 = 0x00000000, IRQ_SPI1 = 0x00000002, IRQ_SPI2 = 0x00000004, @@ -149,11 +151,11 @@ extern uint32_t stimer_base_addr; #define STIMER_C2 __REG32(stimer_base_addr + 0x0014) #define STIMER_C3 __REG32(stimer_base_addr + 0x0018) -#define DELAY_MICROS(micros) \ - do{ \ - rt_uint32_t compare = STIMER_CLO + micros * 25; \ - while (STIMER_CLO < compare); \ - } while (0) \ +#define DELAY_MICROS(micros) \ + do{ \ + rt_uint32_t compare = STIMER_CLO + micros * 25; \ + while (STIMER_CLO < compare); \ + } while (0) //External Mass Media Controller (SD Card) #define MMC0_BASE_ADDR (PER_BASE+0x300000) @@ -184,9 +186,4 @@ rt_inline rt_uint32_t platform_get_gic_cpu_base(void) return GIC_PL400_CONTROLLER_PPTR; } -static inline void __DSB(void) -{ - __asm__ volatile ("dsb 0xF":::"memory"); -} #endif - diff --git a/bsp/raspberry-pi/raspi4-32/rtconfig.h b/bsp/raspberry-pi/raspi4-32/rtconfig.h index 8a952940f8..4d9c883600 100644 --- a/bsp/raspberry-pi/raspi4-32/rtconfig.h +++ b/bsp/raspberry-pi/raspi4-32/rtconfig.h @@ -160,13 +160,15 @@ #define NETDEV_USING_PING #define NETDEV_USING_NETSTAT #define NETDEV_USING_AUTO_DEFAULT +#define NETDEV_USING_IPV6 #define NETDEV_IPV4 1 -#define NETDEV_IPV6 0 +#define NETDEV_IPV6 1 /* light weight TCP/IP stack */ #define RT_USING_LWIP #define RT_USING_LWIP202 +#define RT_USING_LWIP_IPV6 #define RT_LWIP_MEM_ALIGNMENT 4 #define RT_LWIP_IGMP #define RT_LWIP_ICMP @@ -183,11 +185,11 @@ #define RT_LWIP_UDP #define RT_LWIP_TCP #define RT_LWIP_RAW -#define RT_MEMP_NUM_NETCONN 8 +#define RT_MEMP_NUM_NETCONN 16 #define RT_LWIP_PBUF_NUM 16 #define RT_LWIP_RAW_PCB_NUM 4 -#define RT_LWIP_UDP_PCB_NUM 4 -#define RT_LWIP_TCP_PCB_NUM 4 +#define RT_LWIP_UDP_PCB_NUM 8 +#define RT_LWIP_TCP_PCB_NUM 8 #define RT_LWIP_TCP_SEG_NUM 40 #define RT_LWIP_TCP_SND_BUF 8196 #define RT_LWIP_TCP_WND 8196 @@ -197,6 +199,7 @@ #define RT_LWIP_ETHTHREAD_PRIORITY 12 #define RT_LWIP_ETHTHREAD_STACKSIZE 4096 #define RT_LWIP_ETHTHREAD_MBOX_SIZE 8 +#define RT_LWIP_REASSEMBLY_FRAG #define LWIP_NETIF_STATUS_CALLBACK 1 #define LWIP_NETIF_LINK_CALLBACK 1 #define SO_REUSE 1 -- Gitee