From 7d1bfe4a2afa63f145bf83b7d89cebe522e04823 Mon Sep 17 00:00:00 2001 From: zhanglin Date: Fri, 2 Feb 2024 11:19:26 +0800 Subject: [PATCH 1/2] arm64: configs: support ISO 9660 CDROM filesystem --- arch/arm64/configs/phytium_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/phytium_defconfig b/arch/arm64/configs/phytium_defconfig index 715217ca33..d369516637 100644 --- a/arch/arm64/configs/phytium_defconfig +++ b/arch/arm64/configs/phytium_defconfig @@ -710,6 +710,7 @@ CONFIG_AUTOFS4_FS=y CONFIG_FUSE_FS=m CONFIG_CUSE=m CONFIG_OVERLAY_FS=m +CONFIG_ISO9660_FS=y CONFIG_VFAT_FS=y CONFIG_TMPFS=y CONFIG_HUGETLBFS=y -- Gitee From 152dcb7d2894d9fb7b1bfcfb95c0357979481129 Mon Sep 17 00:00:00 2001 From: zhanglin Date: Fri, 2 Feb 2024 11:33:33 +0800 Subject: [PATCH 2/2] wifi: rtw88: update drivers --- .../bindings/sound/phytium,hda.yaml | 49 + .../bindings/spi/phytium,qspi-nor.yaml | 70 + .../boot/dts/phytium/phytiumpi_firefly.dts | 2 +- arch/arm64/configs/phytium_defconfig | 3 +- drivers/mmc/host/phytium-mci-plat.c | 2 +- drivers/mmc/host/phytium-mci.c | 5 +- drivers/net/can/phytium/phytium_can.c | 109 +- drivers/net/can/phytium/phytium_can.h | 13 +- drivers/net/can/phytium/phytium_can_pci.c | 10 +- .../net/can/phytium/phytium_can_platform.c | 20 +- drivers/net/ethernet/stmicro/stmmac/common.h | 4 +- .../net/ethernet/stmicro/stmmac/norm_desc.c | 4 + drivers/net/wireless/realtek/rtw88/Kconfig | 94 + drivers/net/wireless/realtek/rtw88/Makefile | 31 + drivers/net/wireless/realtek/rtw88/bf.c | 37 +- drivers/net/wireless/realtek/rtw88/bf.h | 7 +- drivers/net/wireless/realtek/rtw88/bitfield.h | 155 + drivers/net/wireless/realtek/rtw88/coex.c | 1943 +- drivers/net/wireless/realtek/rtw88/coex.h | 75 +- drivers/net/wireless/realtek/rtw88/compiler.h | 552 + drivers/net/wireless/realtek/rtw88/debug.c | 405 +- drivers/net/wireless/realtek/rtw88/debug.h | 7 + drivers/net/wireless/realtek/rtw88/efuse.c | 4 +- drivers/net/wireless/realtek/rtw88/fw.c | 855 +- drivers/net/wireless/realtek/rtw88/fw.h | 308 +- drivers/net/wireless/realtek/rtw88/hci.h | 25 +- drivers/net/wireless/realtek/rtw88/mac.c | 140 +- drivers/net/wireless/realtek/rtw88/mac.h | 5 +- drivers/net/wireless/realtek/rtw88/mac80211.c | 295 +- drivers/net/wireless/realtek/rtw88/main.c | 1081 +- drivers/net/wireless/realtek/rtw88/main.h | 526 +- drivers/net/wireless/realtek/rtw88/pci.c | 388 +- drivers/net/wireless/realtek/rtw88/pci.h | 26 +- drivers/net/wireless/realtek/rtw88/phy.c | 474 +- drivers/net/wireless/realtek/rtw88/phy.h | 11 +- drivers/net/wireless/realtek/rtw88/ps.c | 197 +- drivers/net/wireless/realtek/rtw88/ps.h | 4 + drivers/net/wireless/realtek/rtw88/reg.h | 51 +- drivers/net/wireless/realtek/rtw88/regd.c | 755 +- drivers/net/wireless/realtek/rtw88/regd.h | 8 +- drivers/net/wireless/realtek/rtw88/rtw8723d.c | 147 +- drivers/net/wireless/realtek/rtw88/rtw8723d.h | 24 +- .../net/wireless/realtek/rtw88/rtw8723de.c | 3 +- .../net/wireless/realtek/rtw88/rtw8723ds.c | 41 + .../net/wireless/realtek/rtw88/rtw8723du.c | 36 + drivers/net/wireless/realtek/rtw88/rtw8821c.c | 206 +- drivers/net/wireless/realtek/rtw88/rtw8821c.h | 53 +- .../wireless/realtek/rtw88/rtw8821c_table.c | 399 +- .../wireless/realtek/rtw88/rtw8821c_table.h | 1 + .../net/wireless/realtek/rtw88/rtw8821ce.c | 7 +- .../net/wireless/realtek/rtw88/rtw8821cs.c | 36 + .../net/wireless/realtek/rtw88/rtw8821cu.c | 50 + drivers/net/wireless/realtek/rtw88/rtw8822b.c | 143 +- drivers/net/wireless/realtek/rtw88/rtw8822b.h | 18 +- .../net/wireless/realtek/rtw88/rtw8822be.c | 3 +- .../net/wireless/realtek/rtw88/rtw8822bs.c | 36 + .../net/wireless/realtek/rtw88/rtw8822bu.c | 90 + drivers/net/wireless/realtek/rtw88/rtw8822c.c | 1213 +- drivers/net/wireless/realtek/rtw88/rtw8822c.h | 358 +- .../wireless/realtek/rtw88/rtw8822c_table.c | 27161 ++++++++++++---- .../net/wireless/realtek/rtw88/rtw8822ce.c | 3 +- .../net/wireless/realtek/rtw88/rtw8822cs.c | 36 + .../net/wireless/realtek/rtw88/rtw8822cu.c | 44 + drivers/net/wireless/realtek/rtw88/rx.c | 40 + drivers/net/wireless/realtek/rtw88/sar.c | 116 + drivers/net/wireless/realtek/rtw88/sar.h | 25 + .../net/wireless/realtek/rtw88/sch_generic.h | 849 + drivers/net/wireless/realtek/rtw88/sdio.c | 1416 + drivers/net/wireless/realtek/rtw88/sdio.h | 178 + drivers/net/wireless/realtek/rtw88/sdio_ids.h | 10 + drivers/net/wireless/realtek/rtw88/tx.c | 232 +- drivers/net/wireless/realtek/rtw88/tx.h | 132 +- drivers/net/wireless/realtek/rtw88/usb.c | 916 + drivers/net/wireless/realtek/rtw88/usb.h | 100 + drivers/net/wireless/realtek/rtw88/util.c | 104 +- drivers/net/wireless/realtek/rtw88/util.h | 11 +- drivers/net/wireless/realtek/rtw88/wow.c | 96 +- drivers/pci/controller/Kconfig | 10 + drivers/pci/controller/Makefile | 1 + drivers/pci/controller/pcie-phytium-ep.c | 476 + drivers/pci/controller/pcie-phytium-ep.h | 95 + .../pci/controller/pcie-phytium-register.h | 87 + drivers/pci/msi.c | 8 +- drivers/pci/probe.c | 6 + drivers/pci/setup-bus.c | 16 + drivers/usb/phytium/host.c | 63 +- 86 files changed, 36437 insertions(+), 7408 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/phytium,hda.yaml create mode 100644 Documentation/devicetree/bindings/spi/phytium,qspi-nor.yaml create mode 100644 drivers/net/wireless/realtek/rtw88/bitfield.h create mode 100644 drivers/net/wireless/realtek/rtw88/compiler.h create mode 100644 drivers/net/wireless/realtek/rtw88/rtw8723ds.c create mode 100644 drivers/net/wireless/realtek/rtw88/rtw8723du.c create mode 100644 drivers/net/wireless/realtek/rtw88/rtw8821cs.c create mode 100644 drivers/net/wireless/realtek/rtw88/rtw8821cu.c create mode 100644 drivers/net/wireless/realtek/rtw88/rtw8822bs.c create mode 100644 drivers/net/wireless/realtek/rtw88/rtw8822bu.c create mode 100644 drivers/net/wireless/realtek/rtw88/rtw8822cs.c create mode 100644 drivers/net/wireless/realtek/rtw88/rtw8822cu.c create mode 100644 drivers/net/wireless/realtek/rtw88/sar.c create mode 100644 drivers/net/wireless/realtek/rtw88/sar.h create mode 100644 drivers/net/wireless/realtek/rtw88/sch_generic.h create mode 100644 drivers/net/wireless/realtek/rtw88/sdio.c create mode 100644 drivers/net/wireless/realtek/rtw88/sdio.h create mode 100644 drivers/net/wireless/realtek/rtw88/sdio_ids.h create mode 100644 drivers/net/wireless/realtek/rtw88/usb.c create mode 100644 drivers/net/wireless/realtek/rtw88/usb.h create mode 100644 drivers/pci/controller/pcie-phytium-ep.c create mode 100644 drivers/pci/controller/pcie-phytium-ep.h create mode 100644 drivers/pci/controller/pcie-phytium-register.h diff --git a/Documentation/devicetree/bindings/sound/phytium,hda.yaml b/Documentation/devicetree/bindings/sound/phytium,hda.yaml new file mode 100644 index 0000000000..7aa5371127 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/phytium,hda.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/phytium,hda.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Phytium HDA Controller + +maintainers: + - Dai Jingtao + +properties: + compatible: + enum: + - phytium,hda + + + reg: + items: + - description: HDA registers + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Bus Clock + + clock-names: + items: + - const: phytium_hda_clk + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + + +examples: + - | + hda@28002000 { + compatible = "phytium,hda"; + reg = <0x0 0x28002000 0x0 0x1000>; + interrupts = ; + clocks = <&sysclk_48mhz>; + clock-names = "phytium_hda_clk"; + }; diff --git a/Documentation/devicetree/bindings/spi/phytium,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/phytium,qspi-nor.yaml new file mode 100644 index 0000000000..8ff781a145 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/phytium,qspi-nor.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/phytium,qspi-nor.yaml# +$schema: http://devicetree.org/schemas/meta-schemas/core.yaml# + +title: Phytium Quad Serial Peripheral Interface (QSPI) bindings + +maintainers: + - Chen Baozi + +allOf: + - $ref: "spi-controller.yaml#" + +properties: + compatible: + const: phytium,qspi-nor + + reg: + items: + - description: registers + - description: memory mapping region + + reg-names: + items: + - const: qspi + - const: qspi_mm + + clocks: + maxItems: 1 + + no-direct-mapping: + $ref: /schemas/types.yaml#/definitions/flag + description: + Indicates if we can use direct mapping to access the flash + +required: + - compatible + - reg + - reg-names + - clocks + +unevaluateProperties: false + +examples: + - | + qspi: qspi@28014000 { + compatible = "phytium,qspi-nor"; + reg = <0x0 0x28014000 0x0 0x1000>, + <0x0 0x0 0x0 0x02000000>; + reg-names = "qspi", "qspi_mm"; + clocks = <&sysclk_600mhz>; + + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-rx-bus-width = <4>; + spi-max-frequency = <600000000>; + }; + + flash@1 { + compatible = "jedec,spi-nor"; + reg = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <600000000>; + }; + }; diff --git a/arch/arm64/boot/dts/phytium/phytiumpi_firefly.dts b/arch/arm64/boot/dts/phytium/phytiumpi_firefly.dts index d935c7d9d2..ac55e231aa 100644 --- a/arch/arm64/boot/dts/phytium/phytiumpi_firefly.dts +++ b/arch/arm64/boot/dts/phytium/phytiumpi_firefly.dts @@ -262,7 +262,7 @@ &mmc0 { &mmc1 { bus-width = <0x00000004>; - max-frequency = <25000000>; + max-frequency = <50000000>; cap-sdio-irq; cap-sd-highspeed; no-mmc; diff --git a/arch/arm64/configs/phytium_defconfig b/arch/arm64/configs/phytium_defconfig index d369516637..802985cfae 100644 --- a/arch/arm64/configs/phytium_defconfig +++ b/arch/arm64/configs/phytium_defconfig @@ -325,9 +325,10 @@ CONFIG_BRCMFMAC=m CONFIG_MWIFIEX=m CONFIG_MWIFIEX_PCIE=m CONFIG_RTL_CARDS=m +CONFIG_RTW88=m +CONFIG_RTW88_8821CS=m CONFIG_WL18XX=m CONFIG_WLCORE_SDIO=m -CONFIG_RTL8821CS=m CONFIG_INPUT_EVDEV=y CONFIG_KEYBOARD_ADC=m CONFIG_KEYBOARD_GPIO=y diff --git a/drivers/mmc/host/phytium-mci-plat.c b/drivers/mmc/host/phytium-mci-plat.c index d4d51adbf8..33064b16b9 100644 --- a/drivers/mmc/host/phytium-mci-plat.c +++ b/drivers/mmc/host/phytium-mci-plat.c @@ -14,7 +14,7 @@ #include #include "phytium-mci.h" -static u32 mci_caps = MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY; +static u32 mci_caps = MMC_CAP_CMD23; #if defined CONFIG_PM && defined CONFIG_PM_SLEEP diff --git a/drivers/mmc/host/phytium-mci.c b/drivers/mmc/host/phytium-mci.c index 22ec14694c..796c8d6207 100644 --- a/drivers/mmc/host/phytium-mci.c +++ b/drivers/mmc/host/phytium-mci.c @@ -293,7 +293,7 @@ u32 phytium_mci_cmd_prepare_raw_cmd(struct phytium_mci_host *host, rawcmd |= (0x1 << 10); } - return (rawcmd | (0x1 << 29) | (0x1 << 31)); + return (rawcmd | (0x1 << 31)); } static inline void @@ -1163,8 +1163,7 @@ static irqreturn_t phytium_mci_irq(int irq, void *dev_id) __phytium_mci_enable_sdio_irq(host, 0); } - - writel(events, host->base + MCI_RAW_INTS); + writel((events & event_mask), host->base + MCI_RAW_INTS); writel(dmac_events, host->base + MCI_DMAC_STATUS); spin_unlock_irqrestore(&host->lock, flags); diff --git a/drivers/net/can/phytium/phytium_can.c b/drivers/net/can/phytium/phytium_can.c index 95ec7311bf..c761c77ac7 100644 --- a/drivers/net/can/phytium/phytium_can.c +++ b/drivers/net/can/phytium/phytium_can.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* CAN bus driver for Phytium CAN controller * - * Copyright (c) 2021-2023 Phytium Technology Co., Ltd. + * Copyright (C) 2021-2023, Phytium Technology Co., Ltd. */ #include @@ -85,8 +85,10 @@ enum phytium_can_reg { #define INTR_STATUS_MASK (INTR_BOIS | INTR_PWIS | INTR_PEIS | INTR_RFIS | \ INTR_TFIS | INTR_REIS | INTR_TEIS | INTR_EIS) -#define INTR_EN_MASK (INTR_BOIE | INTR_RFIE | INTR_REIE | INTR_TEIE | \ - INTR_EIE) + +#define INTR_EN_MASK (INTR_BOIE | INTR_PWIE | INTR_PEIE | INTR_RFIE | \ + INTR_REIE | INTR_TEIE | INTR_EIE) + #define INTR_CLEAR_MASK (INTR_BOIC | INTR_PWIC | INTR_PEIC | INTR_RFIC | \ INTR_TFIC | INTR_REIC | INTR_TEIC | INTR_EIC) @@ -282,7 +284,7 @@ static inline u32 phytium_can_read(const struct phytium_can_dev *cdev, enum phyt } static inline void phytium_can_write(const struct phytium_can_dev *cdev, enum phytium_can_reg reg, - u32 val) + u32 val) { writel(val, cdev->base + reg); } @@ -417,21 +419,6 @@ static int phytium_can_do_rx_poll(struct net_device *dev, int quota) return pkts; } -static int phytium_can_rx_handler(struct net_device *dev, int quota) -{ - int work_done = 0; - int rx_work_or_err; - - /* Handle RX IRQ */ - rx_work_or_err = phytium_can_do_rx_poll(dev, (quota - work_done)); - if (rx_work_or_err < 0) - return rx_work_or_err; - - work_done += rx_work_or_err; - - return 0; -} - static int phytium_can_poll(struct napi_struct *napi, int quota) { struct net_device *dev = napi->dev; @@ -441,13 +428,14 @@ static int phytium_can_poll(struct napi_struct *napi, int quota) netdev_dbg(dev, "The receive processing is going on !\n"); - work_done = phytium_can_rx_handler(dev, quota); + work_done = phytium_can_do_rx_poll(dev, quota); /* Don't re-enable interrupts if the driver had a fatal error * (e.g., FIFO read failure) */ if (work_done >= 0 && work_done < quota) { napi_complete_done(napi, work_done); + spin_lock_irqsave(&cdev->lock, flags); phytium_can_set_reg_bits(cdev, CAN_INTR, INTR_REIE); spin_unlock_irqrestore(&cdev->lock, flags); @@ -550,6 +538,11 @@ static void phytium_can_write_frame(struct phytium_can_dev *cdev) stats->tx_bytes += cf->len; stats->tx_packets++; + + cdev->is_tx_done = false; + cdev->is_need_stop_xmit = true; + mod_timer(&cdev->timer, jiffies + HZ / 10); + netdev_dbg(dev, "Trigger send message!\n"); can_put_echo_skb(skb, dev, 0); can_get_echo_skb(dev, 0); @@ -563,7 +556,6 @@ static netdev_tx_t phytium_can_tx_handler(struct phytium_can_dev *cdev) unsigned long flags; phytium_can_write_frame(cdev); - /* Check if the TX buffer is full */ tx_fifo_used = 4 * ((phytium_can_read(cdev, CAN_FIFO_CNT) & FIFO_CNT_TFN) >> 16); if (cdev->can.ctrlmode & CAN_CTRLMODE_FD) { @@ -596,9 +588,8 @@ static void phytium_can_tx_interrupt(struct net_device *ndev, u32 isr) struct net_device_stats *stats = &ndev->stats; u32 tx_fifo_used = 0; - if (isr & INTR_TEIS) { + if (isr & INTR_TEIS) phytium_can_set_reg_bits(cdev, CAN_INTR, INTR_TEIC); - } /* Check if the TX buffer is full */ if (cdev->is_stop_queue_flag) { @@ -615,8 +606,43 @@ static void phytium_can_tx_interrupt(struct net_device *ndev, u32 isr) } } } + + cdev->is_tx_done = true; + cdev->is_need_stop_xmit = false; + del_timer(&cdev->timer); + netdev_dbg(ndev, "Finish transform packets %lu\n", stats->tx_packets); + + + phytium_can_set_reg_bits(cdev, CAN_INTR, (INTR_BOIE | + INTR_PWIE | INTR_PEIE)); + can_led_event(ndev, CAN_LED_EVENT_TX); + +} + +static void phytium_can_tx_done_timeout(struct timer_list *t) +{ + struct phytium_can_dev *priv = from_timer(priv, t, timer); + struct net_device *ndev = priv->net; + + if (!priv->is_tx_done) { + if (priv->is_need_stop_xmit) { + netdev_dbg(ndev, "%s stop xmit\n", __func__); + priv->is_need_stop_xmit = false; + phytium_can_clr_reg_bits(priv, CAN_CTRL, CTRL_XFER); + phytium_can_clr_reg_bits(priv, CAN_INTR, (INTR_BOIE | + INTR_PWIE | INTR_PEIE)); + /* stop xmit and restart after 500ms */ + mod_timer(&priv->timer, jiffies + HZ / 2); + } else { + netdev_dbg(ndev, "%s start xmit\n", __func__); + priv->is_need_stop_xmit = true; + phytium_can_set_reg_bits(priv, CAN_CTRL, CTRL_XFER); + /* start xmit and stop after 250ms */ + mod_timer(&priv->timer, jiffies + HZ / 4); + } + } } static void phytium_can_err_interrupt(struct net_device *ndev, u32 isr) @@ -717,6 +743,7 @@ static irqreturn_t phytium_can_isr(int irq, void *dev_id) isr = phytium_can_read(cdev, CAN_INTR) & INTR_STATUS_MASK; if (!isr) return IRQ_NONE; + spin_lock(&cdev->lock); /* Check for FIFO full interrupt and alarm */ if ((isr & INTR_RFIS)) { @@ -726,25 +753,32 @@ static irqreturn_t phytium_can_isr(int irq, void *dev_id) napi_schedule(&cdev->napi); } + /* Check for FIFO empty interrupt and alarm */ + if ((isr & INTR_TFIS)) { + netdev_dbg(dev, "tx_fifo is empty!.\n"); + isr &= (~INTR_TFIS); + phytium_can_clr_reg_bits(cdev, CAN_INTR, INTR_TFIE); + phytium_can_set_reg_bits(cdev, CAN_INTR, INTR_TFIC); + } + /* Check for the type of error interrupt and Processing it */ - if (isr & (INTR_EIS | INTR_RFIS | INTR_BOIS)) { - phytium_can_clr_reg_bits(cdev, CAN_INTR, (INTR_EIE - | INTR_RFIE | INTR_BOIE)); + if (isr & (INTR_EIS | INTR_RFIS | INTR_BOIS | INTR_PWIS | INTR_PEIS)) { + phytium_can_clr_reg_bits(cdev, CAN_INTR, (INTR_EIE | INTR_RFIE | + INTR_BOIE | INTR_PWIE | INTR_PEIE)); phytium_can_err_interrupt(dev, isr); - phytium_can_set_reg_bits(cdev, CAN_INTR, (INTR_EIC - | INTR_RFIC | INTR_BOIC)); - phytium_can_set_reg_bits(cdev, CAN_INTR, INTR_EIE | INTR_BOIE); + phytium_can_set_reg_bits(cdev, CAN_INTR, (INTR_EIC | INTR_RFIC | + INTR_BOIC | INTR_PWIC | INTR_PEIC)); spin_unlock(&cdev->lock); return IRQ_HANDLED; } /* Check for Tx interrupt and Processing it */ - if (isr & INTR_TEIS) { + if ((isr & INTR_TEIS)) { phytium_can_tx_interrupt(dev, isr); } /* Check for the type of receive interrupt and Processing it */ - if (isr & INTR_REIS) { + if (isr & (INTR_REIS)) { phytium_can_clr_reg_bits(cdev, CAN_INTR, INTR_REIE); phytium_can_set_reg_bits(cdev, CAN_INTR, INTR_REIC); napi_schedule(&cdev->napi); @@ -877,12 +911,14 @@ static void phytium_can_stop(struct net_device *dev) /* Disable all interrupts */ phytium_can_disable_all_interrupt(cdev); - + /* Disable transfer and switch to receive-only mode */ ctrl = phytium_can_read(cdev, CAN_CTRL); ctrl &= ~(CTRL_XFER | CTRL_TXREQ); phytium_can_write(cdev, CAN_CTRL, ctrl); + del_timer(&cdev->timer); + /* Set the state as STOPPED */ cdev->can.state = CAN_STATE_STOPPED; } @@ -927,9 +963,10 @@ static int phytium_can_open(struct net_device *dev) ret = pm_runtime_get_sync(cdev->dev); if (ret < 0) { netdev_err(dev, "%s: pm_runtime_get failed(%d)\n", - __func__, ret); + __func__, ret); return ret; } + /* Open the CAN device */ ret = open_candev(dev); if (ret) { @@ -948,6 +985,8 @@ static int phytium_can_open(struct net_device *dev) /* Start the controller */ phytium_can_start(dev); + netdev_dbg(dev, "%s is going on\n", __func__); + can_led_event(dev, CAN_LED_EVENT_OPEN); napi_enable(&cdev->napi); cdev->is_stop_queue_flag = STOP_QUEUE_FALSE; @@ -1085,6 +1124,10 @@ int phytium_can_register(struct phytium_can_dev *cdev) goto fail; } + cdev->is_tx_done = true; + cdev->is_need_stop_xmit = false; + timer_setup(&cdev->timer, phytium_can_tx_done_timeout, 0); + devm_can_led_init(cdev->net); dev_info(cdev->dev, "%s device registered (irq=%d)\n", diff --git a/drivers/net/can/phytium/phytium_can.h b/drivers/net/can/phytium/phytium_can.h index 400571b745..802bb36a13 100644 --- a/drivers/net/can/phytium/phytium_can.h +++ b/drivers/net/can/phytium/phytium_can.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* Phytium CAN controller driver * - * Copyright (c) 2021-2023 Phytium Technology Co., Ltd. + * Copyright (C) 2021-2023, Phytium Technology Co., Ltd. */ #ifndef _PHYTIUM_CAN_H_ @@ -41,9 +41,7 @@ struct phytium_can_devtype { struct phytium_can_dev { struct can_priv can; - unsigned int tx_head; - unsigned int tx_tail; - unsigned int tx_max; + struct napi_struct napi; struct net_device *net; struct device *dev; @@ -52,13 +50,16 @@ struct phytium_can_dev { struct sk_buff *tx_skb; const struct can_bittiming_const *bit_timing; - spinlock_t lock; + spinlock_t lock; /*spinlock*/ int fdmode; u32 isr; u32 tx_fifo_depth; unsigned int is_stop_queue_flag; - struct completion comp; void __iomem *base; + + struct timer_list timer; /* xmit done timer */ + u32 is_tx_done; + u32 is_need_stop_xmit; }; struct phytium_can_dev *phytium_can_allocate_dev(struct device *dev, int sizeof_priv, diff --git a/drivers/net/can/phytium/phytium_can_pci.c b/drivers/net/can/phytium/phytium_can_pci.c index ae4a6f8774..5113926e08 100644 --- a/drivers/net/can/phytium/phytium_can_pci.c +++ b/drivers/net/can/phytium/phytium_can_pci.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* Platform CAN bus driver for Phytium CAN controller * - * Copyright (c) 2021-2023 Phytium Technology Co., Ltd. + * Copyright (C) 2021-2023, Phytium Technology Co., Ltd. */ #include @@ -41,7 +41,7 @@ static const struct phytium_can_devtype phytium_can_pci = { static const struct phytium_can_pci_config phytium_can_pci_data = { .devtype = &phytium_can_pci, - .clock_freq = 600000000, + .clock_freq = 480000000, .tx_fifo_depth = 64, }; @@ -76,10 +76,6 @@ static int phytium_can_pci_probe(struct pci_dev *pdev, const struct pci_device_i cdev->can.clock.freq = cfg->clock_freq; cdev->tx_fifo_depth = cfg->tx_fifo_depth; - cdev->tx_head = 0; - cdev->tx_tail = 0; - cdev->tx_max = cfg->tx_fifo_depth; - cdev->base = priv->base; cdev->net->irq = pdev->irq; @@ -90,7 +86,7 @@ static int phytium_can_pci_probe(struct pci_dev *pdev, const struct pci_device_i ret = pm_runtime_get_sync(cdev->dev); if (ret < 0) { netdev_err(cdev->net, "%s: pm_runtime_get failed(%d)\n", - __func__, ret); + __func__, ret); goto err_pmdisable; } ret = phytium_can_register(cdev); diff --git a/drivers/net/can/phytium/phytium_can_platform.c b/drivers/net/can/phytium/phytium_can_platform.c index ce479af111..697f69d625 100644 --- a/drivers/net/can/phytium/phytium_can_platform.c +++ b/drivers/net/can/phytium/phytium_can_platform.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* Platform CAN bus driver for Phytium CAN controller * - * Copyright (c) 2021-2023 Phytium Technology Co., Ltd. + * Copyright (C) 2021-2023, Phytium Technology Co., Ltd. */ #include @@ -71,7 +71,6 @@ static const struct of_device_id phytium_can_of_ids[] = { MODULE_DEVICE_TABLE(of, phytium_can_of_ids); #endif - static int phytium_can_plat_probe(struct platform_device *pdev) { struct phytium_can_dev *cdev; @@ -81,7 +80,7 @@ static int phytium_can_plat_probe(struct platform_device *pdev) const struct phytium_can_devtype *devtype = &phytium_can_data; u32 tx_fifo_depth; int ret; - const char *mode; + const char *str = "can"; ret = fwnode_property_read_u32(dev_fwnode(&pdev->dev), "tx-fifo-depth", &tx_fifo_depth); if (ret) @@ -122,16 +121,11 @@ static int phytium_can_plat_probe(struct platform_device *pdev) dev_err(&pdev->dev, "failed to get clock frequency.\n"); goto fail; } - ret = fwnode_property_read_string(dev_fwnode(&pdev->dev), "mode-select", &mode); - if (ret < 0) { - dev_info(&pdev->dev, "get mode-select ret: %d\n", ret); - } - else { - if (strncmp("canfd", mode, strlen("canfd")) == 0) { - dev_info(&pdev->dev, "use mode-select: canfd\n"); - devtype = &phytium_canfd_data; - } - } + + fwnode_property_read_string(dev_fwnode(&pdev->dev), + "mode-select", &str); + if (!(strcmp(str, "canfd"))) + devtype = &phytium_canfd_data; } cdev->tx_fifo_depth = tx_fifo_depth; diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h index df7de50497..4f348d5ff9 100644 --- a/drivers/net/ethernet/stmicro/stmmac/common.h +++ b/drivers/net/ethernet/stmicro/stmmac/common.h @@ -48,10 +48,10 @@ */ #define DMA_MIN_TX_SIZE 64 #define DMA_MAX_TX_SIZE 1024 -#define DMA_DEFAULT_TX_SIZE 512 +#define DMA_DEFAULT_TX_SIZE 1024 #define DMA_MIN_RX_SIZE 64 #define DMA_MAX_RX_SIZE 1024 -#define DMA_DEFAULT_RX_SIZE 512 +#define DMA_DEFAULT_RX_SIZE 1024 #define STMMAC_GET_ENTRY(x, size) ((x + 1) & (size - 1)) #undef FRAME_FILTER_DEBUG diff --git a/drivers/net/ethernet/stmicro/stmmac/norm_desc.c b/drivers/net/ethernet/stmicro/stmmac/norm_desc.c index 98ef43f358..78bce13ad6 100644 --- a/drivers/net/ethernet/stmicro/stmmac/norm_desc.c +++ b/drivers/net/ethernet/stmicro/stmmac/norm_desc.c @@ -207,6 +207,10 @@ static void ndesc_prepare_tx_desc(struct dma_desc *p, int is_fs, int len, else norm_set_tx_desc_len_on_ring(p, len); + /* The own bit must be the latest setting done when prepare the + * descriptor and then barrier is needed to make sure that all is coherent. + */ + wmb(); if (tx_own) p->des0 |= cpu_to_le32(TDES0_OWN); } diff --git a/drivers/net/wireless/realtek/rtw88/Kconfig b/drivers/net/wireless/realtek/rtw88/Kconfig index e3d7cb6c12..cffad1c012 100644 --- a/drivers/net/wireless/realtek/rtw88/Kconfig +++ b/drivers/net/wireless/realtek/rtw88/Kconfig @@ -16,6 +16,12 @@ config RTW88_CORE config RTW88_PCI tristate +config RTW88_SDIO + tristate + +config RTW88_USB + tristate + config RTW88_8822B tristate @@ -39,6 +45,28 @@ config RTW88_8822BE 802.11ac PCIe wireless network adapter +config RTW88_8822BS + tristate "Realtek 8822BS SDIO wireless network adapter" + depends on MMC + select RTW88_CORE + select RTW88_SDIO + select RTW88_8822B + help + Select this option will enable support for 8822BS chipset + + 802.11ac SDIO wireless network adapter + +config RTW88_8822BU + tristate "Realtek 8822BU USB wireless network adapter" + depends on USB + select RTW88_CORE + select RTW88_USB + select RTW88_8822B + help + Select this option will enable support for 8822BU chipset + + 802.11ac USB wireless network adapter + config RTW88_8822CE tristate "Realtek 8822CE PCI wireless network adapter" depends on PCI @@ -50,6 +78,28 @@ config RTW88_8822CE 802.11ac PCIe wireless network adapter +config RTW88_8822CS + tristate "Realtek 8822CS SDIO wireless network adapter" + depends on MMC + select RTW88_CORE + select RTW88_SDIO + select RTW88_8822C + help + Select this option will enable support for 8822CS chipset + + 802.11ac SDIO wireless network adapter + +config RTW88_8822CU + tristate "Realtek 8822CU USB wireless network adapter" + depends on USB + select RTW88_CORE + select RTW88_USB + select RTW88_8822C + help + Select this option will enable support for 8822CU chipset + + 802.11ac USB wireless network adapter + config RTW88_8723DE tristate "Realtek 8723DE PCI wireless network adapter" depends on PCI @@ -61,6 +111,28 @@ config RTW88_8723DE 802.11n PCIe wireless network adapter +config RTW88_8723DS + tristate "Realtek 8723DS SDIO wireless network adapter" + depends on MMC + select RTW88_CORE + select RTW88_SDIO + select RTW88_8723D + help + Select this option will enable support for 8723DS chipset + + 802.11n SDIO wireless network adapter + +config RTW88_8723DU + tristate "Realtek 8723DU USB wireless network adapter" + depends on USB + select RTW88_CORE + select RTW88_USB + select RTW88_8723D + help + Select this option will enable support for 8723DU chipset + + 802.11n USB wireless network adapter + config RTW88_8821CE tristate "Realtek 8821CE PCI wireless network adapter" depends on PCI @@ -72,6 +144,28 @@ config RTW88_8821CE 802.11ac PCIe wireless network adapter +config RTW88_8821CS + tristate "Realtek 8821CS SDIO wireless network adapter" + depends on MMC + select RTW88_CORE + select RTW88_SDIO + select RTW88_8821C + help + Select this option will enable support for 8821CS chipset + + 802.11ac SDIO wireless network adapter + +config RTW88_8821CU + tristate "Realtek 8821CU USB wireless network adapter" + depends on USB + select RTW88_CORE + select RTW88_USB + select RTW88_8821C + help + Select this option will enable support for 8821CU chipset + + 802.11ac USB wireless network adapter + config RTW88_DEBUG bool "Realtek rtw88 debug support" depends on RTW88_CORE diff --git a/drivers/net/wireless/realtek/rtw88/Makefile b/drivers/net/wireless/realtek/rtw88/Makefile index 73d6807a8c..fd212c09d8 100644 --- a/drivers/net/wireless/realtek/rtw88/Makefile +++ b/drivers/net/wireless/realtek/rtw88/Makefile @@ -15,6 +15,7 @@ rtw88_core-y += main.o \ ps.o \ sec.o \ bf.o \ + sar.o \ regd.o rtw88_core-$(CONFIG_PM) += wow.o @@ -25,23 +26,53 @@ rtw88_8822b-objs := rtw8822b.o rtw8822b_table.o obj-$(CONFIG_RTW88_8822BE) += rtw88_8822be.o rtw88_8822be-objs := rtw8822be.o +obj-$(CONFIG_RTW88_8822BS) += rtw88_8822bs.o +rtw88_8822bs-objs := rtw8822bs.o + +obj-$(CONFIG_RTW88_8822BU) += rtw88_8822bu.o +rtw88_8822bu-objs := rtw8822bu.o + obj-$(CONFIG_RTW88_8822C) += rtw88_8822c.o rtw88_8822c-objs := rtw8822c.o rtw8822c_table.o obj-$(CONFIG_RTW88_8822CE) += rtw88_8822ce.o rtw88_8822ce-objs := rtw8822ce.o +obj-$(CONFIG_RTW88_8822CS) += rtw88_8822cs.o +rtw88_8822cs-objs := rtw8822cs.o + +obj-$(CONFIG_RTW88_8822CU) += rtw88_8822cu.o +rtw88_8822cu-objs := rtw8822cu.o + obj-$(CONFIG_RTW88_8723D) += rtw88_8723d.o rtw88_8723d-objs := rtw8723d.o rtw8723d_table.o obj-$(CONFIG_RTW88_8723DE) += rtw88_8723de.o rtw88_8723de-objs := rtw8723de.o +obj-$(CONFIG_RTW88_8723DS) += rtw88_8723ds.o +rtw88_8723ds-objs := rtw8723ds.o + +obj-$(CONFIG_RTW88_8723DU) += rtw88_8723du.o +rtw88_8723du-objs := rtw8723du.o + obj-$(CONFIG_RTW88_8821C) += rtw88_8821c.o rtw88_8821c-objs := rtw8821c.o rtw8821c_table.o obj-$(CONFIG_RTW88_8821CE) += rtw88_8821ce.o rtw88_8821ce-objs := rtw8821ce.o +obj-$(CONFIG_RTW88_8821CS) += rtw88_8821cs.o +rtw88_8821cs-objs := rtw8821cs.o + +obj-$(CONFIG_RTW88_8821CU) += rtw88_8821cu.o +rtw88_8821cu-objs := rtw8821cu.o + obj-$(CONFIG_RTW88_PCI) += rtw88_pci.o rtw88_pci-objs := pci.o + +obj-$(CONFIG_RTW88_SDIO) += rtw88_sdio.o +rtw88_sdio-objs := sdio.o + +obj-$(CONFIG_RTW88_USB) += rtw88_usb.o +rtw88_usb-objs := usb.o diff --git a/drivers/net/wireless/realtek/rtw88/bf.c b/drivers/net/wireless/realtek/rtw88/bf.c index aff70e4ae0..95de3d3da0 100644 --- a/drivers/net/wireless/realtek/rtw88/bf.c +++ b/drivers/net/wireless/realtek/rtw88/bf.c @@ -30,11 +30,11 @@ void rtw_bf_disassoc(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, void rtw_bf_assoc(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, struct ieee80211_bss_conf *bss_conf) { + const struct rtw_chip_info *chip = rtwdev->chip; struct ieee80211_hw *hw = rtwdev->hw; struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; struct rtw_bfee *bfee = &rtwvif->bfee; struct rtw_bf_info *bfinfo = &rtwdev->bf_info; - struct rtw_chip_info *chip = rtwdev->chip; struct ieee80211_sta *sta; struct ieee80211_sta_vht_cap *vht_cap; struct ieee80211_sta_vht_cap *ic_vht_cap; @@ -49,25 +49,37 @@ void rtw_bf_assoc(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, sta = ieee80211_find_sta(vif, bssid); if (!sta) { + rcu_read_unlock(); + rtw_warn(rtwdev, "failed to find station entry for bss %pM\n", bssid); - goto out_unlock; + return; } ic_vht_cap = &hw->wiphy->bands[NL80211_BAND_5GHZ]->vht_cap; +#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0) vht_cap = &sta->vht_cap; +#else + vht_cap = &sta->deflink.vht_cap; +#endif + + rcu_read_unlock(); if ((ic_vht_cap->cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE) && (vht_cap->cap & IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE)) { if (bfinfo->bfer_mu_cnt >= chip->bfer_mu_max_num) { rtw_dbg(rtwdev, RTW_DBG_BF, "mu bfer number over limit\n"); - goto out_unlock; + return; } ether_addr_copy(bfee->mac_addr, bssid); bfee->role = RTW_BFEE_MU; bfee->p_aid = (bssid[5] << 1) | (bssid[4] >> 7); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) + bfee->aid = vif->cfg.aid; +#else bfee->aid = bss_conf->aid; +#endif bfinfo->bfer_mu_cnt++; rtw_chip_config_bfee(rtwdev, rtwvif, bfee, true); @@ -75,7 +87,7 @@ void rtw_bf_assoc(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, (vht_cap->cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE)) { if (bfinfo->bfer_su_cnt >= chip->bfer_su_max_num) { rtw_dbg(rtwdev, RTW_DBG_BF, "su bfer number over limit\n"); - goto out_unlock; + return; } sound_dim = vht_cap->cap & @@ -98,9 +110,6 @@ void rtw_bf_assoc(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, rtw_chip_config_bfee(rtwdev, rtwvif, bfee, true); } - -out_unlock: - rcu_read_unlock(); } void rtw_bf_init_bfer_entry_mu(struct rtw_dev *rtwdev, @@ -130,7 +139,8 @@ void rtw_bf_cfg_sounding(struct rtw_dev *rtwdev, struct rtw_vif *vif, BIT_WMAC_USE_NDPARATE | (csi_rsc << 13); - rtw_write8(rtwdev, REG_SND_PTCL_CTRL, RTW_SND_CTRL_SOUNDING); + rtw_write8_mask(rtwdev, REG_SND_PTCL_CTRL, BIT_MASK_BEAMFORM, + RTW_SND_CTRL_SOUNDING); rtw_write8(rtwdev, REG_SND_PTCL_CTRL + 3, 0x26); rtw_write8_clr(rtwdev, REG_RXFLTMAP1, BIT_RXFLTMAP1_BF_REPORT_POLL); rtw_write8_clr(rtwdev, REG_RXFLTMAP4, BIT_RXFLTMAP4_BF_REPORT_POLL); @@ -177,7 +187,7 @@ void rtw_bf_del_bfer_entry_mu(struct rtw_dev *rtwdev) void rtw_bf_del_sounding(struct rtw_dev *rtwdev) { - rtw_write8(rtwdev, REG_SND_PTCL_CTRL, 0); + rtw_write8_mask(rtwdev, REG_SND_PTCL_CTRL, BIT_MASK_BEAMFORM, 0); } void rtw_bf_enable_bfee_su(struct rtw_dev *rtwdev, struct rtw_vif *vif, @@ -204,7 +214,8 @@ void rtw_bf_enable_bfee_su(struct rtw_dev *rtwdev, struct rtw_vif *vif, } /* Sounding protocol control */ - rtw_write8(rtwdev, REG_SND_PTCL_CTRL, RTW_SND_CTRL_SOUNDING); + rtw_write8_mask(rtwdev, REG_SND_PTCL_CTRL, BIT_MASK_BEAMFORM, + RTW_SND_CTRL_SOUNDING); /* MAC address/Partial AID of Beamformer */ for (i = 0; i < ETH_ALEN; i++) @@ -273,7 +284,8 @@ void rtw_bf_remove_bfee_su(struct rtw_dev *rtwdev, struct rtw_bf_info *bfinfo = &rtwdev->bf_info; rtw_dbg(rtwdev, RTW_DBG_BF, "remove as a su bfee\n"); - rtw_write8(rtwdev, REG_SND_PTCL_CTRL, RTW_SND_CTRL_REMOVE); + rtw_write8_mask(rtwdev, REG_SND_PTCL_CTRL, BIT_MASK_BEAMFORM, + RTW_SND_CTRL_REMOVE); switch (bfee->su_reg_index) { case 0: @@ -298,7 +310,8 @@ void rtw_bf_remove_bfee_mu(struct rtw_dev *rtwdev, { struct rtw_bf_info *bfinfo = &rtwdev->bf_info; - rtw_write8(rtwdev, REG_SND_PTCL_CTRL, RTW_SND_CTRL_REMOVE); + rtw_write8_mask(rtwdev, REG_SND_PTCL_CTRL, BIT_MASK_BEAMFORM, + RTW_SND_CTRL_REMOVE); rtw_bf_del_bfer_entry_mu(rtwdev); diff --git a/drivers/net/wireless/realtek/rtw88/bf.h b/drivers/net/wireless/realtek/rtw88/bf.h index 17855edb50..7b40c2c038 100644 --- a/drivers/net/wireless/realtek/rtw88/bf.h +++ b/drivers/net/wireless/realtek/rtw88/bf.h @@ -13,6 +13,9 @@ #define REG_ASSOCIATED_BFMER1_INFO 0x06EC #define REG_TX_CSI_RPT_PARAM_BW20 0x06F4 #define REG_SND_PTCL_CTRL 0x0718 +#define BIT_DIS_CHK_VHTSIGB_CRC BIT(6) +#define BIT_DIS_CHK_VHTSIGA_CRC BIT(5) +#define BIT_MASK_BEAMFORM (GENMASK(4, 0) | BIT(7)) #define REG_MU_TX_CTL 0x14C0 #define REG_MU_STA_GID_VLD 0x14C4 #define REG_MU_STA_USER_POS_INFO 0x14C8 @@ -42,8 +45,8 @@ #define BIT_RXFLTMAP4_BF_REPORT_POLL BIT(4) #define RTW_NDP_RX_STANDBY_TIME 0x70 -#define RTW_SND_CTRL_REMOVE 0xD8 -#define RTW_SND_CTRL_SOUNDING 0xDB +#define RTW_SND_CTRL_REMOVE 0x98 +#define RTW_SND_CTRL_SOUNDING 0x9B enum csi_seg_len { HAL_CSI_SEG_4K = 0, diff --git a/drivers/net/wireless/realtek/rtw88/bitfield.h b/drivers/net/wireless/realtek/rtw88/bitfield.h new file mode 100644 index 0000000000..230d2383b1 --- /dev/null +++ b/drivers/net/wireless/realtek/rtw88/bitfield.h @@ -0,0 +1,155 @@ +/* + * Copyright (C) 2014 Felix Fietkau + * Copyright (C) 2004 - 2009 Ivo van Doorn + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _LINUX_BITFIELD_H +#define _LINUX_BITFIELD_H + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 13, 0) +#include +#endif +#include + +/* + * Bitfield access macros + * + * FIELD_{GET,PREP} macros take as first parameter shifted mask + * from which they extract the base mask and shift amount. + * Mask must be a compilation time constant. + * + * Example: + * + * #define REG_FIELD_A GENMASK(6, 0) + * #define REG_FIELD_B BIT(7) + * #define REG_FIELD_C GENMASK(15, 8) + * #define REG_FIELD_D GENMASK(31, 16) + * + * Get: + * a = FIELD_GET(REG_FIELD_A, reg); + * b = FIELD_GET(REG_FIELD_B, reg); + * + * Set: + * reg = FIELD_PREP(REG_FIELD_A, 1) | + * FIELD_PREP(REG_FIELD_B, 0) | + * FIELD_PREP(REG_FIELD_C, c) | + * FIELD_PREP(REG_FIELD_D, 0x40); + * + * Modify: + * reg &= ~REG_FIELD_C; + * reg |= FIELD_PREP(REG_FIELD_C, c); + */ + +#define __bf_shf(x) (__builtin_ffsll(x) - 1) + +#define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx) \ + ({ \ + BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \ + _pfx "mask is not constant"); \ + BUILD_BUG_ON_MSG((_mask) == 0, _pfx "mask is zero"); \ + BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \ + ~((_mask) >> __bf_shf(_mask)) & (_val) : 0, \ + _pfx "value too large for the field"); \ + BUILD_BUG_ON_MSG((_mask) > (typeof(_reg))~0ull, \ + _pfx "type of reg too small for mask"); \ + __BUILD_BUG_ON_NOT_POWER_OF_2((_mask) + \ + (1ULL << __bf_shf(_mask))); \ + }) + +/** + * FIELD_FIT() - check if value fits in the field + * @_mask: shifted mask defining the field's length and position + * @_val: value to test against the field + * + * Return: true if @_val can fit inside @_mask, false if @_val is too big. + */ +#define FIELD_FIT(_mask, _val) \ + ({ \ + __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_FIT: "); \ + !((((typeof(_mask))_val) << __bf_shf(_mask)) & ~(_mask)); \ + }) + +/** + * FIELD_PREP() - prepare a bitfield element + * @_mask: shifted mask defining the field's length and position + * @_val: value to put in the field + * + * FIELD_PREP() masks and shifts up the value. The result should + * be combined with other fields of the bitfield using logical OR. + */ +#define FIELD_PREP(_mask, _val) \ + ({ \ + __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \ + ((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask); \ + }) + +/** + * FIELD_GET() - extract a bitfield element + * @_mask: shifted mask defining the field's length and position + * @_reg: value of entire bitfield + * + * FIELD_GET() extracts the field specified by @_mask from the + * bitfield passed in as @_reg by masking and shifting it down. + */ +#define FIELD_GET(_mask, _reg) \ + ({ \ + __BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \ + (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \ + }) + +extern void __compiletime_error("value doesn't fit into mask") +__field_overflow(void); +extern void __compiletime_error("bad bitfield mask") +__bad_mask(void); +static __always_inline u64 field_multiplier(u64 field) +{ + if ((field | (field - 1)) & ((field | (field - 1)) + 1)) + __bad_mask(); + return field & -field; +} +static __always_inline u64 field_mask(u64 field) +{ + return field / field_multiplier(field); +} +#define ____MAKE_OP(type,base,to,from) \ +static __always_inline __##type type##_encode_bits(base v, base field) \ +{ \ + if (__builtin_constant_p(v) && (v & ~field_mask(field))) \ + __field_overflow(); \ + return to((v & field_mask(field)) * field_multiplier(field)); \ +} \ +static __always_inline __##type type##_replace_bits(__##type old, \ + base val, base field) \ +{ \ + return (old & ~to(field)) | type##_encode_bits(val, field); \ +} \ +static __always_inline void type##p_replace_bits(__##type *p, \ + base val, base field) \ +{ \ + *p = (*p & ~to(field)) | type##_encode_bits(val, field); \ +} \ +static __always_inline base type##_get_bits(__##type v, base field) \ +{ \ + return (from(v) & field)/field_multiplier(field); \ +} +#define __MAKE_OP(size) \ + ____MAKE_OP(le##size,u##size,cpu_to_le##size,le##size##_to_cpu) \ + ____MAKE_OP(be##size,u##size,cpu_to_be##size,be##size##_to_cpu) \ + ____MAKE_OP(u##size,u##size,,) +____MAKE_OP(u8,u8,,) +__MAKE_OP(16) +__MAKE_OP(32) +__MAKE_OP(64) +#undef __MAKE_OP +#undef ____MAKE_OP + +#endif diff --git a/drivers/net/wireless/realtek/rtw88/coex.c b/drivers/net/wireless/realtek/rtw88/coex.c index aa08fd7d9f..86467d2f88 100644 --- a/drivers/net/wireless/realtek/rtw88/coex.c +++ b/drivers/net/wireless/realtek/rtw88/coex.c @@ -8,11 +8,12 @@ #include "ps.h" #include "debug.h" #include "reg.h" +#include "phy.h" static u8 rtw_coex_next_rssi_state(struct rtw_dev *rtwdev, u8 pre_state, u8 rssi, u8 rssi_thresh) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; u8 tol = chip->rssi_tolerance; u8 next_state; @@ -35,10 +36,10 @@ static u8 rtw_coex_next_rssi_state(struct rtw_dev *rtwdev, u8 pre_state, static void rtw_coex_limited_tx(struct rtw_dev *rtwdev, bool tx_limit_en, bool ampdu_limit_en) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; - bool wifi_under_b_mode = false; + u8 num_of_active_port = 1; if (!chip->scbd_support) return; @@ -70,17 +71,13 @@ static void rtw_coex_limited_tx(struct rtw_dev *rtwdev, /* set queue life time to avoid can't reach tx retry limit * if tx is always broken by GNT_BT */ - rtw_write8_set(rtwdev, REG_LIFETIME_EN, 0xf); + if (num_of_active_port <= 1) + rtw_write8_set(rtwdev, REG_LIFETIME_EN, 0xf); rtw_write16(rtwdev, REG_RETRY_LIMIT, 0x0808); /* auto rate fallback step within 8 retries */ - if (wifi_under_b_mode) { - rtw_write32(rtwdev, REG_DARFRC, 0x1000000); - rtw_write32(rtwdev, REG_DARFRCH, 0x1010101); - } else { - rtw_write32(rtwdev, REG_DARFRC, 0x1000000); - rtw_write32(rtwdev, REG_DARFRCH, 0x4030201); - } + rtw_write32(rtwdev, REG_DARFRC, 0x1000000); + rtw_write32(rtwdev, REG_DARFRCH, 0x4030201); } else { rtw_write8_clr(rtwdev, REG_TX_HANG_CTRL, BIT_EN_GNT_BT_AWAKE); rtw_write8_clr(rtwdev, REG_LIFETIME_EN, 0xf); @@ -101,39 +98,84 @@ static void rtw_coex_limited_wl(struct rtw_dev *rtwdev) { struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_dm *coex_dm = &coex->dm; - struct rtw_coex_stat *coex_stat = &coex->stat; bool tx_limit = false; bool tx_agg_ctrl = false; - if (coex->under_5g || - coex_dm->bt_status == COEX_BTSTATUS_NCON_IDLE) { - /* no need to limit tx */ - } else { + if (!coex->under_5g && coex_dm->bt_status != COEX_BTSTATUS_NCON_IDLE) { tx_limit = true; - if (coex_stat->bt_hid_exist || coex_stat->bt_hfp_exist || - coex_stat->bt_hid_pair_num > 0) - tx_agg_ctrl = true; + tx_agg_ctrl = true; } rtw_coex_limited_tx(rtwdev, tx_limit, tx_agg_ctrl); } -static void rtw_coex_wl_ccklock_action(struct rtw_dev *rtwdev) +static bool rtw_coex_freerun_check(struct rtw_dev *rtwdev) +{ + struct rtw_coex *coex = &rtwdev->coex; + struct rtw_coex_dm *coex_dm = &coex->dm; + struct rtw_coex_stat *coex_stat = &coex->stat; + struct rtw_efuse *efuse = &rtwdev->efuse; + u8 bt_rssi; + u8 ant_distance = 10; + + if (coex_stat->bt_disabled) + return false; + + if (efuse->share_ant || ant_distance <= 5 || !coex_stat->wl_gl_busy) + return false; + + if (ant_distance >= 40 || coex_stat->bt_hid_pair_num >= 2) + return true; + + /* ant_distance = 5 ~ 40 */ + if (COEX_RSSI_HIGH(coex_dm->wl_rssi_state[1]) && + COEX_RSSI_HIGH(coex_dm->bt_rssi_state[0])) + return true; + + if (coex_stat->wl_tput_dir == COEX_WL_TPUT_TX) + bt_rssi = coex_dm->bt_rssi_state[0]; + else + bt_rssi = coex_dm->bt_rssi_state[1]; + + if (COEX_RSSI_HIGH(coex_dm->wl_rssi_state[3]) && + COEX_RSSI_HIGH(bt_rssi) && + coex_stat->cnt_wl[COEX_CNT_WL_SCANAP] <= 5) + return true; + + return false; +} + +static void rtw_coex_wl_slot_extend(struct rtw_dev *rtwdev, bool enable) { struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; u8 para[6] = {0}; - if (coex->stop_dm) + para[0] = COEX_H2C69_WL_LEAKAP; + para[1] = PARA1_H2C69_DIS_5MS; + + if (enable) + para[1] = PARA1_H2C69_EN_5MS; + else + coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] = 0; + + coex_stat->wl_slot_extend = enable; + rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]); +} + +static void rtw_coex_wl_ccklock_action(struct rtw_dev *rtwdev) +{ + struct rtw_coex *coex = &rtwdev->coex; + struct rtw_coex_stat *coex_stat = &coex->stat; + + if (coex->manual_control || coex->stop_dm) return; - para[0] = COEX_H2C69_WL_LEAKAP; if (coex_stat->tdma_timer_base == 3 && coex_stat->wl_slot_extend) { - para[1] = PARA1_H2C69_DIS_5MS; /* disable 5ms extend */ - rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]); - coex_stat->wl_slot_extend = false; - coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] = 0; + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], set h2c 0x69 opcode 12 to turn off 5ms WL slot extend!!\n"); + rtw_coex_wl_slot_extend(rtwdev, false); return; } @@ -144,16 +186,20 @@ static void rtw_coex_wl_ccklock_action(struct rtw_dev *rtwdev) else coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] = 0; + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], 5ms WL slot extend cnt = %d!!\n", + coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND]); + if (coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] == 7) { - para[1] = 0x1; /* disable 5ms extend */ - rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]); - coex_stat->wl_slot_extend = false; - coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] = 0; + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], set h2c 0x69 opcode 12 to turn off 5ms WL slot extend!!\n"); + rtw_coex_wl_slot_extend(rtwdev, false); } } else if (!coex_stat->wl_slot_extend && coex_stat->wl_cck_lock) { - para[1] = 0x0; /* enable 5ms extend */ - rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]); - coex_stat->wl_slot_extend = true; + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], set h2c 0x69 opcode 12 to turn on 5ms WL slot extend!!\n"); + + rtw_coex_wl_slot_extend(rtwdev, true); } } @@ -161,11 +207,52 @@ static void rtw_coex_wl_ccklock_detect(struct rtw_dev *rtwdev) { struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; + struct rtw_coex_dm *coex_dm = &coex->dm; - /* TODO: wait for rx_rate_change_notify implement */ - coex_stat->wl_cck_lock = false; - coex_stat->wl_cck_lock_pre = false; - coex_stat->wl_cck_lock_ever = false; + bool is_cck_lock_rate = false; + + if (coex_stat->wl_coex_mode != COEX_WLINK_2G1PORT && + coex_stat->wl_coex_mode != COEX_WLINK_2GFREE) + return; + + if (coex_dm->bt_status == COEX_BTSTATUS_INQ_PAGE || + coex_stat->bt_setup_link) { + coex_stat->wl_cck_lock = false; + coex_stat->wl_cck_lock_pre = false; + return; + } + + if (coex_stat->wl_rx_rate <= COEX_CCK_2 || + coex_stat->wl_rts_rx_rate <= COEX_CCK_2) + is_cck_lock_rate = true; + + if (coex_stat->wl_connected && coex_stat->wl_gl_busy && + COEX_RSSI_HIGH(coex_dm->wl_rssi_state[3]) && + (coex_dm->bt_status == COEX_BTSTATUS_ACL_BUSY || + coex_dm->bt_status == COEX_BTSTATUS_ACL_SCO_BUSY || + coex_dm->bt_status == COEX_BTSTATUS_SCO_BUSY)) { + if (is_cck_lock_rate) { + coex_stat->wl_cck_lock = true; + + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], cck locking...\n"); + + } else { + coex_stat->wl_cck_lock = false; + + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], cck unlock...\n"); + } + } else { + coex_stat->wl_cck_lock = false; + } + + /* CCK lock identification */ + if (coex_stat->wl_cck_lock && !coex_stat->wl_cck_lock_pre) + ieee80211_queue_delayed_work(rtwdev->hw, &coex->wl_ccklock_work, + 3 * HZ); + + coex_stat->wl_cck_lock_pre = coex_stat->wl_cck_lock; } static void rtw_coex_wl_noisy_detect(struct rtw_dev *rtwdev) @@ -174,11 +261,12 @@ static void rtw_coex_wl_noisy_detect(struct rtw_dev *rtwdev) struct rtw_coex_stat *coex_stat = &coex->stat; struct rtw_dm_info *dm_info = &rtwdev->dm_info; u32 cnt_cck; + bool wl_cck_lock = false; /* wifi noisy environment identification */ cnt_cck = dm_info->cck_ok_cnt + dm_info->cck_err_cnt; - if (!coex_stat->wl_gl_busy) { + if (!coex_stat->wl_gl_busy && !wl_cck_lock) { if (cnt_cck > 250) { if (coex_stat->cnt_wl[COEX_CNT_WL_NOISY2] < 5) coex_stat->cnt_wl[COEX_CNT_WL_NOISY2]++; @@ -211,6 +299,9 @@ static void rtw_coex_wl_noisy_detect(struct rtw_dev *rtwdev) coex_stat->wl_noisy_level = 1; else coex_stat->wl_noisy_level = 0; + + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], wl_noisy_level = %d\n", + coex_stat->wl_noisy_level); } } @@ -219,6 +310,8 @@ static void rtw_coex_tdma_timer_base(struct rtw_dev *rtwdev, u8 type) struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; u8 para[2] = {0}; + u8 times; + u16 tbtt_interval = coex_stat->wl_beacon_interval; if (coex_stat->tdma_timer_base == type) return; @@ -227,13 +320,33 @@ static void rtw_coex_tdma_timer_base(struct rtw_dev *rtwdev, u8 type) para[0] = COEX_H2C69_TDMA_SLOT; - if (type == 3) /* 4-slot */ + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], tbtt_interval = %d\n", + tbtt_interval); + + if (type == TDMA_TIMER_TYPE_4SLOT && tbtt_interval < 120) { para[1] = PARA1_H2C69_TDMA_4SLOT; /* 4-slot */ - else /* 2-slot */ + } else if (tbtt_interval < 80 && tbtt_interval > 0) { + times = 100 / tbtt_interval; + if (100 % tbtt_interval != 0) + times++; + + para[1] = FIELD_PREP(PARA1_H2C69_TBTT_TIMES, times); + } else if (tbtt_interval >= 180) { + times = tbtt_interval / 100; + if (tbtt_interval % 100 <= 80) + times--; + + para[1] = FIELD_PREP(PARA1_H2C69_TBTT_TIMES, times) | + FIELD_PREP(PARA1_H2C69_TBTT_DIV100, 1); + } else { para[1] = PARA1_H2C69_TDMA_2SLOT; + } rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]); + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s(): h2c_0x69 = 0x%x\n", + __func__, para[1]); + /* no 5ms_wl_slot_extend for 4-slot mode */ if (coex_stat->tdma_timer_base == 3) rtw_coex_wl_ccklock_action(rtwdev); @@ -252,7 +365,7 @@ static void rtw_coex_set_wl_pri_mask(struct rtw_dev *rtwdev, u8 bitmap, void rtw_coex_write_scbd(struct rtw_dev *rtwdev, u16 bitpos, bool set) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; u16 val = 0x2; @@ -287,7 +400,7 @@ EXPORT_SYMBOL(rtw_coex_write_scbd); static u16 rtw_coex_read_scbd(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; if (!chip->scbd_support) return 0; @@ -297,7 +410,7 @@ static u16 rtw_coex_read_scbd(struct rtw_dev *rtwdev) static void rtw_coex_check_rfk(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; struct rtw_coex_rfe *coex_rfe = &coex->rfe; @@ -307,6 +420,9 @@ static void rtw_coex_check_rfk(struct rtw_dev *rtwdev) if (coex_rfe->wlg_at_btg && chip->scbd_support && coex_stat->bt_iqk_state != 0xff) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], (Before Ant Setup) Delay by IQK\n"); + wait_cnt = COEX_RFK_TIMEOUT / COEX_MIN_DELAY; do { /* BT RFK */ @@ -318,6 +434,10 @@ static void rtw_coex_check_rfk(struct rtw_dev *rtwdev) if (!btk && !wlk) break; + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], (Before Ant Setup) wlk = %d, btk = %d\n", + wlk, btk); + mdelay(COEX_MIN_DELAY); } while (++cnt < wait_cnt); @@ -334,12 +454,42 @@ static void rtw_coex_query_bt_info(struct rtw_dev *rtwdev) if (coex_stat->bt_disabled) return; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + rtw_fw_query_bt_info(rtwdev); } +static void rtw_coex_gnt_workaround(struct rtw_dev *rtwdev, bool force, u8 mode) +{ + rtw_coex_set_gnt_fix(rtwdev); +} + +static void rtw_coex_monitor_bt_ctr(struct rtw_dev *rtwdev) +{ + struct rtw_coex *coex = &rtwdev->coex; + struct rtw_coex_stat *coex_stat = &coex->stat; + u32 tmp; + + tmp = rtw_read32(rtwdev, REG_BT_ACT_STATISTICS); + coex_stat->hi_pri_tx = FIELD_GET(MASKLWORD, tmp); + coex_stat->hi_pri_rx = FIELD_GET(MASKHWORD, tmp); + + tmp = rtw_read32(rtwdev, REG_BT_ACT_STATISTICS_1); + coex_stat->lo_pri_tx = FIELD_GET(MASKLWORD, tmp); + coex_stat->lo_pri_rx = FIELD_GET(MASKHWORD, tmp); + + rtw_write8(rtwdev, REG_BT_COEX_ENH_INTR_CTRL, + BIT_R_GRANTALL_WLMASK | BIT_STATIS_BT_EN); + + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n", + coex_stat->hi_pri_rx, coex_stat->hi_pri_tx, + coex_stat->lo_pri_rx, coex_stat->lo_pri_tx); +} + static void rtw_coex_monitor_bt_enable(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; struct rtw_coex_dm *coex_dm = &coex->dm; @@ -352,30 +502,32 @@ static void rtw_coex_monitor_bt_enable(struct rtw_dev *rtwdev) } if (coex_stat->bt_disabled != bt_disabled) { - rtw_dbg(rtwdev, RTW_DBG_COEX, "coex: BT state changed (%d) -> (%d)\n", + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], BT state changed (%d) -> (%d)\n", coex_stat->bt_disabled, bt_disabled); coex_stat->bt_disabled = bt_disabled; coex_stat->bt_ble_scan_type = 0; coex_dm->cur_bt_lna_lvl = 0; - } - if (!coex_stat->bt_disabled) { - coex_stat->bt_reenable = true; - ieee80211_queue_delayed_work(rtwdev->hw, - &coex->bt_reenable_work, 15 * HZ); - } else { - coex_stat->bt_mailbox_reply = false; - coex_stat->bt_reenable = false; + if (!coex_stat->bt_disabled) { + coex_stat->bt_reenable = true; + ieee80211_queue_delayed_work(rtwdev->hw, + &coex->bt_reenable_work, + 15 * HZ); + } else { + coex_stat->bt_mailbox_reply = false; + coex_stat->bt_reenable = false; + } } } static void rtw_coex_update_wl_link_info(struct rtw_dev *rtwdev, u8 reason) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; struct rtw_coex_dm *coex_dm = &coex->dm; - struct rtw_chip_info *chip = rtwdev->chip; struct rtw_traffic_stats *stats = &rtwdev->stats; bool is_5G = false; bool wl_busy = false; @@ -420,6 +572,12 @@ static void rtw_coex_update_wl_link_info(struct rtw_dev *rtwdev, u8 reason) coex_dm->wl_rssi_state[i] = rssi_state; } + if (coex_stat->wl_linkscan_proc || coex_stat->wl_hi_pri_task1 || + coex_stat->wl_hi_pri_task2 || coex_stat->wl_gl_busy) + rtw_coex_write_scbd(rtwdev, COEX_SCBD_SCAN, true); + else + rtw_coex_write_scbd(rtwdev, COEX_SCBD_SCAN, false); + switch (reason) { case COEX_RSN_5GSCANSTART: case COEX_RSN_5GSWITCHBAND: @@ -460,8 +618,10 @@ void rtw_coex_info_response(struct rtw_dev *rtwdev, struct sk_buff *skb) struct rtw_coex *coex = &rtwdev->coex; u8 *payload = get_payload_from_coex_resp(skb); - if (payload[0] != COEX_RESP_ACK_BY_WL_FW) + if (payload[0] != COEX_RESP_ACK_BY_WL_FW) { + dev_kfree_skb_any(skb); return; + } skb_queue_tail(&coex->queue, skb); wake_up(&coex->wait); @@ -473,7 +633,7 @@ static struct sk_buff *rtw_coex_info_request(struct rtw_dev *rtwdev, struct rtw_coex *coex = &rtwdev->coex; struct sk_buff *skb_resp = NULL; - mutex_lock(&coex->mutex); + lockdep_assert_held(&rtwdev->mutex); rtw_fw_query_bt_mp_info(rtwdev, req); @@ -490,7 +650,6 @@ static struct sk_buff *rtw_coex_info_request(struct rtw_dev *rtwdev, } out: - mutex_unlock(&coex->mutex); return skb_resp; } @@ -499,20 +658,16 @@ static bool rtw_coex_get_bt_scan_type(struct rtw_dev *rtwdev, u8 *scan_type) struct rtw_coex_info_req req = {0}; struct sk_buff *skb; u8 *payload; - bool ret = false; req.op_code = BT_MP_INFO_OP_SCAN_TYPE; skb = rtw_coex_info_request(rtwdev, &req); if (!skb) - goto out; + return false; payload = get_payload_from_coex_resp(skb); *scan_type = GET_COEX_RESP_BT_SCAN_TYPE(payload); dev_kfree_skb_any(skb); - ret = true; - -out: - return ret; + return true; } static bool rtw_coex_set_lna_constrain_level(struct rtw_dev *rtwdev, @@ -520,27 +675,40 @@ static bool rtw_coex_set_lna_constrain_level(struct rtw_dev *rtwdev, { struct rtw_coex_info_req req = {0}; struct sk_buff *skb; - bool ret = false; req.op_code = BT_MP_INFO_OP_LNA_CONSTRAINT; req.para1 = lna_constrain_level; skb = rtw_coex_info_request(rtwdev, &req); if (!skb) - goto out; + return false; dev_kfree_skb_any(skb); - ret = true; + return true; +} -out: - return ret; +#define case_BTSTATUS(src) \ + case COEX_BTSTATUS_##src: return #src + +static const char *rtw_coex_get_bt_status_string(u8 bt_status) +{ + switch (bt_status) { + case_BTSTATUS(NCON_IDLE); + case_BTSTATUS(CON_IDLE); + case_BTSTATUS(INQ_PAGE); + case_BTSTATUS(ACL_BUSY); + case_BTSTATUS(SCO_BUSY); + case_BTSTATUS(ACL_SCO_BUSY); + default: + return "Unknown"; + } } static void rtw_coex_update_bt_link_info(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; struct rtw_coex_dm *coex_dm = &coex->dm; - struct rtw_chip_info *chip = rtwdev->chip; u8 i; u8 rssi_state; u8 rssi_step; @@ -551,20 +719,11 @@ static void rtw_coex_update_bt_link_info(struct rtw_dev *rtwdev) rssi_state = coex_dm->bt_rssi_state[i]; rssi_step = chip->bt_rssi_step[i]; rssi = coex_stat->bt_rssi; - rssi_state = rtw_coex_next_rssi_state(rtwdev, rssi_state, - rssi, rssi_step); + rssi_state = rtw_coex_next_rssi_state(rtwdev, rssi_state, rssi, + rssi_step); coex_dm->bt_rssi_state[i] = rssi_state; } - for (i = 0; i < COEX_RSSI_STEP; i++) { - rssi_state = coex_dm->wl_rssi_state[i]; - rssi_step = chip->wl_rssi_step[i]; - rssi = rtwdev->dm_info.min_rssi; - rssi_state = rtw_coex_next_rssi_state(rtwdev, rssi_state, - rssi, rssi_step); - coex_dm->wl_rssi_state[i] = rssi_state; - } - if (coex_stat->bt_ble_scan_en && coex_stat->cnt_bt[COEX_CNT_BT_INFOUPDATE] % 3 == 0) { u8 scan_type; @@ -623,6 +782,7 @@ static void rtw_coex_update_bt_link_info(struct rtw_dev *rtwdev) coex_dm->bt_status = COEX_BTSTATUS_INQ_PAGE; } else if (!(coex_stat->bt_info_lb2 & COEX_INFO_CONNECTION)) { coex_dm->bt_status = COEX_BTSTATUS_NCON_IDLE; + coex_stat->bt_multi_link_remain = false; } else if (coex_stat->bt_info_lb2 == COEX_INFO_CONNECTION) { coex_dm->bt_status = COEX_BTSTATUS_CON_IDLE; } else if ((coex_stat->bt_info_lb2 & COEX_INFO_SCO_ESCO) || @@ -639,14 +799,16 @@ static void rtw_coex_update_bt_link_info(struct rtw_dev *rtwdev) coex_stat->cnt_bt[COEX_CNT_BT_INFOUPDATE]++; - rtw_dbg(rtwdev, RTW_DBG_COEX, "coex: bt status(%d)\n", coex_dm->bt_status); + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s(), %s!!!\n", __func__, + rtw_coex_get_bt_status_string(coex_dm->bt_status)); } static void rtw_coex_update_wl_ch_info(struct rtw_dev *rtwdev, u8 type) { - struct rtw_chip_info *chip = rtwdev->chip; - struct rtw_coex_dm *coex_dm = &rtwdev->coex.dm; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_efuse *efuse = &rtwdev->efuse; + struct rtw_coex_dm *coex_dm = &rtwdev->coex.dm; + struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat; u8 link = 0; u8 center_chan = 0; u8 bw; @@ -657,8 +819,12 @@ static void rtw_coex_update_wl_ch_info(struct rtw_dev *rtwdev, u8 type) if (type != COEX_MEDIA_DISCONNECT) center_chan = rtwdev->hal.current_channel; - if (center_chan == 0 || (efuse->share_ant && center_chan <= 14)) { + if (center_chan == 0 || + (efuse->share_ant && center_chan <= 14 && + coex_stat->wl_coex_mode != COEX_WLINK_2GFREE)) { link = 0; + center_chan = 0; + bw = 0; } else if (center_chan <= 14) { link = 0x1; @@ -682,6 +848,9 @@ static void rtw_coex_update_wl_ch_info(struct rtw_dev *rtwdev, u8 type) coex_dm->wl_ch_info[2] = bw; rtw_fw_wl_ch_info(rtwdev, link, center_chan, bw); + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s: para[0:2] = 0x%x 0x%x 0x%x\n", __func__, link, + center_chan, bw); } static void rtw_coex_set_bt_tx_power(struct rtw_dev *rtwdev, u8 bt_pwr_dec_lvl) @@ -714,6 +883,8 @@ static void rtw_coex_set_bt_rx_gain(struct rtw_dev *rtwdev, u8 bt_lna_lvl) } else { rtw_coex_write_scbd(rtwdev, COEX_SCBD_RXGAIN, false); } + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s(): bt_rx_LNA_level = %d\n", + __func__, bt_lna_lvl); } static void rtw_coex_set_rf_para(struct rtw_dev *rtwdev, @@ -723,7 +894,7 @@ static void rtw_coex_set_rf_para(struct rtw_dev *rtwdev, struct rtw_coex_stat *coex_stat = &coex->stat; u8 offset = 0; - if (coex->freerun && coex_stat->wl_noisy_level <= 1) + if (coex->freerun && coex_stat->cnt_wl[COEX_CNT_WL_SCANAP] <= 5) offset = 3; rtw_coex_set_wl_tx_power(rtwdev, para.wl_pwr_dec_lvl); @@ -761,15 +932,17 @@ EXPORT_SYMBOL(rtw_coex_write_indirect_reg); static void rtw_coex_coex_ctrl_owner(struct rtw_dev *rtwdev, bool wifi_control) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; const struct rtw_hw_reg *btg_reg = chip->btg_reg; if (wifi_control) { - rtw_write32_set(rtwdev, REG_SYS_SDIO_CTRL, BIT_LTE_MUX_CTRL_PATH); + rtw_write8_set(rtwdev, REG_SYS_SDIO_CTRL + 3, + BIT_LTE_MUX_CTRL_PATH >> 24); if (btg_reg) rtw_write8_set(rtwdev, btg_reg->addr, btg_reg->mask); } else { - rtw_write32_clr(rtwdev, REG_SYS_SDIO_CTRL, BIT_LTE_MUX_CTRL_PATH); + rtw_write8_clr(rtwdev, REG_SYS_SDIO_CTRL + 3, + BIT_LTE_MUX_CTRL_PATH >> 24); if (btg_reg) rtw_write8_clr(rtwdev, btg_reg->addr, btg_reg->mask); } @@ -777,52 +950,151 @@ static void rtw_coex_coex_ctrl_owner(struct rtw_dev *rtwdev, bool wifi_control) static void rtw_coex_set_gnt_bt(struct rtw_dev *rtwdev, u8 state) { - rtw_coex_write_indirect_reg(rtwdev, 0x38, 0xc000, state); - rtw_coex_write_indirect_reg(rtwdev, 0x38, 0x0c00, state); + rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, 0xc000, state); + rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, 0x0c00, state); } static void rtw_coex_set_gnt_wl(struct rtw_dev *rtwdev, u8 state) { - rtw_coex_write_indirect_reg(rtwdev, 0x38, 0x3000, state); - rtw_coex_write_indirect_reg(rtwdev, 0x38, 0x0300, state); + rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, 0x3000, state); + rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, 0x0300, state); +} + +static void rtw_coex_mimo_ps(struct rtw_dev *rtwdev, bool force, bool state) +{ + struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat; + + if (!force && state == coex_stat->wl_mimo_ps) + return; + + coex_stat->wl_mimo_ps = state; + + rtw_set_txrx_1ss(rtwdev, state); + + rtw_coex_update_wl_ch_info(rtwdev, (u8)coex_stat->wl_connected); + + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s(): state = %d\n", __func__, state); } -static void rtw_coex_set_table(struct rtw_dev *rtwdev, u32 table0, u32 table1) +static void rtw_btc_wltoggle_table_a(struct rtw_dev *rtwdev, bool force, + u8 table_case) { -#define DEF_BRK_TABLE_VAL 0xf0ffffff + const struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_efuse *efuse = &rtwdev->efuse; + u8 h2c_para[6] = {0}; + u32 table_wl = 0x5a5a5a5a; + + h2c_para[0] = COEX_H2C69_TOGGLE_TABLE_A; + /* no definition */ + h2c_para[1] = 0x1; + + if (efuse->share_ant) { + if (table_case < chip->table_sant_num) + table_wl = chip->table_sant[table_case].wl; + } else { + if (table_case < chip->table_nsant_num) + table_wl = chip->table_nsant[table_case].wl; + } + + /* tell WL FW WL slot toggle table-A*/ + h2c_para[2] = (u8)u32_get_bits(table_wl, GENMASK(7, 0)); + h2c_para[3] = (u8)u32_get_bits(table_wl, GENMASK(15, 8)); + h2c_para[4] = (u8)u32_get_bits(table_wl, GENMASK(23, 16)); + h2c_para[5] = (u8)u32_get_bits(table_wl, GENMASK(31, 24)); + + rtw_fw_bt_wifi_control(rtwdev, h2c_para[0], &h2c_para[1]); + + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s(): H2C = [%02x %02x %02x %02x %02x %02x]\n", + __func__, h2c_para[0], h2c_para[1], h2c_para[2], + h2c_para[3], h2c_para[4], h2c_para[5]); +} + +#define COEX_WL_SLOT_TOGLLE 0x5a5a5aaa +static void rtw_btc_wltoggle_table_b(struct rtw_dev *rtwdev, bool force, + u8 interval, u32 table) +{ + struct rtw_coex *coex = &rtwdev->coex; + struct rtw_coex_stat *coex_stat = &coex->stat; + u8 cur_h2c_para[6] = {0}; + u8 i; + + cur_h2c_para[0] = COEX_H2C69_TOGGLE_TABLE_B; + cur_h2c_para[1] = interval; + cur_h2c_para[2] = (u8)u32_get_bits(table, GENMASK(7, 0)); + cur_h2c_para[3] = (u8)u32_get_bits(table, GENMASK(15, 8)); + cur_h2c_para[4] = (u8)u32_get_bits(table, GENMASK(23, 16)); + cur_h2c_para[5] = (u8)u32_get_bits(table, GENMASK(31, 24)); + + coex_stat->wl_toggle_interval = interval; + + for (i = 0; i <= 5; i++) + coex_stat->wl_toggle_para[i] = cur_h2c_para[i]; + + rtw_fw_bt_wifi_control(rtwdev, cur_h2c_para[0], &cur_h2c_para[1]); + + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s(): H2C = [%02x %02x %02x %02x %02x %02x]\n", + __func__, cur_h2c_para[0], cur_h2c_para[1], cur_h2c_para[2], + cur_h2c_para[3], cur_h2c_para[4], cur_h2c_para[5]); +} + +static void rtw_coex_set_table(struct rtw_dev *rtwdev, bool force, u32 table0, + u32 table1) +{ +#define DEF_BRK_TABLE_VAL 0xf0ffffff + struct rtw_coex *coex = &rtwdev->coex; + struct rtw_coex_dm *coex_dm = &coex->dm; + + /* If last tdma is wl slot toggle, force write table*/ + if (!force && coex_dm->reason != COEX_RSN_LPS) { + if (table0 == rtw_read32(rtwdev, REG_BT_COEX_TABLE0) && + table1 == rtw_read32(rtwdev, REG_BT_COEX_TABLE1)) + return; + } rtw_write32(rtwdev, REG_BT_COEX_TABLE0, table0); rtw_write32(rtwdev, REG_BT_COEX_TABLE1, table1); rtw_write32(rtwdev, REG_BT_COEX_BRK_TABLE, DEF_BRK_TABLE_VAL); + + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s(): 0x6c0 = %x, 0x6c4 = %x\n", __func__, table0, + table1); } -static void rtw_coex_table(struct rtw_dev *rtwdev, u8 type) +static void rtw_coex_table(struct rtw_dev *rtwdev, bool force, u8 type) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_dm *coex_dm = &coex->dm; - struct rtw_chip_info *chip = rtwdev->chip; struct rtw_efuse *efuse = &rtwdev->efuse; + struct rtw_coex_stat *coex_stat = &coex->stat; coex_dm->cur_table = type; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], Coex_Table - %d\n", type); + if (efuse->share_ant) { if (type < chip->table_sant_num) - rtw_coex_set_table(rtwdev, + rtw_coex_set_table(rtwdev, force, chip->table_sant[type].bt, chip->table_sant[type].wl); } else { type = type - 100; if (type < chip->table_nsant_num) - rtw_coex_set_table(rtwdev, + rtw_coex_set_table(rtwdev, force, chip->table_nsant[type].bt, chip->table_nsant[type].wl); } + if (coex_stat->wl_slot_toggle_change) + rtw_btc_wltoggle_table_a(rtwdev, true, type); } static void rtw_coex_ignore_wlan_act(struct rtw_dev *rtwdev, bool enable) { struct rtw_coex *coex = &rtwdev->coex; - if (coex->stop_dm) + if (coex->manual_control || coex->stop_dm) return; rtw_fw_bt_ignore_wlan_action(rtwdev, enable); @@ -841,15 +1113,18 @@ static void rtw_coex_power_save_state(struct rtw_dev *rtwdev, u8 ps_type, case COEX_PS_WIFI_NATIVE: /* recover to original 32k low power setting */ coex_stat->wl_force_lps_ctrl = false; - + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s(): COEX_PS_WIFI_NATIVE\n", __func__); rtw_leave_lps(rtwdev); break; case COEX_PS_LPS_OFF: coex_stat->wl_force_lps_ctrl = true; if (lps_mode) - rtw_fw_coex_tdma_type(rtwdev, 0x8, 0, 0, 0, 0); + rtw_fw_coex_tdma_type(rtwdev, 0, 0, 0, 0, 0); rtw_leave_lps(rtwdev); + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s(): COEX_PS_LPS_OFF\n", __func__); break; default: break; @@ -859,13 +1134,17 @@ static void rtw_coex_power_save_state(struct rtw_dev *rtwdev, u8 ps_type, static void rtw_coex_set_tdma(struct rtw_dev *rtwdev, u8 byte1, u8 byte2, u8 byte3, u8 byte4, u8 byte5) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_dm *coex_dm = &coex->dm; - struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_coex_stat *coex_stat = &coex->stat; u8 ps_type = COEX_PS_WIFI_NATIVE; bool ap_enable = false; if (ap_enable && (byte1 & BIT(4) && !(byte1 & BIT(5)))) { + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s(): AP mode\n", + __func__); + byte1 &= ~BIT(4); byte1 |= BIT(5); @@ -874,13 +1153,22 @@ static void rtw_coex_set_tdma(struct rtw_dev *rtwdev, u8 byte1, u8 byte2, ps_type = COEX_PS_WIFI_NATIVE; rtw_coex_power_save_state(rtwdev, ps_type, 0x0, 0x0); - } else if (byte1 & BIT(4) && !(byte1 & BIT(5))) { + } else if ((byte1 & BIT(4) && !(byte1 & BIT(5))) || + coex_stat->wl_coex_mode == COEX_WLINK_2GFREE) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s(): Force LPS (byte1 = 0x%x)\n", __func__, + byte1); + if (chip->pstdma_type == COEX_PSTDMA_FORCE_LPSOFF) ps_type = COEX_PS_LPS_OFF; else ps_type = COEX_PS_LPS_ON; rtw_coex_power_save_state(rtwdev, ps_type, 0x50, 0x4); } else { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s(): native power save (byte1 = 0x%x)\n", + __func__, byte1); + ps_type = COEX_PS_WIFI_NATIVE; rtw_coex_power_save_state(rtwdev, ps_type, 0x0, 0x0); } @@ -892,39 +1180,45 @@ static void rtw_coex_set_tdma(struct rtw_dev *rtwdev, u8 byte1, u8 byte2, coex_dm->ps_tdma_para[4] = byte5; rtw_fw_coex_tdma_type(rtwdev, byte1, byte2, byte3, byte4, byte5); + + if (byte1 & BIT(2)) { + coex_stat->wl_slot_toggle = true; + coex_stat->wl_slot_toggle_change = false; + } else { + coex_stat->wl_slot_toggle_change = coex_stat->wl_slot_toggle; + coex_stat->wl_slot_toggle = false; + } } static void rtw_coex_tdma(struct rtw_dev *rtwdev, bool force, u32 tcase) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_dm *coex_dm = &coex->dm; struct rtw_coex_stat *coex_stat = &coex->stat; - struct rtw_chip_info *chip = rtwdev->chip; struct rtw_efuse *efuse = &rtwdev->efuse; u8 n, type; bool turn_on; bool wl_busy = false; - if (tcase & TDMA_4SLOT)/* 4-slot (50ms) mode */ - rtw_coex_tdma_timer_base(rtwdev, 3); + if (tcase & TDMA_4SLOT) /* 4-slot (50ms) mode */ + rtw_coex_tdma_timer_base(rtwdev, TDMA_TIMER_TYPE_4SLOT); else - rtw_coex_tdma_timer_base(rtwdev, 0); + rtw_coex_tdma_timer_base(rtwdev, TDMA_TIMER_TYPE_2SLOT); type = (u8)(tcase & 0xff); turn_on = (type == 0 || type == 100) ? false : true; - if (!force) { - if (turn_on == coex_dm->cur_ps_tdma_on && - type == coex_dm->cur_ps_tdma) { - return; - } - } - - /* enable TBTT interrupt */ - if (turn_on) - rtw_write8_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); + if (!force && turn_on == coex_dm->cur_ps_tdma_on && + type == coex_dm->cur_ps_tdma) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], Skip TDMA because no change TDMA(%s, %d)\n", + (coex_dm->cur_ps_tdma_on ? "on" : "off"), + coex_dm->cur_ps_tdma); + return; + } wl_busy = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags); if ((coex_stat->bt_a2dp_exist && @@ -934,6 +1228,10 @@ static void rtw_coex_tdma(struct rtw_dev *rtwdev, bool force, u32 tcase) else rtw_coex_write_scbd(rtwdev, COEX_SCBD_TDMA, true); + /* update pre state */ + coex_dm->cur_ps_tdma_on = turn_on; + coex_dm->cur_ps_tdma = type; + if (efuse->share_ant) { if (type < chip->tdma_sant_num) rtw_coex_set_tdma(rtwdev, @@ -953,17 +1251,16 @@ static void rtw_coex_tdma(struct rtw_dev *rtwdev, bool force, u32 tcase) chip->tdma_nsant[n].para[4]); } - /* update pre state */ - coex_dm->cur_ps_tdma_on = turn_on; - coex_dm->cur_ps_tdma = type; - rtw_dbg(rtwdev, RTW_DBG_COEX, "coex: coex tdma type (%d)\n", type); + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], coex tdma type(%s, %d)\n", + turn_on ? "on" : "off", type); } static void rtw_coex_set_ant_path(struct rtw_dev *rtwdev, bool force, u8 phase) { struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; + struct rtw_coex_rfe *coex_rfe = &coex->rfe; struct rtw_coex_dm *coex_dm = &coex->dm; u8 ctrl_type = COEX_SWITCH_CTRL_MAX; u8 pos_type = COEX_SWITCH_TO_MAX; @@ -976,8 +1273,14 @@ static void rtw_coex_set_ant_path(struct rtw_dev *rtwdev, bool force, u8 phase) /* avoid switch coex_ctrl_owner during BT IQK */ rtw_coex_check_rfk(rtwdev); + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], coex_stat->bt_disabled = 0x%x\n", + coex_stat->bt_disabled); + switch (phase) { case COEX_SET_ANT_POWERON: + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s() - PHASE_COEX_POWERON\n", __func__); /* set path control owner to BT at power-on */ if (coex_stat->bt_disabled) rtw_coex_coex_ctrl_owner(rtwdev, true); @@ -988,6 +1291,8 @@ static void rtw_coex_set_ant_path(struct rtw_dev *rtwdev, bool force, u8 phase) pos_type = COEX_SWITCH_TO_BT; break; case COEX_SET_ANT_INIT: + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s() - PHASE_COEX_INIT\n", __func__); if (coex_stat->bt_disabled) { /* set GNT_BT to SW low */ rtw_coex_set_gnt_bt(rtwdev, COEX_GNT_SET_SW_LOW); @@ -1009,10 +1314,12 @@ static void rtw_coex_set_ant_path(struct rtw_dev *rtwdev, bool force, u8 phase) pos_type = COEX_SWITCH_TO_BT; break; case COEX_SET_ANT_WONLY: + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s() - PHASE_WLANONLY_INIT\n", __func__); /* set GNT_BT to SW Low */ rtw_coex_set_gnt_bt(rtwdev, COEX_GNT_SET_SW_LOW); - /* Set GNT_WL to SW high */ + /* set GNT_WL to SW high */ rtw_coex_set_gnt_wl(rtwdev, COEX_GNT_SET_SW_HIGH); /* set path control owner to wl at initial step */ @@ -1022,6 +1329,8 @@ static void rtw_coex_set_ant_path(struct rtw_dev *rtwdev, bool force, u8 phase) pos_type = COEX_SWITCH_TO_WLG; break; case COEX_SET_ANT_WOFF: + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s() - PHASE_WLAN_OFF\n", __func__); /* set path control owner to BT */ rtw_coex_coex_ctrl_owner(rtwdev, false); @@ -1029,6 +1338,8 @@ static void rtw_coex_set_ant_path(struct rtw_dev *rtwdev, bool force, u8 phase) pos_type = COEX_SWITCH_TO_NOCARE; break; case COEX_SET_ANT_2G: + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s() - PHASE_2G_RUNTIME\n", __func__); /* set GNT_BT to PTA */ rtw_coex_set_gnt_bt(rtwdev, COEX_GNT_SET_HW_PTA); @@ -1042,8 +1353,11 @@ static void rtw_coex_set_ant_path(struct rtw_dev *rtwdev, bool force, u8 phase) pos_type = COEX_SWITCH_TO_NOCARE; break; case COEX_SET_ANT_5G: - /* set GNT_BT to PTA */ - rtw_coex_set_gnt_bt(rtwdev, COEX_GNT_SET_SW_HIGH); + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s() - PHASE_5G_RUNTIME\n", __func__); + + /* set GNT_BT to HW PTA */ + rtw_coex_set_gnt_bt(rtwdev, COEX_GNT_SET_HW_PTA); /* set GNT_WL to SW high */ rtw_coex_set_gnt_wl(rtwdev, COEX_GNT_SET_SW_HIGH); @@ -1055,8 +1369,11 @@ static void rtw_coex_set_ant_path(struct rtw_dev *rtwdev, bool force, u8 phase) pos_type = COEX_SWITCH_TO_WLA; break; case COEX_SET_ANT_2G_FREERUN: - /* set GNT_BT to SW high */ - rtw_coex_set_gnt_bt(rtwdev, COEX_GNT_SET_SW_HIGH); + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s() - PHASE_2G_FREERUN\n", __func__); + + /* set GNT_BT to HW PTA */ + rtw_coex_set_gnt_bt(rtwdev, COEX_GNT_SET_HW_PTA); /* Set GNT_WL to SW high */ rtw_coex_set_gnt_wl(rtwdev, COEX_GNT_SET_SW_HIGH); @@ -1068,10 +1385,12 @@ static void rtw_coex_set_ant_path(struct rtw_dev *rtwdev, bool force, u8 phase) pos_type = COEX_SWITCH_TO_WLG_BT; break; case COEX_SET_ANT_2G_WLBT: - /* set GNT_BT to SW high */ + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s() - PHASE_2G_WLBT\n", __func__); + /* set GNT_BT to HW PTA */ rtw_coex_set_gnt_bt(rtwdev, COEX_GNT_SET_HW_PTA); - /* Set GNT_WL to SW high */ + /* Set GNT_WL to HW PTA */ rtw_coex_set_gnt_wl(rtwdev, COEX_GNT_SET_HW_PTA); /* set path control owner to wl at runtime step */ @@ -1085,10 +1404,58 @@ static void rtw_coex_set_ant_path(struct rtw_dev *rtwdev, bool force, u8 phase) return; } - if (ctrl_type < COEX_SWITCH_CTRL_MAX && pos_type < COEX_SWITCH_TO_MAX) + if (ctrl_type < COEX_SWITCH_CTRL_MAX && pos_type < COEX_SWITCH_TO_MAX && + coex_rfe->ant_switch_exist) rtw_coex_set_ant_switch(rtwdev, ctrl_type, pos_type); } +#define case_ALGO(src) \ + case COEX_ALGO_##src: return #src + +static const char *rtw_coex_get_algo_string(u8 algo) +{ + switch (algo) { + case_ALGO(NOPROFILE); + case_ALGO(HFP); + case_ALGO(HID); + case_ALGO(A2DP); + case_ALGO(PAN); + case_ALGO(A2DP_HID); + case_ALGO(A2DP_PAN); + case_ALGO(PAN_HID); + case_ALGO(A2DP_PAN_HID); + default: + return "Unknown"; + } +} + +#define case_BT_PROFILE(src) \ + case BPM_##src: return #src + +static const char *rtw_coex_get_bt_profile_string(u8 bt_profile) +{ + switch (bt_profile) { + case_BT_PROFILE(NOPROFILE); + case_BT_PROFILE(HFP); + case_BT_PROFILE(HID); + case_BT_PROFILE(A2DP); + case_BT_PROFILE(PAN); + case_BT_PROFILE(HID_HFP); + case_BT_PROFILE(A2DP_HFP); + case_BT_PROFILE(A2DP_HID); + case_BT_PROFILE(A2DP_HID_HFP); + case_BT_PROFILE(PAN_HFP); + case_BT_PROFILE(PAN_HID); + case_BT_PROFILE(PAN_HID_HFP); + case_BT_PROFILE(PAN_A2DP); + case_BT_PROFILE(PAN_A2DP_HFP); + case_BT_PROFILE(PAN_A2DP_HID); + case_BT_PROFILE(PAN_A2DP_HID_HFP); + default: + return "Unknown"; + } +} + static u8 rtw_coex_algorithm(struct rtw_dev *rtwdev) { struct rtw_coex *coex = &rtwdev->coex; @@ -1149,15 +1516,22 @@ static u8 rtw_coex_algorithm(struct rtw_dev *rtwdev) break; } + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], BT Profile = %s => Algorithm = %s\n", + rtw_coex_get_bt_profile_string(profile_map), + rtw_coex_get_algo_string(algorithm)); return algorithm; } static void rtw_coex_action_coex_all_off(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; u8 table_case, tdma_case; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + if (efuse->share_ant) { /* Shared-Ant */ table_case = 2; @@ -1168,26 +1542,28 @@ static void rtw_coex_action_coex_all_off(struct rtw_dev *rtwdev) tdma_case = 100; } - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); + rtw_coex_table(rtwdev, false, table_case); rtw_coex_tdma(rtwdev, false, tdma_case); } static void rtw_coex_action_freerun(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; struct rtw_coex_dm *coex_dm = &coex->dm; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; u8 level = 0; + bool bt_afh_loss = true; + + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); if (efuse->share_ant) return; coex->freerun = true; - if (coex_stat->wl_connected) + if (bt_afh_loss) rtw_coex_update_wl_ch_info(rtwdev, COEX_MEDIA_CONNECT); rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G_FREERUN); @@ -1211,41 +1587,49 @@ static void rtw_coex_action_freerun(struct rtw_dev *rtwdev) else rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[level]); - rtw_coex_table(rtwdev, 100); + rtw_coex_table(rtwdev, false, 100); rtw_coex_tdma(rtwdev, false, 100); } -static void rtw_coex_action_bt_whql_test(struct rtw_dev *rtwdev) +static void rtw_coex_action_rf4ce(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; u8 table_case, tdma_case; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + if (efuse->share_ant) { /* Shared-Ant */ - table_case = 2; - tdma_case = 0; + table_case = 9; + tdma_case = 16; } else { /* Non-Shared-Ant */ table_case = 100; tdma_case = 100; } - rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); + rtw_coex_table(rtwdev, false, table_case); rtw_coex_tdma(rtwdev, false, tdma_case); } -static void rtw_coex_action_bt_relink(struct rtw_dev *rtwdev) +static void rtw_coex_action_bt_whql_test(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; u8 table_case, tdma_case; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + if (efuse->share_ant) { /* Shared-Ant */ - table_case = 1; + table_case = 2; tdma_case = 0; } else { /* Non-Shared-Ant */ @@ -1253,26 +1637,68 @@ static void rtw_coex_action_bt_relink(struct rtw_dev *rtwdev) tdma_case = 100; } + rtw_coex_table(rtwdev, false, table_case); + rtw_coex_tdma(rtwdev, false, tdma_case); +} + +static void rtw_coex_action_bt_relink(struct rtw_dev *rtwdev) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_coex *coex = &rtwdev->coex; + struct rtw_coex_stat *coex_stat = &coex->stat; + struct rtw_efuse *efuse = &rtwdev->efuse; + u8 table_case, tdma_case; + u32 slot_type = 0; + + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); - rtw_coex_tdma(rtwdev, false, tdma_case); + + if (efuse->share_ant) { /* Shared-Ant */ + if (coex_stat->wl_gl_busy) { + table_case = 26; + if (coex_stat->bt_hid_exist && + coex_stat->bt_profile_num == 1) { + slot_type = TDMA_4SLOT; + tdma_case = 20; + } else { + tdma_case = 20; + } + } else { + table_case = 1; + tdma_case = 0; + } + } else { /* Non-Shared-Ant */ + if (coex_stat->wl_gl_busy) + table_case = 115; + else + table_case = 100; + tdma_case = 100; + } + + rtw_coex_table(rtwdev, false, table_case); + rtw_coex_tdma(rtwdev, false, tdma_case | slot_type); } static void rtw_coex_action_bt_idle(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; struct rtw_coex_dm *coex_dm = &coex->dm; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex_rfe *coex_rfe = &coex->rfe; u8 table_case = 0xff, tdma_case = 0xff; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + if (coex_rfe->ant_switch_with_bt && coex_dm->bt_status == COEX_BTSTATUS_NCON_IDLE) { if (efuse->share_ant && - COEX_RSSI_HIGH(coex_dm->wl_rssi_state[1])) { + COEX_RSSI_HIGH(coex_dm->wl_rssi_state[3]) && + coex_stat->wl_gl_busy) { table_case = 0; tdma_case = 0; } else if (!efuse->share_ant) { @@ -1283,9 +1709,7 @@ static void rtw_coex_action_bt_idle(struct rtw_dev *rtwdev) if (table_case != 0xff && tdma_case != 0xff) { rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G_FREERUN); - rtw_coex_table(rtwdev, table_case); - rtw_coex_tdma(rtwdev, false, tdma_case); - return; + goto exit; } rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); @@ -1296,8 +1720,12 @@ static void rtw_coex_action_bt_idle(struct rtw_dev *rtwdev) table_case = 10; tdma_case = 3; } else if (coex_dm->bt_status == COEX_BTSTATUS_NCON_IDLE) { - table_case = 6; - tdma_case = 7; + table_case = 11; + + if (coex_stat->lo_pri_rx + coex_stat->lo_pri_tx > 250) + tdma_case = 17; + else + tdma_case = 7; } else { table_case = 12; tdma_case = 7; @@ -1308,7 +1736,7 @@ static void rtw_coex_action_bt_idle(struct rtw_dev *rtwdev) table_case = 112; tdma_case = 104; } else if ((coex_stat->bt_ble_scan_type & 0x2) && - coex_dm->bt_status == COEX_BTSTATUS_NCON_IDLE) { + coex_dm->bt_status == COEX_BTSTATUS_NCON_IDLE) { table_case = 114; tdma_case = 103; } else { @@ -1317,21 +1745,25 @@ static void rtw_coex_action_bt_idle(struct rtw_dev *rtwdev) } } - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); +exit: + rtw_coex_table(rtwdev, false, table_case); rtw_coex_tdma(rtwdev, false, tdma_case); } static void rtw_coex_action_bt_inquiry(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; bool wl_hi_pri = false; u8 table_case, tdma_case; u32 slot_type = 0; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + if (coex_stat->wl_linkscan_proc || coex_stat->wl_hi_pri_task1 || coex_stat->wl_hi_pri_task2) wl_hi_pri = true; @@ -1339,7 +1771,10 @@ static void rtw_coex_action_bt_inquiry(struct rtw_dev *rtwdev) if (efuse->share_ant) { /* Shared-Ant */ if (wl_hi_pri) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], bt inq/page + wifi hi-pri task\n"); table_case = 15; + if (coex_stat->bt_profile_num > 0) tdma_case = 10; else if (coex_stat->wl_hi_pri_task1) @@ -1349,6 +1784,8 @@ static void rtw_coex_action_bt_inquiry(struct rtw_dev *rtwdev) else tdma_case = 9; } else if (coex_stat->wl_gl_busy) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], bt inq/page + wifi busy\n"); if (coex_stat->bt_profile_num == 0) { table_case = 12; tdma_case = 18; @@ -1363,63 +1800,120 @@ static void rtw_coex_action_bt_inquiry(struct rtw_dev *rtwdev) tdma_case = 26; } } else if (coex_stat->wl_connected) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], bt inq/page + wifi connected\n"); table_case = 9; tdma_case = 27; } else { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], bt inq/page + wifi not-connected\n"); table_case = 1; tdma_case = 0; } } else { /* Non_Shared-Ant */ if (wl_hi_pri) { - table_case = 113; - if (coex_stat->bt_a2dp_exist && - !coex_stat->bt_pan_exist) - tdma_case = 111; + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], bt inq/page + wifi hi-pri task\n"); + table_case = 114; + + if (coex_stat->bt_profile_num > 0) + tdma_case = 110; else if (coex_stat->wl_hi_pri_task1) tdma_case = 106; else if (!coex_stat->bt_page) tdma_case = 108; else tdma_case = 109; - } else if (coex_stat->wl_gl_busy) { + } else if (coex_stat->wl_gl_busy) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], bt inq/page + wifi busy\n"); table_case = 114; tdma_case = 121; } else if (coex_stat->wl_connected) { - table_case = 100; + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], bt inq/page + wifi connected\n"); + table_case = 101; tdma_case = 100; } else { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], bt inq/page + wifi not-connected\n"); table_case = 101; tdma_case = 100; } } - rtw_dbg(rtwdev, RTW_DBG_COEX, "coex: wifi hi(%d), bt page(%d)\n", + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], wifi hi(%d), bt page(%d)\n", wl_hi_pri, coex_stat->bt_page); - rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); + rtw_coex_table(rtwdev, false, table_case); rtw_coex_tdma(rtwdev, false, tdma_case | slot_type); } +static void rtw_coex_action_bt_game_hid(struct rtw_dev *rtwdev) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_coex *coex = &rtwdev->coex; + struct rtw_coex_stat *coex_stat = &coex->stat; + struct rtw_efuse *efuse = &rtwdev->efuse; + struct rtw_coex_dm *coex_dm = &coex->dm; + u8 table_case, tdma_case; + + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); + + if (efuse->share_ant) { + coex_stat->wl_coex_mode = COEX_WLINK_2GFREE; + if (coex_stat->bt_whck_test) + table_case = 2; + else if (coex_stat->wl_linkscan_proc || coex_stat->bt_hid_exist) + table_case = 33; + else if (coex_stat->bt_setup_link || coex_stat->bt_inq_page) + table_case = 0; + else if (coex_stat->bt_a2dp_exist) + table_case = 34; + else + table_case = 33; + + tdma_case = 0; + } else { + if (COEX_RSSI_HIGH(coex_dm->wl_rssi_state[1])) + tdma_case = 112; + else + tdma_case = 113; + + table_case = 121; + } + + if (coex_stat->wl_coex_mode == COEX_WLINK_2GFREE) { + if (coex_stat->wl_tput_dir == COEX_WL_TPUT_TX) + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_tx[6]); + else + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[5]); + } else { + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + } + + rtw_coex_table(rtwdev, false, table_case); + rtw_coex_tdma(rtwdev, false, tdma_case); +} + static void rtw_coex_action_bt_hfp(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; u8 table_case, tdma_case; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + if (efuse->share_ant) { /* Shared-Ant */ - if (coex_stat->bt_multi_link) { - table_case = 10; - tdma_case = 17; - } else { - table_case = 10; - tdma_case = 5; - } + table_case = 10; + tdma_case = 5; } else { /* Non-Shared-Ant */ if (coex_stat->bt_multi_link) { @@ -1431,100 +1925,121 @@ static void rtw_coex_action_bt_hfp(struct rtw_dev *rtwdev) } } - rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); + rtw_coex_table(rtwdev, false, table_case); rtw_coex_tdma(rtwdev, false, tdma_case); } static void rtw_coex_action_bt_hid(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; u8 table_case, tdma_case; - u32 wl_bw; + u32 slot_type = 0; + bool bt_multi_link_remain = false, is_toggle_table = false; - wl_bw = rtwdev->hal.current_band_width; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); if (efuse->share_ant) { /* Shared-Ant */ if (coex_stat->bt_ble_exist) { /* RCU */ - if (!coex_stat->wl_gl_busy) - table_case = 14; - else - table_case = 15; - - if (coex_stat->bt_a2dp_active || wl_bw == 0) - tdma_case = 18; - else if (coex_stat->wl_gl_busy) - tdma_case = 8; - else - tdma_case = 4; + if (coex_stat->cnt_wl[COEX_CNT_WL_SCANAP] > 5) { + table_case = 26; + tdma_case = 2; + } else { + table_case = 27; + tdma_case = 9; + } } else { - if (coex_stat->bt_a2dp_active || wl_bw == 0) { - table_case = 8; - tdma_case = 4; + /* Legacy HID */ + if (coex_stat->bt_profile_num == 1 && + (coex_stat->bt_multi_link || + (coex_stat->lo_pri_rx + + coex_stat->lo_pri_tx > 360) || + coex_stat->bt_slave || + bt_multi_link_remain)) { + slot_type = TDMA_4SLOT; + table_case = 12; + tdma_case = 20; + } else if (coex_stat->bt_a2dp_active) { + table_case = 9; + tdma_case = 18; + } else if (coex_stat->bt_418_hid_exist && + coex_stat->wl_gl_busy) { + is_toggle_table = true; + slot_type = TDMA_4SLOT; + table_case = 9; + tdma_case = 24; + } else if (coex_stat->bt_ble_hid_exist && + coex_stat->wl_gl_busy) { + table_case = 32; + tdma_case = 9; } else { - /* for 4/18 HID */ - if (coex_stat->bt_418_hid_exist && - coex_stat->wl_gl_busy) - table_case = 12; - else - table_case = 10; - tdma_case = 4; + table_case = 9; + tdma_case = 9; } } } else { /* Non-Shared-Ant */ - if (coex_stat->bt_a2dp_active) { - table_case = 113; - tdma_case = 118; - } else if (coex_stat->bt_ble_exist) { + if (coex_stat->bt_ble_exist) { /* BLE */ + if (coex_stat->cnt_wl[COEX_CNT_WL_SCANAP] > 5) { + table_case = 121; + tdma_case = 102; + } else { + table_case = 122; + tdma_case = 109; + } + } else if (coex_stat->bt_a2dp_active) { table_case = 113; - - if (coex_stat->wl_gl_busy) - tdma_case = 106; - else - tdma_case = 104; + tdma_case = 118; } else { table_case = 113; tdma_case = 104; } } - rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); - rtw_coex_tdma(rtwdev, false, tdma_case); + rtw_coex_table(rtwdev, false, table_case); + if (is_toggle_table) { + rtw_btc_wltoggle_table_a(rtwdev, true, table_case); + rtw_btc_wltoggle_table_b(rtwdev, false, 1, COEX_WL_SLOT_TOGLLE); + } + + rtw_coex_tdma(rtwdev, false, tdma_case | slot_type); } static void rtw_coex_action_bt_a2dp(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; struct rtw_coex_dm *coex_dm = &coex->dm; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; u8 table_case, tdma_case; u32 slot_type = 0; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + + slot_type = TDMA_4SLOT; + if (efuse->share_ant) { /* Shared-Ant */ - slot_type = TDMA_4SLOT; - if (coex_stat->wl_gl_busy && coex_stat->wl_noisy_level == 0) - table_case = 10; + table_case = 12; else table_case = 9; - if (coex_stat->wl_gl_busy) - tdma_case = 13; - else + if (coex_stat->wl_connecting || !coex_stat->wl_gl_busy) tdma_case = 14; + else + tdma_case = 13; } else { /* Non-Shared-Ant */ table_case = 112; @@ -1535,21 +2050,24 @@ static void rtw_coex_action_bt_a2dp(struct rtw_dev *rtwdev) tdma_case = 113; } - rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); + rtw_coex_table(rtwdev, false, table_case); rtw_coex_tdma(rtwdev, false, tdma_case | slot_type); } static void rtw_coex_action_bt_a2dpsink(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; u8 table_case, tdma_case; bool ap_enable = false; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + if (efuse->share_ant) { /* Shared-Ant */ if (ap_enable) { table_case = 2; @@ -1571,20 +2089,22 @@ static void rtw_coex_action_bt_a2dpsink(struct rtw_dev *rtwdev) } } - rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); + rtw_coex_table(rtwdev, false, table_case); rtw_coex_tdma(rtwdev, false, tdma_case); } static void rtw_coex_action_bt_pan(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; u8 table_case, tdma_case; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + if (efuse->share_ant) { /* Shared-Ant */ if (coex_stat->wl_gl_busy && coex_stat->wl_noisy_level == 0) @@ -1595,7 +2115,7 @@ static void rtw_coex_action_bt_pan(struct rtw_dev *rtwdev) if (coex_stat->wl_gl_busy) tdma_case = 17; else - tdma_case = 19; + tdma_case = 20; } else { /* Non-Shared-Ant */ table_case = 112; @@ -1606,35 +2126,45 @@ static void rtw_coex_action_bt_pan(struct rtw_dev *rtwdev) tdma_case = 119; } - rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); + rtw_coex_table(rtwdev, false, table_case); rtw_coex_tdma(rtwdev, false, tdma_case); } static void rtw_coex_action_bt_a2dp_hid(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; struct rtw_coex_dm *coex_dm = &coex->dm; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; - u8 table_case, tdma_case; + u8 table_case, tdma_case, interval = 0; u32 slot_type = 0; + bool is_toggle_table = false; + + slot_type = TDMA_4SLOT; + + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); if (efuse->share_ant) { /* Shared-Ant */ - slot_type = TDMA_4SLOT; - - if (coex_stat->bt_ble_exist) - table_case = 26; - else + if (coex_stat->bt_ble_exist) { + table_case = 26; /* for RCU */ + } else if (coex_stat->bt_418_hid_exist) { table_case = 9; - - if (coex_stat->wl_gl_busy) { - tdma_case = 13; + interval = 1; } else { + table_case = 9; + } + + if (coex_stat->wl_connecting || !coex_stat->wl_gl_busy) { tdma_case = 14; + } else if (coex_stat->bt_418_hid_exist) { + is_toggle_table = true; + tdma_case = 23; + } else { + tdma_case = 13; } } else { /* Non-Shared-Ant */ @@ -1649,32 +2179,52 @@ static void rtw_coex_action_bt_a2dp_hid(struct rtw_dev *rtwdev) tdma_case = 113; } - rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); + rtw_coex_table(rtwdev, false, table_case); + if (is_toggle_table) { + rtw_btc_wltoggle_table_a(rtwdev, true, table_case); + rtw_btc_wltoggle_table_b(rtwdev, false, interval, COEX_WL_SLOT_TOGLLE); + } rtw_coex_tdma(rtwdev, false, tdma_case | slot_type); } static void rtw_coex_action_bt_a2dp_pan(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; u8 table_case, tdma_case; + bool wl_cpt_test = false, bt_cpt_test = false; + + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); if (efuse->share_ant) { /* Shared-Ant */ - if (coex_stat->wl_gl_busy && - coex_stat->wl_noisy_level == 0) - table_case = 14; - else - table_case = 10; + if (wl_cpt_test) { + if (coex_stat->wl_gl_busy) { + table_case = 20; + tdma_case = 17; + } else { + table_case = 10; + tdma_case = 15; + } + } else if (bt_cpt_test) { + table_case = 26; + tdma_case = 26; + } else { + if (coex_stat->wl_gl_busy && + coex_stat->wl_noisy_level == 0) + table_case = 14; + else + table_case = 10; - if (coex_stat->wl_gl_busy) - tdma_case = 15; - else - tdma_case = 20; + if (coex_stat->wl_gl_busy) + tdma_case = 15; + else + tdma_case = 20; + } } else { /* Non-Shared-Ant */ table_case = 112; @@ -1685,20 +2235,28 @@ static void rtw_coex_action_bt_a2dp_pan(struct rtw_dev *rtwdev) tdma_case = 120; } - rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); + if (wl_cpt_test) + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[1]); + else + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + + rtw_coex_table(rtwdev, false, table_case); rtw_coex_tdma(rtwdev, false, tdma_case); } static void rtw_coex_action_bt_pan_hid(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; u8 table_case, tdma_case; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + if (efuse->share_ant) { /* Shared-Ant */ table_case = 9; @@ -1717,20 +2275,22 @@ static void rtw_coex_action_bt_pan_hid(struct rtw_dev *rtwdev) tdma_case = 119; } - rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); + rtw_coex_table(rtwdev, false, table_case); rtw_coex_tdma(rtwdev, false, tdma_case); } static void rtw_coex_action_bt_a2dp_pan_hid(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; u8 table_case, tdma_case; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + if (efuse->share_ant) { /* Shared-Ant */ table_case = 10; @@ -1749,20 +2309,28 @@ static void rtw_coex_action_bt_a2dp_pan_hid(struct rtw_dev *rtwdev) tdma_case = 120; } - rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); + rtw_coex_table(rtwdev, false, table_case); rtw_coex_tdma(rtwdev, false, tdma_case); } static void rtw_coex_action_wl_under5g(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_coex *coex = &rtwdev->coex; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_coex_stat *coex_stat = &coex->stat; u8 table_case, tdma_case; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + + rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_5G); + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + rtw_coex_write_scbd(rtwdev, COEX_SCBD_FIX2M, false); + if (coex_stat->bt_game_hid_exist && coex_stat->wl_linkscan_proc) + coex_stat->wl_coex_mode = COEX_WLINK_2GFREE; + if (efuse->share_ant) { /* Shared-Ant */ table_case = 0; @@ -1773,18 +2341,20 @@ static void rtw_coex_action_wl_under5g(struct rtw_dev *rtwdev) tdma_case = 100; } - rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_5G); - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); + rtw_coex_table(rtwdev, false, table_case); rtw_coex_tdma(rtwdev, false, tdma_case); } static void rtw_coex_action_wl_only(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; u8 table_case, tdma_case; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + if (efuse->share_ant) { /* Shared-Ant */ table_case = 2; @@ -1795,22 +2365,25 @@ static void rtw_coex_action_wl_only(struct rtw_dev *rtwdev) tdma_case = 100; } - rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_2G); - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); + rtw_coex_table(rtwdev, false, table_case); rtw_coex_tdma(rtwdev, false, tdma_case); } static void rtw_coex_action_wl_native_lps(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_coex_stat *coex_stat = &coex->stat; u8 table_case, tdma_case; if (coex->under_5g) return; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); + if (efuse->share_ant) { /* Shared-Ant */ table_case = 28; @@ -1821,34 +2394,48 @@ static void rtw_coex_action_wl_native_lps(struct rtw_dev *rtwdev) tdma_case = 100; } - rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_2G); - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); + if (coex_stat->bt_game_hid_exist) { + coex_stat->wl_coex_mode = COEX_WLINK_2GFREE; + if (coex_stat->wl_tput_dir == COEX_WL_TPUT_TX) + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_tx[6]); + else + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[5]); + } else { + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + } + + rtw_coex_table(rtwdev, false, table_case); rtw_coex_tdma(rtwdev, false, tdma_case); } static void rtw_coex_action_wl_linkscan(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; u8 table_case, tdma_case; u32 slot_type = 0; - if (efuse->share_ant) { - /* Shared-Ant */ + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + + if (efuse->share_ant) { /* Shared-Ant */ if (coex_stat->bt_a2dp_exist) { slot_type = TDMA_4SLOT; - table_case = 9; tdma_case = 11; + if (coex_stat->wl_gl_busy) + table_case = 26; + else + table_case = 9; } else { table_case = 9; tdma_case = 7; } - } else { - /* Non-Shared-Ant */ + } else { /* Non-Shared-Ant */ if (coex_stat->bt_a2dp_exist) { + slot_type = TDMA_4SLOT; table_case = 112; tdma_case = 111; } else { @@ -1857,18 +2444,20 @@ static void rtw_coex_action_wl_linkscan(struct rtw_dev *rtwdev) } } - rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_2G); - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); + rtw_coex_table(rtwdev, false, table_case); rtw_coex_tdma(rtwdev, false, tdma_case | slot_type); } static void rtw_coex_action_wl_not_connected(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw_chip_info *chip = rtwdev->chip; u8 table_case, tdma_case; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + if (efuse->share_ant) { /* Shared-Ant */ table_case = 1; @@ -1879,9 +2468,7 @@ static void rtw_coex_action_wl_not_connected(struct rtw_dev *rtwdev) tdma_case = 100; } - rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_2G); - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); - rtw_coex_table(rtwdev, table_case); + rtw_coex_table(rtwdev, false, table_case); rtw_coex_tdma(rtwdev, false, tdma_case); } @@ -1889,17 +2476,9 @@ static void rtw_coex_action_wl_connected(struct rtw_dev *rtwdev) { struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; - struct rtw_coex_dm *coex_dm = &coex->dm; - struct rtw_efuse *efuse = &rtwdev->efuse; u8 algorithm; - /* Non-Shared-Ant */ - if (!efuse->share_ant && coex_stat->wl_gl_busy && - COEX_RSSI_HIGH(coex_dm->wl_rssi_state[3]) && - COEX_RSSI_HIGH(coex_dm->bt_rssi_state[0])) { - rtw_coex_action_freerun(rtwdev); - return; - } + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); algorithm = rtw_coex_algorithm(rtwdev); @@ -1908,10 +2487,15 @@ static void rtw_coex_action_wl_connected(struct rtw_dev *rtwdev) rtw_coex_action_bt_hfp(rtwdev); break; case COEX_ALGO_HID: - rtw_coex_action_bt_hid(rtwdev); + if (rtw_coex_freerun_check(rtwdev)) + rtw_coex_action_freerun(rtwdev); + else + rtw_coex_action_bt_hid(rtwdev); break; case COEX_ALGO_A2DP: - if (coex_stat->bt_a2dp_sink) + if (rtw_coex_freerun_check(rtwdev)) + rtw_coex_action_freerun(rtwdev); + else if (coex_stat->bt_a2dp_sink) rtw_coex_action_bt_a2dpsink(rtwdev); else rtw_coex_action_bt_a2dp(rtwdev); @@ -1920,7 +2504,10 @@ static void rtw_coex_action_wl_connected(struct rtw_dev *rtwdev) rtw_coex_action_bt_pan(rtwdev); break; case COEX_ALGO_A2DP_HID: - rtw_coex_action_bt_a2dp_hid(rtwdev); + if (rtw_coex_freerun_check(rtwdev)) + rtw_coex_action_freerun(rtwdev); + else + rtw_coex_action_bt_a2dp_hid(rtwdev); break; case COEX_ALGO_A2DP_PAN: rtw_coex_action_bt_a2dp_pan(rtwdev); @@ -1940,9 +2527,11 @@ static void rtw_coex_action_wl_connected(struct rtw_dev *rtwdev) static void rtw_coex_run_coex(struct rtw_dev *rtwdev, u8 reason) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_dm *coex_dm = &coex->dm; struct rtw_coex_stat *coex_stat = &coex->stat; + bool rf4ce_en = false; lockdep_assert_held(&rtwdev->mutex); @@ -1951,20 +2540,38 @@ static void rtw_coex_run_coex(struct rtw_dev *rtwdev, u8 reason) coex_dm->reason = reason; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s(): reason = %d\n", __func__, + reason); + /* update wifi_link_info_ext variable */ rtw_coex_update_wl_link_info(rtwdev, reason); rtw_coex_monitor_bt_enable(rtwdev); - if (coex->stop_dm) + if (coex->manual_control) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], return for Manual CTRL!!\n"); + return; + } + + if (coex->stop_dm) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], return for Stop Coex DM!!\n"); return; + } - if (coex_stat->wl_under_ips) + if (coex_stat->wl_under_ips) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], return for wifi is under IPS!!\n"); return; + } if (coex->freeze && coex_dm->reason == COEX_RSN_BTINFO && - !coex_stat->bt_setup_link) + !coex_stat->bt_setup_link) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], return for coex_freeze!!\n"); return; + } coex_stat->cnt_wl[COEX_CNT_WL_COEXRUN]++; coex->freerun = false; @@ -1976,10 +2583,16 @@ static void rtw_coex_run_coex(struct rtw_dev *rtwdev, u8 reason) goto exit; } + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], WiFi is single-port 2G!!\n"); coex_stat->wl_coex_mode = COEX_WLINK_2G1PORT; - rtw_coex_write_scbd(rtwdev, COEX_SCBD_FIX2M, false); + if (coex_stat->bt_disabled) { - rtw_coex_action_wl_only(rtwdev); + if (coex_stat->wl_connected && rf4ce_en) + rtw_coex_action_rf4ce(rtwdev); + else if (!coex_stat->wl_connected) + rtw_coex_action_wl_not_connected(rtwdev); + else + rtw_coex_action_wl_only(rtwdev); goto exit; } @@ -1988,6 +2601,11 @@ static void rtw_coex_run_coex(struct rtw_dev *rtwdev, u8 reason) goto exit; } + if (coex_stat->bt_game_hid_exist && coex_stat->wl_connected) { + rtw_coex_action_bt_game_hid(rtwdev); + goto exit; + } + if (coex_stat->bt_whck_test) { rtw_coex_action_bt_whql_test(rtwdev); goto exit; @@ -2010,18 +2628,33 @@ static void rtw_coex_run_coex(struct rtw_dev *rtwdev, u8 reason) goto exit; } - if (coex_stat->wl_linkscan_proc) { + if (coex_stat->wl_linkscan_proc && !coex->freerun) { rtw_coex_action_wl_linkscan(rtwdev); goto exit; } - if (coex_stat->wl_connected) + if (coex_stat->wl_connected) { rtw_coex_action_wl_connected(rtwdev); - else + goto exit; + } else { rtw_coex_action_wl_not_connected(rtwdev); + goto exit; + } exit: - rtw_coex_set_gnt_fix(rtwdev); + + if (chip->wl_mimo_ps_support) { + if (coex_stat->wl_coex_mode == COEX_WLINK_2GFREE) { + if (coex_dm->reason == COEX_RSN_2GMEDIA) + rtw_coex_mimo_ps(rtwdev, true, true); + else + rtw_coex_mimo_ps(rtwdev, false, true); + } else { + rtw_coex_mimo_ps(rtwdev, false, false); + } + } + + rtw_coex_gnt_workaround(rtwdev, false, coex_stat->wl_coex_mode); rtw_coex_limited_wl(rtwdev); } @@ -2048,14 +2681,26 @@ static void rtw_coex_init_coex_var(struct rtw_dev *rtwdev) coex_dm->wl_rssi_state[i] = COEX_RSSI_STATE_LOW; coex_stat->wl_coex_mode = COEX_WLINK_MAX; + coex_stat->wl_rx_rate = DESC_RATE5_5M; + coex_stat->wl_rts_rx_rate = DESC_RATE5_5M; } static void __rtw_coex_init_hw_config(struct rtw_dev *rtwdev, bool wifi_only) { struct rtw_coex *coex = &rtwdev->coex; + struct rtw_coex_stat *coex_stat = &coex->stat; + + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); rtw_coex_init_coex_var(rtwdev); + + coex_stat->kt_ver = u8_get_bits(rtw_read8(rtwdev, 0xf1), GENMASK(7, 4)); + rtw_coex_monitor_bt_enable(rtwdev); + rtw_coex_wl_slot_extend(rtwdev, coex_stat->wl_slot_extend); + + rtw_write8_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); + rtw_coex_set_rfe_type(rtwdev); rtw_coex_set_init(rtwdev); @@ -2073,21 +2718,24 @@ static void __rtw_coex_init_hw_config(struct rtw_dev *rtwdev, bool wifi_only) rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_WOFF); rtw_coex_write_scbd(rtwdev, COEX_SCBD_ALL, false); coex->stop_dm = true; + + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s(): RF Off\n", + __func__); } else if (wifi_only) { rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_WONLY); - rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE | COEX_SCBD_SCAN, + rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE | COEX_SCBD_ONOFF, true); coex->stop_dm = true; } else { rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_INIT); - rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE | COEX_SCBD_SCAN, + rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE | COEX_SCBD_ONOFF, true); coex->stop_dm = false; coex->freeze = true; } /* PTA parameter */ - rtw_coex_table(rtwdev, 0); + rtw_coex_table(rtwdev, true, 1); rtw_coex_tdma(rtwdev, true, 0); rtw_coex_query_bt_info(rtwdev); } @@ -2095,12 +2743,16 @@ static void __rtw_coex_init_hw_config(struct rtw_dev *rtwdev, bool wifi_only) void rtw_coex_power_on_setting(struct rtw_dev *rtwdev) { struct rtw_coex *coex = &rtwdev->coex; + u8 table_case = 1; + + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); coex->stop_dm = true; coex->wl_rf_off = false; /* enable BB, we can write 0x948 */ - rtw_write8_set(rtwdev, REG_SYS_FUNC_EN, BIT(0) | BIT(1)); + rtw_write8_set(rtwdev, REG_SYS_FUNC_EN, + BIT_FEN_BB_GLB_RST | BIT_FEN_BB_RSTB); rtw_coex_monitor_bt_enable(rtwdev); rtw_coex_set_rfe_type(rtwdev); @@ -2108,8 +2760,15 @@ void rtw_coex_power_on_setting(struct rtw_dev *rtwdev) /* set antenna path to BT */ rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_POWERON); + rtw_coex_table(rtwdev, true, table_case); /* red x issue */ rtw_write8(rtwdev, 0xff1a, 0x0); + rtw_coex_set_gnt_debug(rtwdev); +} + +void rtw_coex_power_off_setting(struct rtw_dev *rtwdev) +{ + rtw_write16(rtwdev, REG_WIFI_BT_INFO, BIT_BT_INT_EN); } void rtw_coex_init_hw_config(struct rtw_dev *rtwdev, bool wifi_only) @@ -2122,10 +2781,12 @@ void rtw_coex_ips_notify(struct rtw_dev *rtwdev, u8 type) struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; - if (coex->stop_dm) + if (coex->manual_control || coex->stop_dm) return; if (type == COEX_IPS_ENTER) { + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], IPS ENTER notify\n"); + coex_stat->wl_under_ips = true; /* for lps off */ @@ -2134,11 +2795,11 @@ void rtw_coex_ips_notify(struct rtw_dev *rtwdev, u8 type) rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_WOFF); rtw_coex_action_coex_all_off(rtwdev); } else if (type == COEX_IPS_LEAVE) { - rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE | COEX_SCBD_ONOFF, true); + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], IPS LEAVE notify\n"); + rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE | COEX_SCBD_ONOFF, true); /* run init hw config (exclude wifi only) */ __rtw_coex_init_hw_config(rtwdev, false); - /* sw all off */ coex_stat->wl_under_ips = false; } @@ -2149,10 +2810,12 @@ void rtw_coex_lps_notify(struct rtw_dev *rtwdev, u8 type) struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; - if (coex->stop_dm) + if (coex->manual_control || coex->stop_dm) return; if (type == COEX_LPS_ENABLE) { + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], LPS ENABLE notify\n"); + coex_stat->wl_under_lps = true; if (coex_stat->wl_force_lps_ctrl) { @@ -2161,10 +2824,13 @@ void rtw_coex_lps_notify(struct rtw_dev *rtwdev, u8 type) } else { /* for native ps */ rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE, false); + rtw_coex_write_scbd(rtwdev, COEX_SCBD_WLBUSY, false); rtw_coex_run_coex(rtwdev, COEX_RSN_LPS); } } else if (type == COEX_LPS_DISABLE) { + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], LPS DISABLE notify\n"); + coex_stat->wl_under_lps = false; /* for lps off */ @@ -2172,6 +2838,8 @@ void rtw_coex_lps_notify(struct rtw_dev *rtwdev, u8 type) if (!coex_stat->wl_force_lps_ctrl) rtw_coex_query_bt_info(rtwdev); + + rtw_coex_run_coex(rtwdev, COEX_RSN_LPS); } } @@ -2180,25 +2848,34 @@ void rtw_coex_scan_notify(struct rtw_dev *rtwdev, u8 type) struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; - if (coex->stop_dm) + if (coex->manual_control || coex->stop_dm) return; coex->freeze = false; - - if (type != COEX_SCAN_FINISH) - rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE | COEX_SCBD_SCAN | - COEX_SCBD_ONOFF, true); + rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE | COEX_SCBD_ONOFF, true); if (type == COEX_SCAN_START_5G) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], SCAN START notify (5G)\n"); + rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_5G); rtw_coex_run_coex(rtwdev, COEX_RSN_5GSCANSTART); } else if ((type == COEX_SCAN_START_2G) || (type == COEX_SCAN_START)) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], SCAN START notify (2G)\n"); + coex_stat->wl_hi_pri_task2 = true; /* Force antenna setup for no scan result issue */ rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_2G); rtw_coex_run_coex(rtwdev, COEX_RSN_2GSCANSTART); } else { + coex_stat->cnt_wl[COEX_CNT_WL_SCANAP] = 30; /* To do */ + + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], SCAN FINISH notify (Scan-AP = %d)\n", + coex_stat->cnt_wl[COEX_CNT_WL_SCANAP]); + coex_stat->wl_hi_pri_task2 = false; rtw_coex_run_coex(rtwdev, COEX_RSN_SCANFINISH); } @@ -2208,9 +2885,20 @@ void rtw_coex_switchband_notify(struct rtw_dev *rtwdev, u8 type) { struct rtw_coex *coex = &rtwdev->coex; - if (coex->stop_dm) + if (coex->manual_control || coex->stop_dm) return; + if (type == COEX_SWITCH_TO_5G) { + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s(): TO_5G\n", + __func__); + } else if (type == COEX_SWITCH_TO_24G_NOFORSCAN) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s(): TO_24G_NOFORSCAN\n", __func__); + } else { + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s(): TO_2G\n", + __func__); + } + if (type == COEX_SWITCH_TO_5G) rtw_coex_run_coex(rtwdev, COEX_RSN_5GSWITCHBAND); else if (type == COEX_SWITCH_TO_24G_NOFORSCAN) @@ -2224,22 +2912,33 @@ void rtw_coex_connect_notify(struct rtw_dev *rtwdev, u8 type) struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; - if (coex->stop_dm) + if (coex->manual_control || coex->stop_dm) return; - rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE | COEX_SCBD_SCAN | - COEX_SCBD_ONOFF, true); + rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE | COEX_SCBD_ONOFF, true); if (type == COEX_ASSOCIATE_5G_START) { + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s(): 5G start\n", + __func__); + rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_5G); rtw_coex_run_coex(rtwdev, COEX_RSN_5GCONSTART); } else if (type == COEX_ASSOCIATE_5G_FINISH) { + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s(): 5G finish\n", + __func__); + rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_5G); rtw_coex_run_coex(rtwdev, COEX_RSN_5GCONFINISH); } else if (type == COEX_ASSOCIATE_START) { coex_stat->wl_hi_pri_task1 = true; + coex_stat->wl_connecting = true; coex_stat->cnt_wl[COEX_CNT_WL_CONNPKT] = 2; + coex_stat->wl_connecting = true; + ieee80211_queue_delayed_work(rtwdev->hw, + &coex->wl_connecting_work, 2 * HZ); + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s(): 2G start\n", + __func__); /* Force antenna setup for no scan result issue */ rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_2G); @@ -2254,7 +2953,10 @@ void rtw_coex_connect_notify(struct rtw_dev *rtwdev, u8 type) } else { coex_stat->wl_hi_pri_task1 = false; coex->freeze = false; + coex_stat->wl_connecting = false; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s(): 2G finish\n", + __func__); rtw_coex_run_coex(rtwdev, COEX_RSN_2GCONFINISH); } } @@ -2263,17 +2965,22 @@ void rtw_coex_media_status_notify(struct rtw_dev *rtwdev, u8 type) { struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; - u8 para[6] = {0}; - if (coex->stop_dm) + if (coex->manual_control || coex->stop_dm) return; if (type == COEX_MEDIA_CONNECT_5G) { + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s(): 5G\n", __func__); + rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE, true); rtw_coex_set_ant_path(rtwdev, true, COEX_SET_ANT_5G); rtw_coex_run_coex(rtwdev, COEX_RSN_5GMEDIA); } else if (type == COEX_MEDIA_CONNECT) { + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s(): 2G\n", __func__); + + coex_stat->wl_connecting = false; + rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE, true); /* Force antenna setup for no scan result issue */ @@ -2281,18 +2988,11 @@ void rtw_coex_media_status_notify(struct rtw_dev *rtwdev, u8 type) /* Set CCK Rx high Pri */ rtw_coex_set_wl_pri_mask(rtwdev, COEX_WLPRI_RX_CCK, 1); - - /* always enable 5ms extend if connect */ - para[0] = COEX_H2C69_WL_LEAKAP; - para[1] = PARA1_H2C69_EN_5MS; /* enable 5ms extend */ - rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]); - coex_stat->wl_slot_extend = true; rtw_coex_run_coex(rtwdev, COEX_RSN_2GMEDIA); } else { - rtw_coex_write_scbd(rtwdev, COEX_SCBD_ACTIVE, false); - + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s(): disconnect!!\n", + __func__); rtw_coex_set_wl_pri_mask(rtwdev, COEX_WLPRI_RX_CCK, 0); - rtw_coex_run_coex(rtwdev, COEX_RSN_MEDIADISCON); } @@ -2301,28 +3001,38 @@ void rtw_coex_media_status_notify(struct rtw_dev *rtwdev, u8 type) void rtw_coex_bt_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; - struct rtw_chip_info *chip = rtwdev->chip; - unsigned long bt_relink_time; + struct rtw_coex_dm *coex_dm = &coex->dm; + u32 bt_relink_time; u8 i, rsp_source = 0, type; bool inq_page = false; rsp_source = buf[0] & 0xf; if (rsp_source >= COEX_BTINFO_SRC_MAX) - rsp_source = COEX_BTINFO_SRC_WL_FW; + return; + coex_stat->cnt_bt_info_c2h[rsp_source]++; if (rsp_source == COEX_BTINFO_SRC_BT_IQK) { coex_stat->bt_iqk_state = buf[1]; - if (coex_stat->bt_iqk_state == 1) + if (coex_stat->bt_iqk_state == 0) coex_stat->cnt_bt[COEX_CNT_BT_IQK]++; else if (coex_stat->bt_iqk_state == 2) coex_stat->cnt_bt[COEX_CNT_BT_IQKFAIL]++; + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], BT IQK by bt_info, data0 = 0x%02x\n", + buf[1]); + return; } if (rsp_source == COEX_BTINFO_SRC_BT_SCBD) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], BT Scoreboard change notify by WL FW c2h, 0xaa = 0x%02x, 0xab = 0x%02x\n", + buf[1], buf[2]); + rtw_coex_monitor_bt_enable(rtwdev); if (coex_stat->bt_disabled != coex_stat->bt_disabled_pre) { coex_stat->bt_disabled_pre = coex_stat->bt_disabled; @@ -2331,6 +3041,24 @@ void rtw_coex_bt_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) return; } + if (rsp_source == COEX_BTINFO_SRC_H2C60) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], H2C 0x60 content replied by WL FW: H2C_0x60 = [%02x %02x %02x %02x %02x]\n", + buf[1], buf[2], buf[3], buf[4], buf[5]); + + for (i = 1; i <= COEX_WL_TDMA_PARA_LENGTH; i++) + coex_dm->fw_tdma_para[i - 1] = buf[i]; + return; + } + + if (rsp_source == COEX_BTINFO_SRC_WL_FW) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], bt_info reply by WL FW\n"); + + rtw_coex_update_bt_link_info(rtwdev); + return; + } + if (rsp_source == COEX_BTINFO_SRC_BT_RSP || rsp_source == COEX_BTINFO_SRC_BT_ACT) { if (coex_stat->bt_disabled) { @@ -2339,30 +3067,36 @@ void rtw_coex_bt_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) ieee80211_queue_delayed_work(rtwdev->hw, &coex->bt_reenable_work, 15 * HZ); + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], BT enable detected by bt_info\n"); } } - for (i = 0; i < length; i++) { - if (i < COEX_BTINFO_LENGTH_MAX) - coex_stat->bt_info_c2h[rsp_source][i] = buf[i]; - else - break; - } + if (length != COEX_BTINFO_LENGTH) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], Bt_info length = %d invalid!!\n", length); - if (rsp_source == COEX_BTINFO_SRC_WL_FW) { - rtw_coex_update_bt_link_info(rtwdev); - rtw_coex_run_coex(rtwdev, COEX_RSN_BTINFO); return; } + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], Bt_info[%d], len=%d, data=[%02x %02x %02x %02x %02x %02x]\n", + buf[0], length, buf[1], buf[2], buf[3], buf[4], buf[5], buf[6]); + + for (i = 0; i < COEX_BTINFO_LENGTH; i++) + coex_stat->bt_info_c2h[rsp_source][i] = buf[i]; + /* get the same info from bt, skip it */ if (coex_stat->bt_info_c2h[rsp_source][1] == coex_stat->bt_info_lb2 && coex_stat->bt_info_c2h[rsp_source][2] == coex_stat->bt_info_lb3 && coex_stat->bt_info_c2h[rsp_source][3] == coex_stat->bt_info_hb0 && coex_stat->bt_info_c2h[rsp_source][4] == coex_stat->bt_info_hb1 && coex_stat->bt_info_c2h[rsp_source][5] == coex_stat->bt_info_hb2 && - coex_stat->bt_info_c2h[rsp_source][6] == coex_stat->bt_info_hb3) + coex_stat->bt_info_c2h[rsp_source][6] == coex_stat->bt_info_hb3) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], Return because Btinfo duplicate!!\n"); return; + } coex_stat->bt_info_lb2 = coex_stat->bt_info_c2h[rsp_source][1]; coex_stat->bt_info_lb3 = coex_stat->bt_info_c2h[rsp_source][2]; @@ -2388,6 +3122,40 @@ void rtw_coex_bt_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) 4 * HZ); } coex_stat->bt_acl_busy = ((coex_stat->bt_info_lb2 & BIT(3)) == BIT(3)); + if (chip->ble_hid_profile_support) { + if (coex_stat->bt_info_lb2 & BIT(5)) { + if (coex_stat->bt_info_hb1 & BIT(0)) { + /*BLE HID*/ + coex_stat->bt_ble_hid_exist = true; + } else { + coex_stat->bt_ble_hid_exist = false; + } + coex_stat->bt_ble_exist = false; + } else if (coex_stat->bt_info_hb1 & BIT(0)) { + /*RCU*/ + coex_stat->bt_ble_hid_exist = false; + coex_stat->bt_ble_exist = true; + } else { + coex_stat->bt_ble_hid_exist = false; + coex_stat->bt_ble_exist = false; + } + } else { + if (coex_stat->bt_info_hb1 & BIT(0)) { + if (coex_stat->bt_hid_slot == 1 && + coex_stat->hi_pri_rx + 100 < coex_stat->hi_pri_tx && + coex_stat->hi_pri_rx < 100) { + coex_stat->bt_ble_hid_exist = true; + coex_stat->bt_ble_exist = false; + } else { + coex_stat->bt_ble_hid_exist = false; + coex_stat->bt_ble_exist = true; + } + } else { + coex_stat->bt_ble_hid_exist = false; + coex_stat->bt_ble_exist = false; + } + } + coex_stat->cnt_bt[COEX_CNT_BT_RETRY] = coex_stat->bt_info_lb3 & 0xf; if (coex_stat->cnt_bt[COEX_CNT_BT_RETRY] >= 1) coex_stat->cnt_bt[COEX_CNT_BT_POPEVENT]++; @@ -2398,22 +3166,13 @@ void rtw_coex_bt_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) coex_stat->cnt_bt[COEX_CNT_BT_INQ]++; coex_stat->bt_page = ((coex_stat->bt_info_lb3 & BIT(7)) == BIT(7)); - if (coex_stat->bt_page) { + if (coex_stat->bt_page) coex_stat->cnt_bt[COEX_CNT_BT_PAGE]++; - if (coex_stat->wl_linkscan_proc || - coex_stat->wl_hi_pri_task1 || - coex_stat->wl_hi_pri_task2 || coex_stat->wl_gl_busy) - rtw_coex_write_scbd(rtwdev, COEX_SCBD_SCAN, true); - else - rtw_coex_write_scbd(rtwdev, COEX_SCBD_SCAN, false); - } else { - rtw_coex_write_scbd(rtwdev, COEX_SCBD_SCAN, false); - } /* unit: % (value-100 to translate to unit: dBm in coex info) */ if (chip->bt_rssi_type == COEX_BTRSSI_RATIO) { coex_stat->bt_rssi = coex_stat->bt_info_hb0 * 2 + 10; - } else { /* original unit: dbm -> unit: % -> value-100 in coex info */ + } else { if (coex_stat->bt_info_hb0 <= 127) coex_stat->bt_rssi = 100; else if (256 - coex_stat->bt_info_hb0 <= 100) @@ -2422,7 +3181,6 @@ void rtw_coex_bt_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) coex_stat->bt_rssi = 0; } - coex_stat->bt_ble_exist = ((coex_stat->bt_info_hb1 & BIT(0)) == BIT(0)); if (coex_stat->bt_info_hb1 & BIT(1)) coex_stat->cnt_bt[COEX_CNT_BT_REINIT]++; @@ -2432,11 +3190,14 @@ void rtw_coex_bt_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) if (coex_stat->bt_reenable) bt_relink_time = 6 * HZ; else - bt_relink_time = 2 * HZ; + bt_relink_time = 1 * HZ; ieee80211_queue_delayed_work(rtwdev->hw, &coex->bt_relink_work, bt_relink_time); + + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], Re-Link start in BT info!!\n"); } if (coex_stat->bt_info_hb1 & BIT(3)) @@ -2448,8 +3209,21 @@ void rtw_coex_bt_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) coex_stat->cnt_bt[COEX_CNT_BT_ROLESWITCH]++; coex_stat->bt_multi_link = ((coex_stat->bt_info_hb1 & BIT(7)) == BIT(7)); + /* for multi_link = 0 but bt pkt remain exist */ + /* Use PS-TDMA to protect WL RX */ + if (!coex_stat->bt_multi_link && coex_stat->bt_multi_link_pre) { + coex_stat->bt_multi_link_remain = true; + ieee80211_queue_delayed_work(rtwdev->hw, + &coex->bt_multi_link_remain_work, + 3 * HZ); + } + coex_stat->bt_multi_link_pre = coex_stat->bt_multi_link; + /* resend wifi info to bt, it is reset and lost the info */ - if ((coex_stat->bt_info_hb1 & BIT(1))) { + if (coex_stat->bt_info_hb1 & BIT(1)) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], BT Re-init, send wifi BW & Chnl to BT!!\n"); + if (coex_stat->wl_connected) type = COEX_MEDIA_CONNECT; else @@ -2459,8 +3233,11 @@ void rtw_coex_bt_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) /* if ignore_wlan_act && not set_up_link */ if ((coex_stat->bt_info_hb1 & BIT(3)) && - (!(coex_stat->bt_info_hb1 & BIT(2)))) + (!(coex_stat->bt_info_hb1 & BIT(2)))) { + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n"); rtw_coex_ignore_wlan_act(rtwdev, false); + } coex_stat->bt_opp_exist = ((coex_stat->bt_info_hb2 & BIT(0)) == BIT(0)); if (coex_stat->bt_info_hb2 & BIT(1)) @@ -2472,7 +3249,7 @@ void rtw_coex_bt_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) coex_stat->bt_hid_pair_num = (coex_stat->bt_info_hb2 & 0xc0) >> 6; if (coex_stat->bt_hid_pair_num > 0 && coex_stat->bt_hid_slot >= 2) coex_stat->bt_418_hid_exist = true; - else if (coex_stat->bt_hid_pair_num == 0) + else if (coex_stat->bt_hid_pair_num == 0 || coex_stat->bt_hid_slot == 1) coex_stat->bt_418_hid_exist = false; if ((coex_stat->bt_info_lb2 & 0x49) == 0x49) @@ -2486,6 +3263,135 @@ void rtw_coex_bt_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) rtw_coex_run_coex(rtwdev, COEX_RSN_BTINFO); } +#define COEX_BT_HIDINFO_MTK 0x46 +static const u8 coex_bt_hidinfo_ps[] = {0x57, 0x69, 0x72}; +static const u8 coex_bt_hidinfo_xb[] = {0x58, 0x62, 0x6f}; + +void rtw_coex_bt_hid_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_coex *coex = &rtwdev->coex; + struct rtw_coex_stat *coex_stat = &coex->stat; + struct rtw_coex_hid *hidinfo; + struct rtw_coex_hid_info_a *hida; + struct rtw_coex_hid_handle_list *hl, *bhl; + u8 sub_id = buf[2], gamehid_cnt = 0, handle, i; + bool cur_game_hid_exist, complete; + + if (!chip->wl_mimo_ps_support && + (sub_id == COEX_BT_HIDINFO_LIST || sub_id == COEX_BT_HIDINFO_A)) + return; + + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], HID info notify, sub_id = 0x%x\n", sub_id); + + switch (sub_id) { + case COEX_BT_HIDINFO_LIST: + hl = &coex_stat->hid_handle_list; + bhl = (struct rtw_coex_hid_handle_list *)buf; + if (!memcmp(hl, bhl, sizeof(*hl))) + return; + coex_stat->hid_handle_list = *bhl; + memset(&coex_stat->hid_info, 0, sizeof(coex_stat->hid_info)); + for (i = 0; i < COEX_BT_HIDINFO_HANDLE_NUM; i++) { + hidinfo = &coex_stat->hid_info[i]; + if (hl->handle[i] != COEX_BT_HIDINFO_NOTCON && + hl->handle[i] != 0) + hidinfo->hid_handle = hl->handle[i]; + } + break; + case COEX_BT_HIDINFO_A: + hida = (struct rtw_coex_hid_info_a *)buf; + handle = hida->handle; + for (i = 0; i < COEX_BT_HIDINFO_HANDLE_NUM; i++) { + hidinfo = &coex_stat->hid_info[i]; + if (hidinfo->hid_handle == handle) { + hidinfo->hid_vendor = hida->vendor; + memcpy(hidinfo->hid_name, hida->name, + sizeof(hidinfo->hid_name)); + hidinfo->hid_info_completed = true; + break; + } + } + break; + } + for (i = 0; i < COEX_BT_HIDINFO_HANDLE_NUM; i++) { + hidinfo = &coex_stat->hid_info[i]; + complete = hidinfo->hid_info_completed; + handle = hidinfo->hid_handle; + if (!complete || handle == COEX_BT_HIDINFO_NOTCON || + handle == 0 || handle >= COEX_BT_BLE_HANDLE_THRS) { + hidinfo->is_game_hid = false; + continue; + } + + if (hidinfo->hid_vendor == COEX_BT_HIDINFO_MTK) { + if ((memcmp(hidinfo->hid_name, + coex_bt_hidinfo_ps, + COEX_BT_HIDINFO_NAME)) == 0) + hidinfo->is_game_hid = true; + else if ((memcmp(hidinfo->hid_name, + coex_bt_hidinfo_xb, + COEX_BT_HIDINFO_NAME)) == 0) + hidinfo->is_game_hid = true; + else + hidinfo->is_game_hid = false; + } else { + hidinfo->is_game_hid = false; + } + if (hidinfo->is_game_hid) + gamehid_cnt++; + } + + if (gamehid_cnt > 0) + cur_game_hid_exist = true; + else + cur_game_hid_exist = false; + + if (cur_game_hid_exist != coex_stat->bt_game_hid_exist) { + coex_stat->bt_game_hid_exist = cur_game_hid_exist; + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], HID info changed!bt_game_hid_exist = %d!\n", + coex_stat->bt_game_hid_exist); + rtw_coex_run_coex(rtwdev, COEX_RSN_BTSTATUS); + } +} + +void rtw_coex_query_bt_hid_list(struct rtw_dev *rtwdev) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_coex *coex = &rtwdev->coex; + struct rtw_coex_stat *coex_stat = &coex->stat; + struct rtw_coex_hid *hidinfo; + u8 i, handle; + bool complete; + + if (!chip->wl_mimo_ps_support || coex_stat->wl_under_ips || + (coex_stat->wl_under_lps && !coex_stat->wl_force_lps_ctrl)) + return; + + if (!coex_stat->bt_hid_exist && + !((coex_stat->bt_info_lb2 & COEX_INFO_CONNECTION) && + (coex_stat->hi_pri_tx + coex_stat->hi_pri_rx > + COEX_BT_GAMEHID_CNT))) + return; + + rtw_fw_coex_query_hid_info(rtwdev, COEX_BT_HIDINFO_LIST, 0); + + for (i = 0; i < COEX_BT_HIDINFO_HANDLE_NUM; i++) { + hidinfo = &coex_stat->hid_info[i]; + complete = hidinfo->hid_info_completed; + handle = hidinfo->hid_handle; + if (handle == 0 || handle == COEX_BT_HIDINFO_NOTCON || + handle >= COEX_BT_BLE_HANDLE_THRS || complete) + continue; + + rtw_fw_coex_query_hid_info(rtwdev, + COEX_BT_HIDINFO_A, + handle); + } +} + void rtw_coex_wl_fwdbginfo_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) { struct rtw_coex *coex = &rtwdev->coex; @@ -2493,6 +3399,9 @@ void rtw_coex_wl_fwdbginfo_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) u8 val; int i; + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], WiFi Fw Dbg info = %8ph (len = %d)\n", + buf, length); if (WARN(length < 8, "invalid wl info c2h length\n")) return; @@ -2504,7 +3413,7 @@ void rtw_coex_wl_fwdbginfo_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) if (buf[i] >= val) coex_stat->wl_fw_dbg_info[i] = buf[i] - val; else - coex_stat->wl_fw_dbg_info[i] = val - buf[i]; + coex_stat->wl_fw_dbg_info[i] = 255 - val + buf[i]; coex_stat->wl_fw_dbg_info_pre[i] = buf[i]; } @@ -2514,14 +3423,20 @@ void rtw_coex_wl_fwdbginfo_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) rtw_coex_wl_ccklock_detect(rtwdev); } -void rtw_coex_wl_status_change_notify(struct rtw_dev *rtwdev) +void rtw_coex_wl_status_change_notify(struct rtw_dev *rtwdev, u32 type) { - struct rtw_coex *coex = &rtwdev->coex; + rtw_coex_run_coex(rtwdev, COEX_RSN_WLSTATUS); +} + +void rtw_coex_wl_status_check(struct rtw_dev *rtwdev) +{ + struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat; - if (coex->stop_dm) + if ((coex_stat->wl_under_lps && !coex_stat->wl_force_lps_ctrl) || + coex_stat->wl_under_ips) return; - rtw_coex_run_coex(rtwdev, COEX_RSN_WLSTATUS); + rtw_coex_monitor_bt_ctr(rtwdev); } void rtw_coex_bt_relink_work(struct work_struct *work) @@ -2585,6 +3500,41 @@ void rtw_coex_bt_remain_work(struct work_struct *work) mutex_unlock(&rtwdev->mutex); } +void rtw_coex_wl_connecting_work(struct work_struct *work) +{ + struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, + coex.wl_connecting_work.work); + struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat; + + mutex_lock(&rtwdev->mutex); + coex_stat->wl_connecting = false; + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], WL connecting stop!!\n"); + rtw_coex_run_coex(rtwdev, COEX_RSN_WLSTATUS); + mutex_unlock(&rtwdev->mutex); +} + +void rtw_coex_bt_multi_link_remain_work(struct work_struct *work) +{ + struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, + coex.bt_multi_link_remain_work.work); + struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat; + + mutex_lock(&rtwdev->mutex); + coex_stat->bt_multi_link_remain = false; + mutex_unlock(&rtwdev->mutex); +} + +void rtw_coex_wl_ccklock_work(struct work_struct *work) +{ + struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, + coex.wl_ccklock_work.work); + struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat; + + mutex_lock(&rtwdev->mutex); + coex_stat->wl_cck_lock = false; + mutex_unlock(&rtwdev->mutex); +} + #ifdef CONFIG_RTW88_DEBUGFS #define INFO_SIZE 80 @@ -2628,6 +3578,81 @@ static const char *rtw_coex_get_reason_string(u8 reason) } } +static u8 rtw_coex_get_table_index(struct rtw_dev *rtwdev, u32 wl_reg_6c0, + u32 wl_reg_6c4) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_efuse *efuse = &rtwdev->efuse; + u8 ans = 0xFF; + u8 n, i; + u32 load_bt_val; + u32 load_wl_val; + bool share_ant = efuse->share_ant; + + if (share_ant) + n = chip->table_sant_num; + else + n = chip->table_nsant_num; + + for (i = 0; i < n; i++) { + if (share_ant) { + load_bt_val = chip->table_sant[i].bt; + load_wl_val = chip->table_sant[i].wl; + } else { + load_bt_val = chip->table_nsant[i].bt; + load_wl_val = chip->table_nsant[i].wl; + } + + if (wl_reg_6c0 == load_bt_val && + wl_reg_6c4 == load_wl_val) { + ans = i; + if (!share_ant) + ans += 100; + break; + } + } + + return ans; +} + +static u8 rtw_coex_get_tdma_index(struct rtw_dev *rtwdev, u8 *tdma_para) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_efuse *efuse = &rtwdev->efuse; + u8 ans = 0xFF; + u8 n, i, j; + u8 load_cur_tab_val; + bool valid = false; + bool share_ant = efuse->share_ant; + + if (share_ant) + n = chip->tdma_sant_num; + else + n = chip->tdma_nsant_num; + + for (i = 0; i < n; i++) { + valid = false; + for (j = 0; j < 5; j++) { + if (share_ant) + load_cur_tab_val = chip->tdma_sant[i].para[j]; + else + load_cur_tab_val = chip->tdma_nsant[i].para[j]; + + if (*(tdma_para + j) != load_cur_tab_val) + break; + + if (j == 4) + valid = true; + } + if (valid) { + ans = i; + break; + } + } + + return ans; +} + static int rtw_coex_addr_info(struct rtw_dev *rtwdev, const struct rtw_reg_domain *reg, char addr_info[], int n) @@ -2710,7 +3735,7 @@ static int rtw_coex_val_info(struct rtw_dev *rtwdev, static void rtw_coex_set_coexinfo_hw(struct rtw_dev *rtwdev, struct seq_file *m) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; const struct rtw_reg_domain *reg; char addr_info[INFO_SIZE]; int n_addr = 0; @@ -2756,6 +3781,7 @@ static bool rtw_coex_get_bt_reg(struct rtw_dev *rtwdev, payload = get_payload_from_coex_resp(skb); *val = GET_COEX_RESP_BT_REG_VAL(payload); + dev_kfree_skb_any(skb); return true; } @@ -2766,19 +3792,17 @@ static bool rtw_coex_get_bt_patch_version(struct rtw_dev *rtwdev, struct rtw_coex_info_req req = {0}; struct sk_buff *skb; u8 *payload; - bool ret = false; req.op_code = BT_MP_INFO_OP_PATCH_VER; skb = rtw_coex_info_request(rtwdev, &req); if (!skb) - goto out; + return false; payload = get_payload_from_coex_resp(skb); *patch_version = GET_COEX_RESP_BT_PATCH_VER(payload); - ret = true; + dev_kfree_skb_any(skb); -out: - return ret; + return true; } static bool rtw_coex_get_bt_supported_version(struct rtw_dev *rtwdev, @@ -2787,19 +3811,17 @@ static bool rtw_coex_get_bt_supported_version(struct rtw_dev *rtwdev, struct rtw_coex_info_req req = {0}; struct sk_buff *skb; u8 *payload; - bool ret = false; req.op_code = BT_MP_INFO_OP_SUPP_VER; skb = rtw_coex_info_request(rtwdev, &req); if (!skb) - goto out; + return false; payload = get_payload_from_coex_resp(skb); *supported_version = GET_COEX_RESP_BT_SUPP_VER(payload); - ret = true; + dev_kfree_skb_any(skb); -out: - return ret; + return true; } static bool rtw_coex_get_bt_supported_feature(struct rtw_dev *rtwdev, @@ -2808,19 +3830,17 @@ static bool rtw_coex_get_bt_supported_feature(struct rtw_dev *rtwdev, struct rtw_coex_info_req req = {0}; struct sk_buff *skb; u8 *payload; - bool ret = false; req.op_code = BT_MP_INFO_OP_SUPP_FEAT; skb = rtw_coex_info_request(rtwdev, &req); if (!skb) - goto out; + return false; payload = get_payload_from_coex_resp(skb); *supported_feature = GET_COEX_RESP_BT_SUPP_FEAT(payload); - ret = true; + dev_kfree_skb_any(skb); -out: - return ret; + return true; } struct rtw_coex_sta_stat_iter_data { @@ -2873,9 +3893,23 @@ static void rtw_coex_vif_stat_iter(void *data, u8 *mac, &sta_iter_data); } +#define case_WLINK(src) \ + case COEX_WLINK_##src: return #src + +static const char *rtw_coex_get_wl_coex_mode(u8 coex_wl_link_mode) +{ + switch (coex_wl_link_mode) { + case_WLINK(2G1PORT); + case_WLINK(5G); + case_WLINK(2GFREE); + default: + return "Unknown"; + } +} + void rtw_coex_display_coex_info(struct rtw_dev *rtwdev, struct seq_file *m) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_dm_info *dm_info = &rtwdev->dm_info; struct rtw_coex *coex = &rtwdev->coex; struct rtw_coex_stat *coex_stat = &coex->stat; @@ -2889,19 +3923,16 @@ void rtw_coex_display_coex_info(struct rtw_dev *rtwdev, struct seq_file *m) u16 score_board_WB, score_board_BW; u32 wl_reg_6c0, wl_reg_6c4, wl_reg_6c8, wl_reg_778, wl_reg_6cc; u32 lte_coex, bt_coex; - u32 bt_hi_pri, bt_lo_pri; int i; score_board_BW = rtw_coex_read_scbd(rtwdev); score_board_WB = coex_stat->score_board; - wl_reg_6c0 = rtw_read32(rtwdev, 0x6c0); - wl_reg_6c4 = rtw_read32(rtwdev, 0x6c4); - wl_reg_6c8 = rtw_read32(rtwdev, 0x6c8); - wl_reg_6cc = rtw_read32(rtwdev, 0x6cc); - wl_reg_778 = rtw_read32(rtwdev, 0x778); - bt_hi_pri = rtw_read32(rtwdev, 0x770); - bt_lo_pri = rtw_read32(rtwdev, 0x774); - rtw_write8(rtwdev, 0x76e, 0xc); + wl_reg_6c0 = rtw_read32(rtwdev, REG_BT_COEX_TABLE0); + wl_reg_6c4 = rtw_read32(rtwdev, REG_BT_COEX_TABLE1); + wl_reg_6c8 = rtw_read32(rtwdev, REG_BT_COEX_BRK_TABLE); + wl_reg_6cc = rtw_read32(rtwdev, REG_BT_COEX_TABLE_H); + wl_reg_778 = rtw_read8(rtwdev, REG_BT_STAT_CTRL); + sys_lte = rtw_read8(rtwdev, 0x73); lte_coex = rtw_coex_read_indirect_reg(rtwdev, 0x38); bt_coex = rtw_coex_read_indirect_reg(rtwdev, 0x54); @@ -2919,9 +3950,24 @@ void rtw_coex_display_coex_info(struct rtw_dev *rtwdev, struct seq_file *m) coex_stat->bt_mailbox_reply = true; } + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); seq_printf(m, "**********************************************\n"); seq_printf(m, "\t\tBT Coexist info %x\n", chip->id); seq_printf(m, "**********************************************\n"); + + if (coex->manual_control) { + seq_puts(m, "============[Under Manual Control]============\n"); + seq_puts(m, "==========================================\n"); + + } else if (coex->stop_dm) { + seq_puts(m, "============[Coex is STOPPED]============\n"); + seq_puts(m, "==========================================\n"); + + } else if (coex->freeze) { + seq_puts(m, "============[coex_freeze]============\n"); + seq_puts(m, "==========================================\n"); + } + seq_printf(m, "%-40s = %s/ %d\n", "Mech/ RFE", efuse->share_ant ? "Shared" : "Non-Shared", @@ -2938,15 +3984,17 @@ void rtw_coex_display_coex_info(struct rtw_dev *rtwdev, struct seq_file *m) coex_stat->bt_slave ? "Slave" : "Master", coex_stat->cnt_bt[COEX_CNT_BT_ROLESWITCH], coex_dm->ignore_wl_act); - seq_printf(m, "%-40s = %u.%u/ 0x%x/ %c\n", - "WL FW/ BT FW/ KT", + seq_printf(m, "%-40s = %u.%u/ 0x%x/ 0x%x/ %c\n", + "WL FW/ BT FW/ BT FW Desired/ KT", fw->version, fw->sub_version, - coex_stat->patch_ver, coex_stat->kt_ver + 65); + coex_stat->patch_ver, + chip->wl_fw_desired_ver, coex_stat->kt_ver + 65); seq_printf(m, "%-40s = %u/ %u/ %u/ ch-(%u)\n", "AFH Map", coex_dm->wl_ch_info[0], coex_dm->wl_ch_info[1], coex_dm->wl_ch_info[2], hal->current_channel); + rtw_debugfs_get_simple_phy_info(m); seq_printf(m, "**********************************************\n"); seq_printf(m, "\t\tBT Status\n"); seq_printf(m, "**********************************************\n"); @@ -2965,6 +4013,7 @@ void rtw_coex_display_coex_info(struct rtw_dev *rtwdev, struct seq_file *m) coex_stat->bt_hid_exist ? (coex_stat->bt_ble_exist ? "HID(RCU)," : coex_stat->bt_hid_slot >= 2 ? "HID(4/18)" : + coex_stat->bt_ble_hid_exist ? "HID(BLE)" : "HID(2/18),") : "", coex_stat->bt_pan_exist ? coex_stat->bt_opp_exist ? "OPP," : "PAN," : "", @@ -2989,8 +4038,8 @@ void rtw_coex_display_coex_info(struct rtw_dev *rtwdev, struct seq_file *m) score_board_WB, score_board_BW); seq_printf(m, "%-40s = %u/%u, %u/%u\n", "Hi-Pri TX/RX, Lo-Pri TX/RX", - bt_hi_pri & 0xffff, bt_hi_pri >> 16, - bt_lo_pri & 0xffff, bt_lo_pri >> 16); + coex_stat->hi_pri_tx, coex_stat->hi_pri_rx, + coex_stat->lo_pri_tx, coex_stat->lo_pri_rx); for (i = 0; i < COEX_BTINFO_SRC_BT_IQK; i++) seq_printf(m, "%-40s = %7ph\n", rtw_coex_get_bt_info_src_string(i), @@ -3007,7 +4056,7 @@ void rtw_coex_display_coex_info(struct rtw_dev *rtwdev, struct seq_file *m) rtwdev->stats.tx_throughput, rtwdev->stats.rx_throughput); seq_printf(m, "%-40s = %u/ %u/ %u\n", "IPS/ Low Power/ PS mode", - test_bit(RTW_FLAG_INACTIVE_PS, rtwdev->flags), + !test_bit(RTW_FLAG_POWERON, rtwdev->flags), test_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags), rtwdev->lps_conf.mode); @@ -3015,20 +4064,45 @@ void rtw_coex_display_coex_info(struct rtw_dev *rtwdev, struct seq_file *m) vif_iter_data.file = m; rtw_iterate_vifs_atomic(rtwdev, rtw_coex_vif_stat_iter, &vif_iter_data); - seq_printf(m, "**********************************************\n"); - seq_printf(m, "\t\tMechanism\n"); - seq_printf(m, "**********************************************\n"); - seq_printf(m, "%-40s = %5ph (case-%d)\n", - "TDMA", - coex_dm->ps_tdma_para, coex_dm->cur_ps_tdma); - seq_printf(m, "%-40s = %d\n", - "Timer base", coex_stat->tdma_timer_base); - seq_printf(m, "%-40s = %d/ 0x%08x/ 0x%08x/ 0x%08x\n", + if (coex->manual_control) { + seq_printf(m, "**********************************************\n"); + seq_printf(m, "\t\tMechanism (Under Manual)\n"); + seq_printf(m, "**********************************************\n"); + seq_printf(m, "%-40s = %5ph (%d)\n", + "TDMA Now", + coex_dm->fw_tdma_para, + rtw_coex_get_tdma_index(rtwdev, + &coex_dm->fw_tdma_para[0])); + } else { + seq_printf(m, "**********************************************\n"); + seq_printf(m, "\t\tMechanism\n"); + seq_printf(m, "**********************************************\n"); + seq_printf(m, "%-40s = %5ph (case-%d)\n", + "TDMA", + coex_dm->ps_tdma_para, coex_dm->cur_ps_tdma); + } + seq_printf(m, "%-40s = %s/ %s/ %d\n", + "Coex Mode/Free Run/Timer base", + rtw_coex_get_wl_coex_mode(coex_stat->wl_coex_mode), + coex->freerun ? "Yes" : "No", + coex_stat->tdma_timer_base); + seq_printf(m, "%-40s = %d(%d)/ 0x%08x/ 0x%08x/ 0x%08x\n", "Table/ 0x6c0/ 0x6c4/ 0x6c8", - coex_dm->cur_table, wl_reg_6c0, wl_reg_6c4, wl_reg_6c8); - seq_printf(m, "%-40s = 0x%08x/ 0x%08x/ reason (%s)\n", - "0x778/ 0x6cc/ Reason", - wl_reg_778, wl_reg_6cc, rtw_coex_get_reason_string(reason)); + coex_dm->cur_table, + rtw_coex_get_table_index(rtwdev, wl_reg_6c0, wl_reg_6c4), + wl_reg_6c0, wl_reg_6c4, wl_reg_6c8); + seq_printf(m, "%-40s = 0x%08x/ 0x%08x/ %d/ reason (%s)\n", + "0x778/ 0x6cc/ Run Count/ Reason", + wl_reg_778, wl_reg_6cc, + coex_stat->cnt_wl[COEX_CNT_WL_COEXRUN], + rtw_coex_get_reason_string(reason)); + seq_printf(m, "%-40s = %3ph\n", + "AFH Map to BT", + coex_dm->wl_ch_info); + seq_printf(m, "%-40s = %s/ %d\n", + "AntDiv/ BtCtrlLPS/ g_busy", + coex_stat->wl_force_lps_ctrl ? "On" : "Off", + coex_stat->wl_gl_busy); seq_printf(m, "%-40s = %u/ %u/ %u/ %u/ %u\n", "Null All/ Retry/ Ack/ BT Empty/ BT Late", coex_stat->wl_fw_dbg_info[1], coex_stat->wl_fw_dbg_info[2], @@ -3040,6 +4114,12 @@ void rtw_coex_display_coex_info(struct rtw_dev *rtwdev, struct seq_file *m) coex_stat->wl_fw_dbg_info[7], coex_stat->wl_slot_extend ? "Yes" : "No", coex_stat->cnt_wl[COEX_CNT_WL_FW_NOTIFY]); + seq_printf(m, "%-40s = %d/ %d/ %s/ %d\n", + "WL_TxPw/ BT_TxPw/ WL_Rx/ BT_LNA_Lvl", + coex_dm->cur_wl_pwr_lvl, + coex_dm->cur_bt_pwr_lvl, + coex_dm->cur_wl_rx_low_gain_en ? "On" : "Off", + coex_dm->cur_bt_lna_lvl); seq_printf(m, "**********************************************\n"); seq_printf(m, "\t\tHW setting\n"); @@ -3074,5 +4154,22 @@ void rtw_coex_display_coex_info(struct rtw_dev *rtwdev, struct seq_file *m) coex_stat->wl_noisy_level); rtw_coex_set_coexinfo_hw(rtwdev, m); + seq_printf(m, "%-40s = %d/ %d/ %d/ %d\n", + "EVM A/ EVM B/ SNR A/ SNR B", + -dm_info->rx_evm_dbm[RF_PATH_A], + -dm_info->rx_evm_dbm[RF_PATH_B], + -dm_info->rx_snr[RF_PATH_A], + -dm_info->rx_snr[RF_PATH_B]); + seq_printf(m, "%-40s = %d/ %d/ %d/ %d\n", + "CCK-CCA/CCK-FA/OFDM-CCA/OFDM-FA", + dm_info->cck_cca_cnt, dm_info->cck_fa_cnt, + dm_info->ofdm_cca_cnt, dm_info->ofdm_fa_cnt); + seq_printf(m, "%-40s = %d/ %d/ %d/ %d\n", "CRC OK CCK/11g/11n/11ac", + dm_info->cck_ok_cnt, dm_info->ofdm_ok_cnt, + dm_info->ht_ok_cnt, dm_info->vht_ok_cnt); + seq_printf(m, "%-40s = %d/ %d/ %d/ %d\n", "CRC Err CCK/11g/11n/11ac", + dm_info->cck_err_cnt, dm_info->ofdm_err_cnt, + dm_info->ht_err_cnt, dm_info->vht_err_cnt); + } #endif /* CONFIG_RTW88_DEBUGFS */ diff --git a/drivers/net/wireless/realtek/rtw88/coex.h b/drivers/net/wireless/realtek/rtw88/coex.h index 44720fdfc0..57cf29da9e 100644 --- a/drivers/net/wireless/realtek/rtw88/coex.h +++ b/drivers/net/wireless/realtek/rtw88/coex.h @@ -5,17 +5,13 @@ #ifndef __RTW_COEX_H__ #define __RTW_COEX_H__ -/* BT profile map bit definition */ -#define BPM_HFP BIT(0) -#define BPM_HID BIT(1) -#define BPM_A2DP BIT(2) -#define BPM_PAN BIT(3) - +#define COEX_CCK_2 0x1 #define COEX_RESP_ACK_BY_WL_FW 0x1 #define COEX_REQUEST_TIMEOUT msecs_to_jiffies(10) #define COEX_MIN_DELAY 10 /* delay unit in ms */ #define COEX_RFK_TIMEOUT 600 /* RFK timeout in ms */ +#define COEX_BT_GAMEHID_CNT 800 #define COEX_RF_OFF 0x0 #define COEX_RF_ON 0x1 @@ -27,10 +23,19 @@ #define COEX_H2C69_TDMA_SLOT 0xb #define PARA1_H2C69_TDMA_4SLOT 0xc1 #define PARA1_H2C69_TDMA_2SLOT 0x1 +#define PARA1_H2C69_TBTT_TIMES GENMASK(5, 0) +#define PARA1_H2C69_TBTT_DIV100 BIT(7) + +#define COEX_H2C69_TOGGLE_TABLE_A 0xd +#define COEX_H2C69_TOGGLE_TABLE_B 0x7 #define TDMA_4SLOT BIT(8) +#define TDMA_TIMER_TYPE_2SLOT 0 +#define TDMA_TIMER_TYPE_4SLOT 3 + #define COEX_RSSI_STEP 4 + #define COEX_RSSI_HIGH(rssi) \ ({ typeof(rssi) __rssi__ = rssi; \ (__rssi__ == COEX_RSSI_STATE_HIGH || \ @@ -146,9 +151,29 @@ enum coex_algorithm { COEX_ALGO_MAX }; +enum coex_bt_profile { + BPM_NOPROFILE = 0, + BPM_HFP = BIT(0), + BPM_HID = BIT(1), + BPM_A2DP = BIT(2), + BPM_PAN = BIT(3), + BPM_HID_HFP = BPM_HID | BPM_HFP, + BPM_A2DP_HFP = BPM_A2DP | BPM_HFP, + BPM_A2DP_HID = BPM_A2DP | BPM_HID, + BPM_A2DP_HID_HFP = BPM_A2DP | BPM_HID | BPM_HFP, + BPM_PAN_HFP = BPM_PAN | BPM_HFP, + BPM_PAN_HID = BPM_PAN | BPM_HID, + BPM_PAN_HID_HFP = BPM_PAN | BPM_HID | BPM_HFP, + BPM_PAN_A2DP = BPM_PAN | BPM_A2DP, + BPM_PAN_A2DP_HFP = BPM_PAN | BPM_A2DP | BPM_HFP, + BPM_PAN_A2DP_HID = BPM_PAN | BPM_A2DP | BPM_HID, + BPM_PAN_A2DP_HID_HFP = BPM_PAN | BPM_A2DP | BPM_HID | BPM_HFP, +}; + enum coex_wl_link_mode { COEX_WLINK_2G1PORT = 0x0, COEX_WLINK_5G = 0x3, + COEX_WLINK_2GFREE = 0x7, COEX_WLINK_MAX }; @@ -302,7 +327,7 @@ struct coex_rf_para { static inline void rtw_coex_set_init(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; chip->ops->coex_set_init(rtwdev); } @@ -310,7 +335,7 @@ static inline void rtw_coex_set_init(struct rtw_dev *rtwdev) static inline void rtw_coex_set_ant_switch(struct rtw_dev *rtwdev, u8 ctrl_type, u8 pos_type) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; if (!chip->ops->coex_set_ant_switch) return; @@ -320,28 +345,28 @@ void rtw_coex_set_ant_switch(struct rtw_dev *rtwdev, u8 ctrl_type, u8 pos_type) static inline void rtw_coex_set_gnt_fix(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; chip->ops->coex_set_gnt_fix(rtwdev); } static inline void rtw_coex_set_gnt_debug(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; chip->ops->coex_set_gnt_debug(rtwdev); } static inline void rtw_coex_set_rfe_type(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; chip->ops->coex_set_rfe_type(rtwdev); } static inline void rtw_coex_set_wl_tx_power(struct rtw_dev *rtwdev, u8 wl_pwr) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; chip->ops->coex_set_wl_tx_power(rtwdev, wl_pwr); } @@ -349,7 +374,7 @@ static inline void rtw_coex_set_wl_tx_power(struct rtw_dev *rtwdev, u8 wl_pwr) static inline void rtw_coex_set_wl_rx_gain(struct rtw_dev *rtwdev, bool low_gain) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; chip->ops->coex_set_wl_rx_gain(rtwdev, low_gain); } @@ -365,19 +390,33 @@ void rtw_coex_bt_reenable_work(struct work_struct *work); void rtw_coex_defreeze_work(struct work_struct *work); void rtw_coex_wl_remain_work(struct work_struct *work); void rtw_coex_bt_remain_work(struct work_struct *work); +void rtw_coex_wl_connecting_work(struct work_struct *work); +void rtw_coex_bt_multi_link_remain_work(struct work_struct *work); +void rtw_coex_wl_ccklock_work(struct work_struct *work); void rtw_coex_power_on_setting(struct rtw_dev *rtwdev); +void rtw_coex_power_off_setting(struct rtw_dev *rtwdev); void rtw_coex_init_hw_config(struct rtw_dev *rtwdev, bool wifi_only); void rtw_coex_ips_notify(struct rtw_dev *rtwdev, u8 type); void rtw_coex_lps_notify(struct rtw_dev *rtwdev, u8 type); void rtw_coex_scan_notify(struct rtw_dev *rtwdev, u8 type); -void rtw_coex_connect_notify(struct rtw_dev *rtwdev, u8 action); -void rtw_coex_media_status_notify(struct rtw_dev *rtwdev, u8 status); -void rtw_coex_bt_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 len); +void rtw_coex_connect_notify(struct rtw_dev *rtwdev, u8 type); +void rtw_coex_media_status_notify(struct rtw_dev *rtwdev, u8 type); +void rtw_coex_bt_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length); +void rtw_coex_bt_hid_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length); void rtw_coex_wl_fwdbginfo_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length); void rtw_coex_switchband_notify(struct rtw_dev *rtwdev, u8 type); -void rtw_coex_wl_status_change_notify(struct rtw_dev *rtwdev); - +void rtw_coex_wl_status_change_notify(struct rtw_dev *rtwdev, u32 type); +void rtw_coex_wl_status_check(struct rtw_dev *rtwdev); +void rtw_coex_query_bt_hid_list(struct rtw_dev *rtwdev); void rtw_coex_display_coex_info(struct rtw_dev *rtwdev, struct seq_file *m); +static inline bool rtw_coex_disabled(struct rtw_dev *rtwdev) +{ + struct rtw_coex *coex = &rtwdev->coex; + struct rtw_coex_stat *coex_stat = &coex->stat; + + return coex_stat->bt_disabled; +} + #endif diff --git a/drivers/net/wireless/realtek/rtw88/compiler.h b/drivers/net/wireless/realtek/rtw88/compiler.h new file mode 100644 index 0000000000..adcd51c87e --- /dev/null +++ b/drivers/net/wireless/realtek/rtw88/compiler.h @@ -0,0 +1,552 @@ +#ifndef __LINUX_COMPILER_H +#define __LINUX_COMPILER_H + +#ifndef __ASSEMBLY__ + +#ifdef __CHECKER__ +# define __user __attribute__((noderef, address_space(1))) +# define __kernel __attribute__((address_space(0))) +# define __safe __attribute__((safe)) +# define __force __attribute__((force)) +# define __nocast __attribute__((nocast)) +# define __iomem __attribute__((noderef, address_space(2))) +# define __must_hold(x) __attribute__((context(x,1,1))) +# define __acquires(x) __attribute__((context(x,0,1))) +# define __releases(x) __attribute__((context(x,1,0))) +# define __acquire(x) __context__(x,1) +# define __release(x) __context__(x,-1) +# define __cond_lock(x,c) ((c) ? ({ __acquire(x); 1; }) : 0) +# define __percpu __attribute__((noderef, address_space(3))) +#ifdef CONFIG_SPARSE_RCU_POINTER +# define __rcu __attribute__((noderef, address_space(4))) +#else /* CONFIG_SPARSE_RCU_POINTER */ +# define __rcu +#endif /* CONFIG_SPARSE_RCU_POINTER */ +# define __private __attribute__((noderef)) +extern void __chk_user_ptr(const volatile void __user *); +extern void __chk_io_ptr(const volatile void __iomem *); +# define ACCESS_PRIVATE(p, member) (*((typeof((p)->member) __force *) &(p)->member)) +#else /* __CHECKER__ */ +# define __user +# define __kernel +# define __safe +# define __force +# define __nocast +# define __iomem +# define __chk_user_ptr(x) (void)0 +# define __chk_io_ptr(x) (void)0 +# define __builtin_warning(x, y...) (1) +# define __must_hold(x) +# define __acquires(x) +# define __releases(x) +# define __acquire(x) (void)0 +# define __release(x) (void)0 +# define __cond_lock(x,c) (c) +# define __percpu +# define __rcu +# define __private +# define ACCESS_PRIVATE(p, member) ((p)->member) +#endif /* __CHECKER__ */ + +/* Indirect macros required for expanded argument pasting, eg. __LINE__. */ +#define ___PASTE(a,b) a##b +#define __PASTE(a,b) ___PASTE(a,b) + +#ifdef __KERNEL__ + +#ifdef __GNUC__ +#include +#endif + +#if defined(CC_USING_HOTPATCH) && !defined(__CHECKER__) +#define notrace __attribute__((hotpatch(0,0))) +#else +#define notrace __attribute__((no_instrument_function)) +#endif + +/* Intel compiler defines __GNUC__. So we will overwrite implementations + * coming from above header files here + */ +#ifdef __INTEL_COMPILER +# include +#endif + +/* Clang compiler defines __GNUC__. So we will overwrite implementations + * coming from above header files here + */ +#ifdef __clang__ +#include +#endif + +/* + * Generic compiler-dependent macros required for kernel + * build go below this comment. Actual compiler/compiler version + * specific implementations come from the above header files + */ + +struct ftrace_branch_data { + const char *func; + const char *file; + unsigned line; + union { + struct { + unsigned long correct; + unsigned long incorrect; + }; + struct { + unsigned long miss; + unsigned long hit; + }; + unsigned long miss_hit[2]; + }; +}; + +/* + * Note: DISABLE_BRANCH_PROFILING can be used by special lowlevel code + * to disable branch tracing on a per file basis. + */ +#if defined(CONFIG_TRACE_BRANCH_PROFILING) \ + && !defined(DISABLE_BRANCH_PROFILING) && !defined(__CHECKER__) +void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect); + +#define likely_notrace(x) __builtin_expect(!!(x), 1) +#define unlikely_notrace(x) __builtin_expect(!!(x), 0) + +#define __branch_check__(x, expect) ({ \ + int ______r; \ + static struct ftrace_branch_data \ + __attribute__((__aligned__(4))) \ + __attribute__((section("_ftrace_annotated_branch"))) \ + ______f = { \ + .func = __func__, \ + .file = __FILE__, \ + .line = __LINE__, \ + }; \ + ______r = likely_notrace(x); \ + ftrace_likely_update(&______f, ______r, expect); \ + ______r; \ + }) + +/* + * Using __builtin_constant_p(x) to ignore cases where the return + * value is always the same. This idea is taken from a similar patch + * written by Daniel Walker. + */ +# ifndef likely +# define likely(x) (__builtin_constant_p(x) ? !!(x) : __branch_check__(x, 1)) +# endif +# ifndef unlikely +# define unlikely(x) (__builtin_constant_p(x) ? !!(x) : __branch_check__(x, 0)) +# endif + +#ifdef CONFIG_PROFILE_ALL_BRANCHES +/* + * "Define 'is'", Bill Clinton + * "Define 'if'", Steven Rostedt + */ +#define if(cond, ...) __trace_if( (cond , ## __VA_ARGS__) ) +#define __trace_if(cond) \ + if (__builtin_constant_p(!!(cond)) ? !!(cond) : \ + ({ \ + int ______r; \ + static struct ftrace_branch_data \ + __attribute__((__aligned__(4))) \ + __attribute__((section("_ftrace_branch"))) \ + ______f = { \ + .func = __func__, \ + .file = __FILE__, \ + .line = __LINE__, \ + }; \ + ______r = !!(cond); \ + ______f.miss_hit[______r]++; \ + ______r; \ + })) +#endif /* CONFIG_PROFILE_ALL_BRANCHES */ + +#else +# define likely(x) __builtin_expect(!!(x), 1) +# define unlikely(x) __builtin_expect(!!(x), 0) +#endif + +/* Optimization barrier */ +#ifndef barrier +# define barrier() __memory_barrier() +#endif + +#ifndef barrier_data +# define barrier_data(ptr) barrier() +#endif + +/* Unreachable code */ +#ifndef unreachable +# define unreachable() do { } while (1) +#endif + +/* + * KENTRY - kernel entry point + * This can be used to annotate symbols (functions or data) that are used + * without their linker symbol being referenced explicitly. For example, + * interrupt vector handlers, or functions in the kernel image that are found + * programatically. + * + * Not required for symbols exported with EXPORT_SYMBOL, or initcalls. Those + * are handled in their own way (with KEEP() in linker scripts). + * + * KENTRY can be avoided if the symbols in question are marked as KEEP() in the + * linker script. For example an architecture could KEEP() its entire + * boot/exception vector code rather than annotate each function and data. + */ +#ifndef KENTRY +# define KENTRY(sym) \ + extern typeof(sym) sym; \ + static const unsigned long __kentry_##sym \ + __used \ + __attribute__((section("___kentry" "+" #sym ), used)) \ + = (unsigned long)&sym; +#endif + +#ifndef RELOC_HIDE +# define RELOC_HIDE(ptr, off) \ + ({ unsigned long __ptr; \ + __ptr = (unsigned long) (ptr); \ + (typeof(ptr)) (__ptr + (off)); }) +#endif + +#ifndef OPTIMIZER_HIDE_VAR +#define OPTIMIZER_HIDE_VAR(var) barrier() +#endif + +/* Not-quite-unique ID. */ +#ifndef __UNIQUE_ID +# define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __LINE__) +#endif + +#include + +#define __READ_ONCE_SIZE \ +({ \ + switch (size) { \ + case 1: *(__u8 *)res = *(volatile __u8 *)p; break; \ + case 2: *(__u16 *)res = *(volatile __u16 *)p; break; \ + case 4: *(__u32 *)res = *(volatile __u32 *)p; break; \ + case 8: *(__u64 *)res = *(volatile __u64 *)p; break; \ + default: \ + barrier(); \ + __builtin_memcpy((void *)res, (const void *)p, size); \ + barrier(); \ + } \ +}) + +static __always_inline +void __read_once_size(const volatile void *p, void *res, int size) +{ + __READ_ONCE_SIZE; +} + +#ifdef CONFIG_KASAN +/* + * This function is not 'inline' because __no_sanitize_address confilcts + * with inlining. Attempt to inline it may cause a build failure. + * https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67368 + * '__maybe_unused' allows us to avoid defined-but-not-used warnings. + */ +static __no_sanitize_address __maybe_unused +void __read_once_size_nocheck(const volatile void *p, void *res, int size) +{ + __READ_ONCE_SIZE; +} +#else +static __always_inline +void __read_once_size_nocheck(const volatile void *p, void *res, int size) +{ + __READ_ONCE_SIZE; +} +#endif + +static __always_inline void __write_once_size(volatile void *p, void *res, int size) +{ + switch (size) { + case 1: *(volatile __u8 *)p = *(__u8 *)res; break; + case 2: *(volatile __u16 *)p = *(__u16 *)res; break; + case 4: *(volatile __u32 *)p = *(__u32 *)res; break; + case 8: *(volatile __u64 *)p = *(__u64 *)res; break; + default: + barrier(); + __builtin_memcpy((void *)p, (const void *)res, size); + barrier(); + } +} + +/* + * Prevent the compiler from merging or refetching reads or writes. The + * compiler is also forbidden from reordering successive instances of + * READ_ONCE, WRITE_ONCE and ACCESS_ONCE (see below), but only when the + * compiler is aware of some particular ordering. One way to make the + * compiler aware of ordering is to put the two invocations of READ_ONCE, + * WRITE_ONCE or ACCESS_ONCE() in different C statements. + * + * In contrast to ACCESS_ONCE these two macros will also work on aggregate + * data types like structs or unions. If the size of the accessed data + * type exceeds the word size of the machine (e.g., 32 bits or 64 bits) + * READ_ONCE() and WRITE_ONCE() will fall back to memcpy(). There's at + * least two memcpy()s: one for the __builtin_memcpy() and then one for + * the macro doing the copy of variable - '__u' allocated on the stack. + * + * Their two major use cases are: (1) Mediating communication between + * process-level code and irq/NMI handlers, all running on the same CPU, + * and (2) Ensuring that the compiler does not fold, spindle, or otherwise + * mutilate accesses that either do not require ordering or that interact + * with an explicit memory barrier or atomic instruction that provides the + * required ordering. + */ + +#define __READ_ONCE(x, check) \ +({ \ + union { typeof(x) __val; char __c[1]; } __u; \ + if (check) \ + __read_once_size(&(x), __u.__c, sizeof(x)); \ + else \ + __read_once_size_nocheck(&(x), __u.__c, sizeof(x)); \ + __u.__val; \ +}) +#define READ_ONCE(x) __READ_ONCE(x, 1) + +/* + * Use READ_ONCE_NOCHECK() instead of READ_ONCE() if you need + * to hide memory access from KASAN. + */ +#define READ_ONCE_NOCHECK(x) __READ_ONCE(x, 0) + +#define WRITE_ONCE(x, val) \ +({ \ + union { typeof(x) __val; char __c[1]; } __u = \ + { .__val = (__force typeof(x)) (val) }; \ + __write_once_size(&(x), __u.__c, sizeof(x)); \ + __u.__val; \ +}) + +#endif /* __KERNEL__ */ + +#endif /* __ASSEMBLY__ */ + +#ifdef __KERNEL__ +/* + * Allow us to mark functions as 'deprecated' and have gcc emit a nice + * warning for each use, in hopes of speeding the functions removal. + * Usage is: + * int __deprecated foo(void) + */ +#ifndef __deprecated +# define __deprecated /* unimplemented */ +#endif + +#ifdef MODULE +#define __deprecated_for_modules __deprecated +#else +#define __deprecated_for_modules +#endif + +#ifndef __must_check +#define __must_check +#endif + +#ifndef CONFIG_ENABLE_MUST_CHECK +#undef __must_check +#define __must_check +#endif +#ifndef CONFIG_ENABLE_WARN_DEPRECATED +#undef __deprecated +#undef __deprecated_for_modules +#define __deprecated +#define __deprecated_for_modules +#endif + +#ifndef __malloc +#define __malloc +#endif + +/* + * Allow us to avoid 'defined but not used' warnings on functions and data, + * as well as force them to be emitted to the assembly file. + * + * As of gcc 3.4, static functions that are not marked with attribute((used)) + * may be elided from the assembly file. As of gcc 3.4, static data not so + * marked will not be elided, but this may change in a future gcc version. + * + * NOTE: Because distributions shipped with a backported unit-at-a-time + * compiler in gcc 3.3, we must define __used to be __attribute__((used)) + * for gcc >=3.3 instead of 3.4. + * + * In prior versions of gcc, such functions and data would be emitted, but + * would be warned about except with attribute((unused)). + * + * Mark functions that are referenced only in inline assembly as __used so + * the code is emitted even though it appears to be unreferenced. + */ +#ifndef __used +# define __used /* unimplemented */ +#endif + +#ifndef __maybe_unused +# define __maybe_unused /* unimplemented */ +#endif + +#ifndef __always_unused +# define __always_unused /* unimplemented */ +#endif + +#ifndef noinline +#define noinline +#endif + +/* + * Rather then using noinline to prevent stack consumption, use + * noinline_for_stack instead. For documentation reasons. + */ +#define noinline_for_stack noinline + +#ifndef __always_inline +#define __always_inline inline +#endif + +#endif /* __KERNEL__ */ + +/* + * From the GCC manual: + * + * Many functions do not examine any values except their arguments, + * and have no effects except the return value. Basically this is + * just slightly more strict class than the `pure' attribute above, + * since function is not allowed to read global memory. + * + * Note that a function that has pointer arguments and examines the + * data pointed to must _not_ be declared `const'. Likewise, a + * function that calls a non-`const' function usually must not be + * `const'. It does not make sense for a `const' function to return + * `void'. + */ +#ifndef __attribute_const__ +# define __attribute_const__ /* unimplemented */ +#endif + +#ifndef __latent_entropy +# define __latent_entropy +#endif + +/* + * Tell gcc if a function is cold. The compiler will assume any path + * directly leading to the call is unlikely. + */ + +#ifndef __cold +#define __cold +#endif + +/* Simple shorthand for a section definition */ +#ifndef __section +# define __section(S) __attribute__ ((__section__(#S))) +#endif + +#ifndef __visible +#define __visible +#endif + +/* + * Assume alignment of return value. + */ +#ifndef __assume_aligned +#define __assume_aligned(a, ...) +#endif + + +/* Are two types/vars the same type (ignoring qualifiers)? */ +#ifndef __same_type +# define __same_type(a, b) __builtin_types_compatible_p(typeof(a), typeof(b)) +#endif + +/* Is this type a native word size -- useful for atomic operations */ +#ifndef __native_word +# define __native_word(t) (sizeof(t) == sizeof(char) || sizeof(t) == sizeof(short) || sizeof(t) == sizeof(int) || sizeof(t) == sizeof(long)) +#endif + +/* Compile time object size, -1 for unknown */ +#ifndef __compiletime_object_size +# define __compiletime_object_size(obj) -1 +#endif +#ifndef __compiletime_warning +# define __compiletime_warning(message) +#endif +#ifndef __compiletime_error +# define __compiletime_error(message) +# ifndef __CHECKER__ +# define __compiletime_error_fallback(condition) \ + do { ((void)sizeof(char[1 - 2 * condition])); } while (0) +# endif +#endif +#ifndef __compiletime_error_fallback +# define __compiletime_error_fallback(condition) do { } while (0) +#endif + +/* + * Prevent the compiler from merging or refetching accesses. The compiler + * is also forbidden from reordering successive instances of ACCESS_ONCE(), + * but only when the compiler is aware of some particular ordering. One way + * to make the compiler aware of ordering is to put the two invocations of + * ACCESS_ONCE() in different C statements. + * + * ACCESS_ONCE will only work on scalar types. For union types, ACCESS_ONCE + * on a union member will work as long as the size of the member matches the + * size of the union and the size is smaller than word size. + * + * The major use cases of ACCESS_ONCE used to be (1) Mediating communication + * between process-level code and irq/NMI handlers, all running on the same CPU, + * and (2) Ensuring that the compiler does not fold, spindle, or otherwise + * mutilate accesses that either do not require ordering or that interact + * with an explicit memory barrier or atomic instruction that provides the + * required ordering. + * + * If possible use READ_ONCE()/WRITE_ONCE() instead. + */ +#define __ACCESS_ONCE(x) ({ \ + __maybe_unused typeof(x) __var = (__force typeof(x)) 0; \ + (volatile typeof(x) *)&(x); }) +#define ACCESS_ONCE(x) (*__ACCESS_ONCE(x)) + +/** + * lockless_dereference() - safely load a pointer for later dereference + * @p: The pointer to load + * + * Similar to rcu_dereference(), but for situations where the pointed-to + * object's lifetime is managed by something other than RCU. That + * "something other" might be reference counting or simple immortality. + * + * The seemingly unused variable ___typecheck_p validates that @p is + * indeed a pointer type by using a pointer to typeof(*p) as the type. + * Taking a pointer to typeof(*p) again is needed in case p is void *. + */ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 8, 0) +#define lockless_dereference(p) \ +({ \ + typeof(p) _________p1 = READ_ONCE(p); \ + typeof(*(p)) *___typecheck_p __maybe_unused; \ + smp_read_barrier_depends(); /* Dependency order vs. p above. */ \ + (_________p1); \ +}) +#else +#define lockless_dereference(p) \ +({ \ + typeof(p) _________p1 = READ_ONCE(p); \ + smp_read_barrier_depends(); /* Dependency order vs. p above. */ \ + (_________p1); \ +}) +#endif + +/* Ignore/forbid kprobes attach on very low level functions marked by this attribute: */ +#ifdef CONFIG_KPROBES +# define __kprobes __attribute__((__section__(".kprobes.text"))) +# define nokprobe_inline __always_inline +#else +# define __kprobes +# define nokprobe_inline inline +#endif +#endif /* __LINUX_COMPILER_H */ diff --git a/drivers/net/wireless/realtek/rtw88/debug.c b/drivers/net/wireless/realtek/rtw88/debug.c index 8bb6cc8ca7..35bc37a3c4 100644 --- a/drivers/net/wireless/realtek/rtw88/debug.c +++ b/drivers/net/wireless/realtek/rtw88/debug.c @@ -10,6 +10,9 @@ #include "fw.h" #include "debug.h" #include "phy.h" +#include "reg.h" +#include "ps.h" +#include "regd.h" #ifdef CONFIG_RTW88_DEBUGFS @@ -34,9 +37,17 @@ struct rtw_debugfs_priv { u32 addr; u32 len; } read_reg; + struct { + u8 bit; + } dm_cap; }; }; +static const char * const rtw_dm_cap_strs[] = { + [RTW_DM_CAP_NA] = "NA", + [RTW_DM_CAP_TXGAPK] = "TXGAPK", +}; + static int rtw_debugfs_single_show(struct seq_file *m, void *v) { struct rtw_debugfs_priv *debugfs_priv = m->private; @@ -133,7 +144,9 @@ static int rtw_debugfs_get_rf_read(struct seq_file *m, void *v) addr = debugfs_priv->rf_addr; mask = debugfs_priv->rf_mask; + mutex_lock(&rtwdev->mutex); val = rtw_read_rf(rtwdev, path, addr, mask); + mutex_unlock(&rtwdev->mutex); seq_printf(m, "rf_read path:%d addr:0x%08x mask:0x%08x val=0x%08x\n", path, addr, mask, val); @@ -141,6 +154,22 @@ static int rtw_debugfs_get_rf_read(struct seq_file *m, void *v) return 0; } +static int rtw_debugfs_get_fix_rate(struct seq_file *m, void *v) +{ + struct rtw_debugfs_priv *debugfs_priv = m->private; + struct rtw_dev *rtwdev = debugfs_priv->rtwdev; + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + u8 fix_rate = dm_info->fix_rate; + + if (fix_rate >= DESC_RATE_MAX) { + seq_printf(m, "Fix rate disabled, fix_rate = %u\n", fix_rate); + return 0; + } + + seq_printf(m, "Data frames fixed at desc rate %u\n", fix_rate); + return 0; +} + static int rtw_debugfs_copy_from_user(char tmp[], int size, const char __user *buffer, size_t count, int num) @@ -154,8 +183,8 @@ static int rtw_debugfs_copy_from_user(char tmp[], int size, tmp_len = (count > size - 1 ? size - 1 : count); - if (!buffer || copy_from_user(tmp, buffer, tmp_len)) - return count; + if (copy_from_user(tmp, buffer, tmp_len)) + return -EFAULT; tmp[tmp_len] = '\0'; @@ -172,13 +201,16 @@ static ssize_t rtw_debugfs_set_read_reg(struct file *filp, char tmp[32 + 1]; u32 addr, len; int num; + int ret; - rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 2); + ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 2); + if (ret) + return ret; num = sscanf(tmp, "%x %x", &addr, &len); if (num != 2) - return count; + return -EINVAL; if (len != 1 && len != 2 && len != 4) { rtw_warn(rtwdev, "read reg setting wrong len\n"); @@ -242,11 +274,7 @@ static int rtw_debugfs_get_rsvd_page(struct seq_file *m, void *v) for (i = 0 ; i < buf_size ; i += 8) { if (i % page_size == 0) seq_printf(m, "PAGE %d\n", (i + offset) / page_size); - seq_printf(m, "%2.2x %2.2x %2.2x %2.2x %2.2x %2.2x %2.2x %2.2x\n", - *(buf + i), *(buf + i + 1), - *(buf + i + 2), *(buf + i + 3), - *(buf + i + 4), *(buf + i + 5), - *(buf + i + 6), *(buf + i + 7)); + seq_printf(m, "%8ph\n", buf + i); } vfree(buf); @@ -263,8 +291,11 @@ static ssize_t rtw_debugfs_set_rsvd_page(struct file *filp, char tmp[32 + 1]; u32 offset, page_num; int num; + int ret; - rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 2); + ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 2); + if (ret) + return ret; num = sscanf(tmp, "%d %d", &offset, &page_num); @@ -289,8 +320,11 @@ static ssize_t rtw_debugfs_set_single_input(struct file *filp, char tmp[32 + 1]; u32 input; int num; + int ret; - rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 1); + ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 1); + if (ret) + return ret; num = kstrtoint(tmp, 0, &input); @@ -313,14 +347,17 @@ static ssize_t rtw_debugfs_set_write_reg(struct file *filp, char tmp[32 + 1]; u32 addr, val, len; int num; + int ret; - rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 3); + ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 3); + if (ret) + return ret; /* write BB/MAC register */ num = sscanf(tmp, "%x %x %x", &addr, &val, &len); if (num != 3) - return count; + return -EINVAL; switch (len) { case 1: @@ -356,18 +393,23 @@ static ssize_t rtw_debugfs_set_h2c(struct file *filp, char tmp[32 + 1]; u8 param[8]; int num; + int ret; - rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 3); + ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 3); + if (ret) + return ret; num = sscanf(tmp, "%hhx,%hhx,%hhx,%hhx,%hhx,%hhx,%hhx,%hhx", ¶m[0], ¶m[1], ¶m[2], ¶m[3], ¶m[4], ¶m[5], ¶m[6], ¶m[7]); if (num != 8) { - rtw_info(rtwdev, "invalid H2C command format for debug\n"); + rtw_warn(rtwdev, "invalid H2C command format for debug\n"); return -EINVAL; } + mutex_lock(&rtwdev->mutex); rtw_fw_h2c_cmd_dbg(rtwdev, param); + mutex_unlock(&rtwdev->mutex); return count; } @@ -381,17 +423,22 @@ static ssize_t rtw_debugfs_set_rf_write(struct file *filp, char tmp[32 + 1]; u32 path, addr, mask, val; int num; + int ret; - rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 4); + ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 4); + if (ret) + return ret; num = sscanf(tmp, "%x %x %x %x", &path, &addr, &mask, &val); if (num != 4) { rtw_warn(rtwdev, "invalid args, [path] [addr] [mask] [val]\n"); - return count; + return -EINVAL; } + mutex_lock(&rtwdev->mutex); rtw_write_rf(rtwdev, path, addr, mask, val); + mutex_unlock(&rtwdev->mutex); rtw_dbg(rtwdev, RTW_DBG_DEBUGFS, "write_rf path:%d addr:0x%08x mask:0x%08x, val:0x%08x\n", path, addr, mask, val); @@ -409,14 +456,17 @@ static ssize_t rtw_debugfs_set_rf_read(struct file *filp, char tmp[32 + 1]; u32 path, addr, mask; int num; + int ret; - rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 3); + ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 3); + if (ret) + return ret; num = sscanf(tmp, "%x %x %x", &path, &addr, &mask); if (num != 3) { rtw_warn(rtwdev, "invalid args, [path] [addr] [mask] [val]\n"); - return count; + return -EINVAL; } debugfs_priv->rf_path = path; @@ -426,6 +476,33 @@ static ssize_t rtw_debugfs_set_rf_read(struct file *filp, return count; } +static ssize_t rtw_debugfs_set_fix_rate(struct file *filp, + const char __user *buffer, + size_t count, loff_t *loff) +{ + struct seq_file *seqpriv = (struct seq_file *)filp->private_data; + struct rtw_debugfs_priv *debugfs_priv = seqpriv->private; + struct rtw_dev *rtwdev = debugfs_priv->rtwdev; + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + u8 fix_rate; + char tmp[32 + 1]; + int ret; + + ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 1); + if (ret) + return ret; + + ret = kstrtou8(tmp, 0, &fix_rate); + if (ret) { + rtw_warn(rtwdev, "invalid args, [rate]\n"); + return ret; + } + + dm_info->fix_rate = fix_rate; + + return count; +} + static int rtw_debug_get_mac_page(struct seq_file *m, void *v) { struct rtw_debugfs_priv *debugfs_priv = m->private; @@ -471,6 +548,8 @@ static int rtw_debug_get_rf_dump(struct seq_file *m, void *v) u32 addr, offset, data; u8 path; + mutex_lock(&rtwdev->mutex); + for (path = 0; path < rtwdev->hal.rf_path_num; path++) { seq_printf(m, "RF path:%d\n", path); for (addr = 0; addr < 0x100; addr += 4) { @@ -485,6 +564,8 @@ static int rtw_debug_get_rf_dump(struct seq_file *m, void *v) seq_puts(m, "\n"); } + mutex_unlock(&rtwdev->mutex); + return 0; } @@ -573,15 +654,19 @@ static int rtw_debugfs_get_tx_pwr_tbl(struct seq_file *m, void *v) struct rtw_debugfs_priv *debugfs_priv = m->private; struct rtw_dev *rtwdev = debugfs_priv->rtwdev; struct rtw_hal *hal = &rtwdev->hal; - u8 path, rate; + u8 path, rate, bw, ch, regd; struct rtw_power_params pwr_param = {0}; - u8 bw = hal->current_band_width; - u8 ch = hal->current_channel; - u8 regd = rtwdev->regd.txpwr_regd; + mutex_lock(&rtwdev->mutex); + bw = hal->current_band_width; + ch = hal->current_channel; + regd = rtw_regd_get(rtwdev); + + seq_printf(m, "channel: %u\n", ch); + seq_printf(m, "bandwidth: %u\n", bw); seq_printf(m, "regulatory: %s\n", rtw_get_regd_string(regd)); - seq_printf(m, "%-4s %-10s %-3s%6s %-4s %4s (%-4s %-4s) %-4s\n", - "path", "rate", "pwr", "", "base", "", "byr", "lmt", "rem"); + seq_printf(m, "%-4s %-10s %-9s %-9s (%-4s %-4s %-4s) %-4s\n", + "path", "rate", "pwr", "base", "byr", "lmt", "sar", "rem"); mutex_lock(&hal->tx_power_mutex); for (path = RF_PATH_A; path <= RF_PATH_B; path++) { @@ -603,22 +688,48 @@ static int rtw_debugfs_get_tx_pwr_tbl(struct seq_file *m, void *v) seq_printf(m, "%4c ", path + 'A'); rtw_print_rate(m, rate); - seq_printf(m, " %3u(0x%02x) %4u %4d (%4d %4d) %4d\n", + seq_printf(m, " %3u(0x%02x) %4u %4d (%4d %4d %4d) %4d\n", hal->tx_pwr_tbl[path][rate], hal->tx_pwr_tbl[path][rate], pwr_param.pwr_base, - min_t(s8, pwr_param.pwr_offset, - pwr_param.pwr_limit), + min3(pwr_param.pwr_offset, + pwr_param.pwr_limit, + pwr_param.pwr_sar), pwr_param.pwr_offset, pwr_param.pwr_limit, + pwr_param.pwr_sar, pwr_param.pwr_remnant); } } mutex_unlock(&hal->tx_power_mutex); + mutex_unlock(&rtwdev->mutex); return 0; } +void rtw_debugfs_get_simple_phy_info(struct seq_file *m) +{ + struct rtw_debugfs_priv *debugfs_priv = m->private; + struct rtw_dev *rtwdev = debugfs_priv->rtwdev; + struct rtw_hal *hal = &rtwdev->hal; + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + struct rtw_traffic_stats *stats = &rtwdev->stats; + + seq_printf(m, "%-40s = %ddBm/ %d\n", "RSSI/ STA Channel", + dm_info->rssi[RF_PATH_A] - 100, hal->current_channel); + + seq_printf(m, "TP {Tx, Rx} = {%u, %u}Mbps\n", + stats->tx_throughput, stats->rx_throughput); + + seq_puts(m, "[Tx Rate] = "); + rtw_print_rate(m, dm_info->tx_rate); + seq_printf(m, "(0x%x)\n", dm_info->tx_rate); + + seq_puts(m, "[Rx Rate] = "); + rtw_print_rate(m, dm_info->curr_rx_rate); + seq_printf(m, "(0x%x)\n", dm_info->curr_rx_rate); +} + static int rtw_debugfs_get_phy_info(struct seq_file *m, void *v) { struct rtw_debugfs_priv *debugfs_priv = m->private; @@ -636,8 +747,10 @@ static int rtw_debugfs_get_phy_info(struct seq_file *m, void *v) seq_printf(m, "Current CH(fc) = %u\n", rtwdev->hal.current_channel); seq_printf(m, "Current BW = %u\n", rtwdev->hal.current_band_width); seq_printf(m, "Current IGI = 0x%x\n", dm_info->igi_history[0]); - seq_printf(m, "TP {Tx, Rx} = {%u, %u}Mbps\n\n", + seq_printf(m, "TP {Tx, Rx} = {%u, %u}Mbps\n", stats->tx_throughput, stats->rx_throughput); + seq_printf(m, "1SS for TX and RX = %c\n\n", rtwdev->hal.txrx_1ss ? + 'Y' : 'N'); seq_puts(m, "==========[Tx Phy Info]========\n"); seq_puts(m, "[Tx Rate] = "); @@ -751,7 +864,9 @@ static int rtw_debugfs_get_coex_info(struct seq_file *m, void *v) struct rtw_debugfs_priv *debugfs_priv = m->private; struct rtw_dev *rtwdev = debugfs_priv->rtwdev; + mutex_lock(&rtwdev->mutex); rtw_coex_display_coex_info(rtwdev, m); + mutex_unlock(&rtwdev->mutex); return 0; } @@ -768,7 +883,9 @@ static ssize_t rtw_debugfs_set_coex_enable(struct file *filp, bool enable; int ret; - rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 1); + ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 1); + if (ret) + return ret; ret = kstrtobool(tmp, &enable); if (ret) { @@ -777,7 +894,7 @@ static ssize_t rtw_debugfs_set_coex_enable(struct file *filp, } mutex_lock(&rtwdev->mutex); - coex->stop_dm = enable == 0; + coex->manual_control = !enable; mutex_unlock(&rtwdev->mutex); return count; @@ -790,11 +907,201 @@ static int rtw_debugfs_get_coex_enable(struct seq_file *m, void *v) struct rtw_coex *coex = &rtwdev->coex; seq_printf(m, "coex mechanism %s\n", - coex->stop_dm ? "disabled" : "enabled"); + coex->manual_control ? "disabled" : "enabled"); return 0; } +static ssize_t rtw_debugfs_set_edcca_enable(struct file *filp, + const char __user *buffer, + size_t count, loff_t *loff) +{ + struct seq_file *seqpriv = (struct seq_file *)filp->private_data; + struct rtw_debugfs_priv *debugfs_priv = seqpriv->private; + struct rtw_dev *rtwdev = debugfs_priv->rtwdev; + bool input; + int err; + + err = kstrtobool_from_user(buffer, count, &input); + if (err) + return err; + + rtw_edcca_enabled = input; + rtw_phy_adaptivity_set_mode(rtwdev); + + return count; +} + +static int rtw_debugfs_get_edcca_enable(struct seq_file *m, void *v) +{ + struct rtw_debugfs_priv *debugfs_priv = m->private; + struct rtw_dev *rtwdev = debugfs_priv->rtwdev; + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + + seq_printf(m, "EDCCA %s: EDCCA mode %d\n", + rtw_edcca_enabled ? "enabled" : "disabled", + dm_info->edcca_mode); + return 0; +} + +static ssize_t rtw_debugfs_set_fw_crash(struct file *filp, + const char __user *buffer, + size_t count, loff_t *loff) +{ + struct seq_file *seqpriv = (struct seq_file *)filp->private_data; + struct rtw_debugfs_priv *debugfs_priv = seqpriv->private; + struct rtw_dev *rtwdev = debugfs_priv->rtwdev; + char tmp[32 + 1]; + bool input; + int ret; + + ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 1); + if (ret) + return ret; + + ret = kstrtobool(tmp, &input); + if (ret) + return -EINVAL; + + if (!input) + return -EINVAL; + + if (test_bit(RTW_FLAG_RESTARTING, rtwdev->flags)) + return -EINPROGRESS; + + mutex_lock(&rtwdev->mutex); + rtw_leave_lps_deep(rtwdev); + set_bit(RTW_FLAG_RESTART_TRIGGERING, rtwdev->flags); + rtw_write8(rtwdev, REG_HRCV_MSG, 1); + mutex_unlock(&rtwdev->mutex); + + return count; +} + +static int rtw_debugfs_get_fw_crash(struct seq_file *m, void *v) +{ + struct rtw_debugfs_priv *debugfs_priv = m->private; + struct rtw_dev *rtwdev = debugfs_priv->rtwdev; + + seq_printf(m, "%d\n", + test_bit(RTW_FLAG_RESTART_TRIGGERING, rtwdev->flags) || + test_bit(RTW_FLAG_RESTARTING, rtwdev->flags)); + return 0; +} + +static ssize_t rtw_debugfs_set_force_lowest_basic_rate(struct file *filp, + const char __user *buffer, + size_t count, loff_t *loff) +{ + struct seq_file *seqpriv = (struct seq_file *)filp->private_data; + struct rtw_debugfs_priv *debugfs_priv = seqpriv->private; + struct rtw_dev *rtwdev = debugfs_priv->rtwdev; + bool input; + int err; + + err = kstrtobool_from_user(buffer, count, &input); + if (err) + return err; + + if (input) + set_bit(RTW_FLAG_FORCE_LOWEST_RATE, rtwdev->flags); + else + clear_bit(RTW_FLAG_FORCE_LOWEST_RATE, rtwdev->flags); + + return count; +} + +static int rtw_debugfs_get_force_lowest_basic_rate(struct seq_file *m, void *v) +{ + struct rtw_debugfs_priv *debugfs_priv = m->private; + struct rtw_dev *rtwdev = debugfs_priv->rtwdev; + + seq_printf(m, "force lowest basic rate: %d\n", + test_bit(RTW_FLAG_FORCE_LOWEST_RATE, rtwdev->flags)); + + return 0; +} + +static ssize_t rtw_debugfs_set_dm_cap(struct file *filp, + const char __user *buffer, + size_t count, loff_t *loff) +{ + struct seq_file *seqpriv = (struct seq_file *)filp->private_data; + struct rtw_debugfs_priv *debugfs_priv = seqpriv->private; + struct rtw_dev *rtwdev = debugfs_priv->rtwdev; + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + int bit; + bool en; + + if (kstrtoint_from_user(buffer, count, 10, &bit)) + return -EINVAL; + + en = bit > 0; + bit = abs(bit); + + if (bit >= RTW_DM_CAP_NUM) { + rtw_warn(rtwdev, "unknown DM CAP %d\n", bit); + return -EINVAL; + } + + if (en) + dm_info->dm_flags &= ~BIT(bit); + else + dm_info->dm_flags |= BIT(bit); + + debugfs_priv->dm_cap.bit = bit; + + return count; +} + +static void dump_gapk_status(struct rtw_dev *rtwdev, struct seq_file *m) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + struct rtw_gapk_info *txgapk = &rtwdev->dm_info.gapk; + int i, path; + u32 val; + + seq_printf(m, "\n(%2d) %c%s\n\n", RTW_DM_CAP_TXGAPK, + dm_info->dm_flags & BIT(RTW_DM_CAP_TXGAPK) ? '-' : '+', + rtw_dm_cap_strs[RTW_DM_CAP_TXGAPK]); + + mutex_lock(&rtwdev->mutex); + + for (path = 0; path < rtwdev->hal.rf_path_num; path++) { + val = rtw_read_rf(rtwdev, path, RF_GAINTX, RFREG_MASK); + seq_printf(m, "path %d:\n0x%x = 0x%x\n", path, RF_GAINTX, val); + + for (i = 0; i < RF_HW_OFFSET_NUM; i++) + seq_printf(m, "[TXGAPK] offset %d %d\n", + txgapk->rf3f_fs[path][i], i); + seq_puts(m, "\n"); + } + mutex_unlock(&rtwdev->mutex); +} + +static int rtw_debugfs_get_dm_cap(struct seq_file *m, void *v) +{ + struct rtw_debugfs_priv *debugfs_priv = m->private; + struct rtw_dev *rtwdev = debugfs_priv->rtwdev; + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + int i; + + switch (debugfs_priv->dm_cap.bit) { + case RTW_DM_CAP_TXGAPK: + dump_gapk_status(rtwdev, m); + break; + default: + for (i = 1; i < RTW_DM_CAP_NUM; i++) { + seq_printf(m, "(%2d) %c%s\n", i, + dm_info->dm_flags & BIT(i) ? '-' : '+', + rtw_dm_cap_strs[i]); + } + break; + } + debugfs_priv->dm_cap.bit = RTW_DM_CAP_NA; + return 0; +} + #define rtw_debug_impl_mac(page, addr) \ static struct rtw_debugfs_priv rtw_debug_priv_mac_ ##page = { \ .cb_read = rtw_debug_get_mac_page, \ @@ -875,6 +1182,11 @@ static struct rtw_debugfs_priv rtw_debug_priv_read_reg = { .cb_read = rtw_debugfs_get_read_reg, }; +static struct rtw_debugfs_priv rtw_debug_priv_fix_rate = { + .cb_write = rtw_debugfs_set_fix_rate, + .cb_read = rtw_debugfs_get_fix_rate, +}; + static struct rtw_debugfs_priv rtw_debug_priv_dump_cam = { .cb_write = rtw_debugfs_set_single_input, .cb_read = rtw_debugfs_get_dump_cam, @@ -898,12 +1210,32 @@ static struct rtw_debugfs_priv rtw_debug_priv_coex_info = { .cb_read = rtw_debugfs_get_coex_info, }; +static struct rtw_debugfs_priv rtw_debug_priv_edcca_enable = { + .cb_write = rtw_debugfs_set_edcca_enable, + .cb_read = rtw_debugfs_get_edcca_enable, +}; + +static struct rtw_debugfs_priv rtw_debug_priv_fw_crash = { + .cb_write = rtw_debugfs_set_fw_crash, + .cb_read = rtw_debugfs_get_fw_crash, +}; + +static struct rtw_debugfs_priv rtw_debug_priv_force_lowest_basic_rate = { + .cb_write = rtw_debugfs_set_force_lowest_basic_rate, + .cb_read = rtw_debugfs_get_force_lowest_basic_rate, +}; + +static struct rtw_debugfs_priv rtw_debug_priv_dm_cap = { + .cb_write = rtw_debugfs_set_dm_cap, + .cb_read = rtw_debugfs_get_dm_cap, +}; + #define rtw_debugfs_add_core(name, mode, fopname, parent) \ do { \ rtw_debug_priv_ ##name.rtwdev = rtwdev; \ - if (!debugfs_create_file(#name, mode, \ + if (IS_ERR(debugfs_create_file(#name, mode, \ parent, &rtw_debug_priv_ ##name,\ - &file_ops_ ##fopname)) \ + &file_ops_ ##fopname))) \ pr_debug("Unable to initialize debugfs:%s\n", \ #name); \ } while (0) @@ -925,6 +1257,7 @@ void rtw_debugfs_init(struct rtw_dev *rtwdev) rtw_debugfs_add_rw(read_reg); rtw_debugfs_add_w(rf_write); rtw_debugfs_add_rw(rf_read); + rtw_debugfs_add_rw(fix_rate); rtw_debugfs_add_rw(dump_cam); rtw_debugfs_add_rw(rsvd_page); rtw_debugfs_add_r(phy_info); @@ -971,6 +1304,10 @@ void rtw_debugfs_init(struct rtw_dev *rtwdev) } rtw_debugfs_add_r(rf_dump); rtw_debugfs_add_r(tx_pwr_tbl); + rtw_debugfs_add_rw(edcca_enable); + rtw_debugfs_add_rw(fw_crash); + rtw_debugfs_add_rw(force_lowest_basic_rate); + rtw_debugfs_add_rw(dm_cap); } #endif /* CONFIG_RTW88_DEBUGFS */ diff --git a/drivers/net/wireless/realtek/rtw88/debug.h b/drivers/net/wireless/realtek/rtw88/debug.h index a0f36f29b4..a9149c6c2b 100644 --- a/drivers/net/wireless/realtek/rtw88/debug.h +++ b/drivers/net/wireless/realtek/rtw88/debug.h @@ -19,6 +19,12 @@ enum rtw_debug_mask { RTW_DBG_PS = 0x00000400, RTW_DBG_BF = 0x00000800, RTW_DBG_WOW = 0x00001000, + RTW_DBG_CFO = 0x00002000, + RTW_DBG_PATH_DIV = 0x00004000, + RTW_DBG_ADAPTIVITY = 0x00008000, + RTW_DBG_HW_SCAN = 0x00010000, + RTW_DBG_STATE = 0x00020000, + RTW_DBG_SDIO = 0x00040000, RTW_DBG_ALL = 0xffffffff }; @@ -26,6 +32,7 @@ enum rtw_debug_mask { #ifdef CONFIG_RTW88_DEBUGFS void rtw_debugfs_init(struct rtw_dev *rtwdev); +void rtw_debugfs_get_simple_phy_info(struct seq_file *m); #else diff --git a/drivers/net/wireless/realtek/rtw88/efuse.c b/drivers/net/wireless/realtek/rtw88/efuse.c index c266c84ef2..b85075cd68 100644 --- a/drivers/net/wireless/realtek/rtw88/efuse.c +++ b/drivers/net/wireless/realtek/rtw88/efuse.c @@ -86,7 +86,7 @@ static int rtw_dump_logical_efuse_map(struct rtw_dev *rtwdev, u8 *phy_map, static int rtw_dump_physical_efuse_map(struct rtw_dev *rtwdev, u8 *map) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; u32 size = rtwdev->efuse.physical_size; u32 efuse_ctl; u32 addr; @@ -145,7 +145,7 @@ EXPORT_SYMBOL(rtw_read8_physical_efuse); int rtw_parse_efuse_map(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_efuse *efuse = &rtwdev->efuse; u32 phy_size = efuse->physical_size; u32 log_size = efuse->logical_size; diff --git a/drivers/net/wireless/realtek/rtw88/fw.c b/drivers/net/wireless/realtek/rtw88/fw.c index 40bcfabd2d..071e8ec2f8 100644 --- a/drivers/net/wireless/realtek/rtw88/fw.c +++ b/drivers/net/wireless/realtek/rtw88/fw.c @@ -13,6 +13,9 @@ #include "debug.h" #include "util.h" #include "wow.h" +#include "ps.h" +#include "phy.h" +#include "mac.h" static void rtw_fw_c2h_cmd_handle_ext(struct rtw_dev *rtwdev, struct sk_buff *skb) @@ -27,6 +30,12 @@ static void rtw_fw_c2h_cmd_handle_ext(struct rtw_dev *rtwdev, case C2H_CCX_RPT: rtw_tx_report_handle(rtwdev, skb, C2H_CCX_RPT); break; + case C2H_SCAN_STATUS_RPT: + rtw_hw_scan_status_report(rtwdev, skb); + break; + case C2H_CHAN_SWITCH: + rtw_hw_scan_chan_switch(rtwdev, skb); + break; default: break; } @@ -109,7 +118,11 @@ static void rtw_fw_ra_report_iter(void *data, struct ieee80211_sta *sta) si->ra_report.desc_rate = rate; si->ra_report.bit_rate = bit_rate; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0) + sta->deflink.agg.max_rc_amsdu_len = get_max_amsdu_len(bit_rate); +#else sta->max_rc_amsdu_len = get_max_amsdu_len(bit_rate); +#endif } static void rtw_fw_ra_report_handle(struct rtw_dev *rtwdev, u8 *payload, @@ -126,6 +139,84 @@ static void rtw_fw_ra_report_handle(struct rtw_dev *rtwdev, u8 *payload, rtw_iterate_stas_atomic(rtwdev, rtw_fw_ra_report_iter, &ra_data); } +struct rtw_beacon_filter_iter_data { + struct rtw_dev *rtwdev; + u8 *payload; +}; + +static void rtw_fw_bcn_filter_notify_vif_iter(void *data, + struct ieee80211_vif *vif) +{ + struct rtw_beacon_filter_iter_data *iter_data = data; + struct rtw_dev *rtwdev = iter_data->rtwdev; + u8 *payload = iter_data->payload; + u8 type = GET_BCN_FILTER_NOTIFY_TYPE(payload); + u8 event = GET_BCN_FILTER_NOTIFY_EVENT(payload); + s8 sig = (s8)GET_BCN_FILTER_NOTIFY_RSSI(payload); + + switch (type) { + case BCN_FILTER_NOTIFY_SIGNAL_CHANGE: + event = event ? NL80211_CQM_RSSI_THRESHOLD_EVENT_HIGH : + NL80211_CQM_RSSI_THRESHOLD_EVENT_LOW; + ieee80211_cqm_rssi_notify(vif, event, sig, GFP_KERNEL); + break; + case BCN_FILTER_CONNECTION_LOSS: + ieee80211_connection_loss(vif); + break; + case BCN_FILTER_CONNECTED: + rtwdev->beacon_loss = false; + break; + case BCN_FILTER_NOTIFY_BEACON_LOSS: + rtwdev->beacon_loss = true; + rtw_leave_lps(rtwdev); + break; + } +} + +static void rtw_fw_bcn_filter_notify(struct rtw_dev *rtwdev, u8 *payload, + u8 length) +{ + struct rtw_beacon_filter_iter_data dev_iter_data; + + dev_iter_data.rtwdev = rtwdev; + dev_iter_data.payload = payload; + rtw_iterate_vifs(rtwdev, rtw_fw_bcn_filter_notify_vif_iter, + &dev_iter_data); +} + +static void rtw_fw_scan_result(struct rtw_dev *rtwdev, u8 *payload, + u8 length) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + + dm_info->scan_density = payload[0]; + + rtw_dbg(rtwdev, RTW_DBG_FW, "scan.density = %x\n", + dm_info->scan_density); +} + +static void rtw_fw_adaptivity_result(struct rtw_dev *rtwdev, u8 *payload, + u8 length) +{ + struct rtw_hw_reg_offset *edcca_th = rtwdev->chip->edcca_th; + struct rtw_c2h_adaptivity *result = (struct rtw_c2h_adaptivity *)payload; + + rtw_dbg(rtwdev, RTW_DBG_ADAPTIVITY, + "Adaptivity: density %x igi %x l2h_th_init %x l2h %x h2l %x option %x\n", + result->density, result->igi, result->l2h_th_init, result->l2h, + result->h2l, result->option); + + rtw_dbg(rtwdev, RTW_DBG_ADAPTIVITY, "Reg Setting: L2H %x H2L %x\n", + rtw_read32_mask(rtwdev, edcca_th[EDCCA_TH_L2H_IDX].hw_reg.addr, + edcca_th[EDCCA_TH_L2H_IDX].hw_reg.mask), + rtw_read32_mask(rtwdev, edcca_th[EDCCA_TH_H2L_IDX].hw_reg.addr, + edcca_th[EDCCA_TH_H2L_IDX].hw_reg.mask)); + + rtw_dbg(rtwdev, RTW_DBG_ADAPTIVITY, "EDCCA Flag %s\n", + rtw_read32_mask(rtwdev, REG_EDCCA_REPORT, BIT_EDCCA_FLAG) ? + "Set" : "Unset"); +} + void rtw_fw_c2h_cmd_handle(struct rtw_dev *rtwdev, struct sk_buff *skb) { struct rtw_c2h_cmd *c2h; @@ -148,9 +239,15 @@ void rtw_fw_c2h_cmd_handle(struct rtw_dev *rtwdev, struct sk_buff *skb) case C2H_BT_INFO: rtw_coex_bt_info_notify(rtwdev, c2h->payload, len); break; + case C2H_BT_HID_INFO: + rtw_coex_bt_hid_info_notify(rtwdev, c2h->payload, len); + break; case C2H_WLAN_INFO: rtw_coex_wl_fwdbginfo_notify(rtwdev, c2h->payload, len); break; + case C2H_BCN_FILTER_NOTIFY: + rtw_fw_bcn_filter_notify(rtwdev, c2h->payload, len); + break; case C2H_HALMAC: rtw_fw_c2h_cmd_handle_ext(rtwdev, skb); break; @@ -183,6 +280,19 @@ void rtw_fw_c2h_cmd_rx_irqsafe(struct rtw_dev *rtwdev, u32 pkt_offset, case C2H_BT_MP_INFO: rtw_coex_info_response(rtwdev, skb); break; + case C2H_WLAN_RFON: + complete(&rtwdev->lps_leave_check); + dev_kfree_skb_any(skb); + break; + case C2H_SCAN_RESULT: + complete(&rtwdev->fw_scan_density); + rtw_fw_scan_result(rtwdev, c2h->payload, len); + dev_kfree_skb_any(skb); + break; + case C2H_ADAPTIVITY: + rtw_fw_adaptivity_result(rtwdev, c2h->payload, len); + dev_kfree_skb_any(skb); + break; default: /* pass offset for further operation */ *((u32 *)skb->cb) = pkt_offset; @@ -202,13 +312,64 @@ void rtw_fw_c2h_cmd_isr(struct rtw_dev *rtwdev) } EXPORT_SYMBOL(rtw_fw_c2h_cmd_isr); +static void rtw_fw_send_h2c_command_register(struct rtw_dev *rtwdev, + struct rtw_h2c_register *h2c) +{ + u32 box_reg, box_ex_reg; + u8 box_state, box; + int ret; + + rtw_dbg(rtwdev, RTW_DBG_FW, "send H2C content %08x %08x\n", h2c->w0, + h2c->w1); + + lockdep_assert_held(&rtwdev->mutex); + + box = rtwdev->h2c.last_box_num; + switch (box) { + case 0: + box_reg = REG_HMEBOX0; + box_ex_reg = REG_HMEBOX0_EX; + break; + case 1: + box_reg = REG_HMEBOX1; + box_ex_reg = REG_HMEBOX1_EX; + break; + case 2: + box_reg = REG_HMEBOX2; + box_ex_reg = REG_HMEBOX2_EX; + break; + case 3: + box_reg = REG_HMEBOX3; + box_ex_reg = REG_HMEBOX3_EX; + break; + default: + WARN(1, "invalid h2c mail box number\n"); + return; + } + + ret = read_poll_timeout_atomic(rtw_read8, box_state, + !((box_state >> box) & 0x1), 100, 3000, + false, rtwdev, REG_HMETFR); + + if (ret) { + rtw_err(rtwdev, "failed to send h2c command\n"); + return; + } + + rtw_write32(rtwdev, box_ex_reg, h2c->w1); + rtw_write32(rtwdev, box_reg, h2c->w0); + + if (++rtwdev->h2c.last_box_num >= 4) + rtwdev->h2c.last_box_num = 0; +} + static void rtw_fw_send_h2c_command(struct rtw_dev *rtwdev, u8 *h2c) { + struct rtw_h2c_cmd *h2c_cmd = (struct rtw_h2c_cmd *)h2c; u8 box; u8 box_state; u32 box_reg, box_ex_reg; - int idx; int ret; rtw_dbg(rtwdev, RTW_DBG_FW, @@ -216,7 +377,7 @@ static void rtw_fw_send_h2c_command(struct rtw_dev *rtwdev, h2c[3], h2c[2], h2c[1], h2c[0], h2c[7], h2c[6], h2c[5], h2c[4]); - spin_lock(&rtwdev->h2c.lock); + lockdep_assert_held(&rtwdev->mutex); box = rtwdev->h2c.last_box_num; switch (box) { @@ -238,7 +399,7 @@ static void rtw_fw_send_h2c_command(struct rtw_dev *rtwdev, break; default: WARN(1, "invalid h2c mail box number\n"); - goto out; + return; } ret = read_poll_timeout_atomic(rtw_read8, box_state, @@ -247,19 +408,14 @@ static void rtw_fw_send_h2c_command(struct rtw_dev *rtwdev, if (ret) { rtw_err(rtwdev, "failed to send h2c command\n"); - goto out; + return; } - for (idx = 0; idx < 4; idx++) - rtw_write8(rtwdev, box_reg + idx, h2c[idx]); - for (idx = 0; idx < 4; idx++) - rtw_write8(rtwdev, box_ex_reg + idx, h2c[idx + 4]); + rtw_write32(rtwdev, box_ex_reg, le32_to_cpu(h2c_cmd->msg_ext)); + rtw_write32(rtwdev, box_reg, le32_to_cpu(h2c_cmd->msg)); if (++rtwdev->h2c.last_box_num >= 4) rtwdev->h2c.last_box_num = 0; - -out: - spin_unlock(&rtwdev->h2c.lock); } void rtw_fw_h2c_cmd_dbg(struct rtw_dev *rtwdev, u8 *h2c) @@ -271,15 +427,13 @@ static void rtw_fw_send_h2c_packet(struct rtw_dev *rtwdev, u8 *h2c_pkt) { int ret; - spin_lock(&rtwdev->h2c.lock); + lockdep_assert_held(&rtwdev->mutex); FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt, rtwdev->h2c.seq); ret = rtw_hci_write_data_h2c(rtwdev, h2c_pkt, H2C_PKT_SIZE); if (ret) rtw_err(rtwdev, "failed to send h2c packet\n"); rtwdev->h2c.seq++; - - spin_unlock(&rtwdev->h2c.lock); } void @@ -346,6 +500,18 @@ void rtw_fw_do_iqk(struct rtw_dev *rtwdev, struct rtw_iqk_para *para) } EXPORT_SYMBOL(rtw_fw_do_iqk); +void rtw_fw_inform_rfk_status(struct rtw_dev *rtwdev, bool start) +{ + u8 h2c_pkt[H2C_PKT_SIZE] = {0}; + + SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_WIFI_CALIBRATION); + + RFK_SET_INFORM_START(h2c_pkt, start); + + rtw_fw_send_h2c_command(rtwdev, h2c_pkt); +} +EXPORT_SYMBOL(rtw_fw_inform_rfk_status); + void rtw_fw_query_bt_info(struct rtw_dev *rtwdev) { u8 h2c_pkt[H2C_PKT_SIZE] = {0}; @@ -357,6 +523,23 @@ void rtw_fw_query_bt_info(struct rtw_dev *rtwdev) rtw_fw_send_h2c_command(rtwdev, h2c_pkt); } +void rtw_fw_default_port(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif) +{ + struct rtw_h2c_register h2c = {}; + + if (rtwvif->net_type != RTW_NET_MGD_LINKED) + return; + + /* Leave LPS before default port H2C so FW timer is correct */ + rtw_leave_lps(rtwdev); + + h2c.w0 = u32_encode_bits(H2C_CMD_DEFAULT_PORT, RTW_H2C_W0_CMDID) | + u32_encode_bits(rtwvif->port, RTW_H2C_DEFAULT_PORT_W0_PORTID) | + u32_encode_bits(rtwvif->mac_id, RTW_H2C_DEFAULT_PORT_W0_MACID); + + rtw_fw_send_h2c_command_register(rtwdev, &h2c); +} + void rtw_fw_wl_ch_info(struct rtw_dev *rtwdev, u8 link, u8 ch, u8 bw) { u8 h2c_pkt[H2C_PKT_SIZE] = {0}; @@ -425,6 +608,18 @@ void rtw_fw_coex_tdma_type(struct rtw_dev *rtwdev, rtw_fw_send_h2c_command(rtwdev, h2c_pkt); } +void rtw_fw_coex_query_hid_info(struct rtw_dev *rtwdev, u8 sub_id, u8 data) +{ + u8 h2c_pkt[H2C_PKT_SIZE] = {0}; + + SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_QUERY_BT_HID_INFO); + + SET_COEX_QUERY_HID_INFO_SUBID(h2c_pkt, sub_id); + SET_COEX_QUERY_HID_INFO_DATA1(h2c_pkt, data); + + rtw_fw_send_h2c_command(rtwdev, h2c_pkt); +} + void rtw_fw_bt_wifi_control(struct rtw_dev *rtwdev, u8 op_code, u8 *data) { u8 h2c_pkt[H2C_PKT_SIZE] = {0}; @@ -457,11 +652,18 @@ void rtw_fw_send_rssi_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) rtw_fw_send_h2c_command(rtwdev, h2c_pkt); } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 18, 0) +void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, + bool reset_ra_mask) +#else void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) +#endif { u8 h2c_pkt[H2C_PKT_SIZE] = {0}; - bool no_update = si->updated; bool disable_pt = true; +#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 18, 0) + bool reset_ra_mask = true; +#endif SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RA_INFO); @@ -471,7 +673,7 @@ void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) SET_RA_INFO_SGI_EN(h2c_pkt, si->sgi_enable); SET_RA_INFO_BW_MODE(h2c_pkt, si->bw_mode); SET_RA_INFO_LDPC(h2c_pkt, !!si->ldpc_en); - SET_RA_INFO_NO_UPDATE(h2c_pkt, no_update); + SET_RA_INFO_NO_UPDATE(h2c_pkt, !reset_ra_mask); SET_RA_INFO_VHT_EN(h2c_pkt, si->vht_enable); SET_RA_INFO_DIS_PT(h2c_pkt, disable_pt); SET_RA_INFO_RA_MASK0(h2c_pkt, (si->ra_mask & 0xff)); @@ -480,7 +682,6 @@ void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) SET_RA_INFO_RA_MASK3(h2c_pkt, (si->ra_mask & 0xff000000) >> 24); si->init_ra_lv = 0; - si->updated = true; rtw_fw_send_h2c_command(rtwdev, h2c_pkt); } @@ -496,6 +697,64 @@ void rtw_fw_media_status_report(struct rtw_dev *rtwdev, u8 mac_id, bool connect) rtw_fw_send_h2c_command(rtwdev, h2c_pkt); } +void rtw_fw_update_wl_phy_info(struct rtw_dev *rtwdev) +{ + struct rtw_traffic_stats *stats = &rtwdev->stats; + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + u8 h2c_pkt[H2C_PKT_SIZE] = {0}; + + SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_WL_PHY_INFO); + SET_WL_PHY_INFO_TX_TP(h2c_pkt, stats->tx_throughput); + SET_WL_PHY_INFO_RX_TP(h2c_pkt, stats->rx_throughput); + SET_WL_PHY_INFO_TX_RATE_DESC(h2c_pkt, dm_info->tx_rate); + SET_WL_PHY_INFO_RX_RATE_DESC(h2c_pkt, dm_info->curr_rx_rate); + SET_WL_PHY_INFO_RX_EVM(h2c_pkt, dm_info->rx_evm_dbm[RF_PATH_A]); + rtw_fw_send_h2c_command(rtwdev, h2c_pkt); +} + +void rtw_fw_beacon_filter_config(struct rtw_dev *rtwdev, bool connect, + struct ieee80211_vif *vif) +{ + struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; + struct ieee80211_sta *sta = ieee80211_find_sta(vif, bss_conf->bssid); + static const u8 rssi_min = 0, rssi_max = 100, rssi_offset = 100; + struct rtw_sta_info *si = + sta ? (struct rtw_sta_info *)sta->drv_priv : NULL; + s32 threshold = bss_conf->cqm_rssi_thold + rssi_offset; + u8 h2c_pkt[H2C_PKT_SIZE] = {0}; + + if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_BCN_FILTER)) + return; + + if (!connect) { + SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_BCN_FILTER_OFFLOAD_P1); + SET_BCN_FILTER_OFFLOAD_P1_ENABLE(h2c_pkt, connect); + rtw_fw_send_h2c_command(rtwdev, h2c_pkt); + + return; + } + + if (!si) + return; + + SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_BCN_FILTER_OFFLOAD_P0); + ether_addr_copy(&h2c_pkt[1], bss_conf->bssid); + rtw_fw_send_h2c_command(rtwdev, h2c_pkt); + + memset(h2c_pkt, 0, sizeof(h2c_pkt)); + threshold = clamp_t(s32, threshold, rssi_min, rssi_max); + SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_BCN_FILTER_OFFLOAD_P1); + SET_BCN_FILTER_OFFLOAD_P1_ENABLE(h2c_pkt, connect); + SET_BCN_FILTER_OFFLOAD_P1_OFFLOAD_MODE(h2c_pkt, + BCN_FILTER_OFFLOAD_MODE_DEFAULT); + SET_BCN_FILTER_OFFLOAD_P1_THRESHOLD(h2c_pkt, (u8)threshold); + SET_BCN_FILTER_OFFLOAD_P1_BCN_LOSS_CNT(h2c_pkt, BCN_LOSS_CNT); + SET_BCN_FILTER_OFFLOAD_P1_MACID(h2c_pkt, si->mac_id); + SET_BCN_FILTER_OFFLOAD_P1_HYST(h2c_pkt, bss_conf->cqm_rssi_hyst); + SET_BCN_FILTER_OFFLOAD_P1_BCN_INTERVAL(h2c_pkt, bss_conf->beacon_int); + rtw_fw_send_h2c_command(rtwdev, h2c_pkt); +} + void rtw_fw_set_pwr_mode(struct rtw_dev *rtwdev) { struct rtw_lps_conf *conf = &rtwdev->lps_conf; @@ -628,7 +887,7 @@ void rtw_fw_set_nlo_info(struct rtw_dev *rtwdev, bool enable) SET_NLO_FUN_EN(h2c_pkt, enable); if (enable) { - if (rtw_fw_lps_deep_mode) + if (rtw_get_lps_deep_mode(rtwdev) != LPS_DEEP_MODE_NONE) SET_NLO_PS_32K(h2c_pkt, enable); SET_NLO_IGNORE_SECURITY(h2c_pkt, enable); SET_NLO_LOC_NLO_INFO(h2c_pkt, loc_nlo); @@ -637,6 +896,16 @@ void rtw_fw_set_nlo_info(struct rtw_dev *rtwdev, bool enable) rtw_fw_send_h2c_command(rtwdev, h2c_pkt); } +void rtw_fw_set_recover_bt_device(struct rtw_dev *rtwdev) +{ + u8 h2c_pkt[H2C_PKT_SIZE] = {0}; + + SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RECOVER_BT_DEV); + SET_RECOVER_BT_DEV_EN(h2c_pkt, 1); + + rtw_fw_send_h2c_command(rtwdev, h2c_pkt); +} + void rtw_fw_set_pg_info(struct rtw_dev *rtwdev) { struct rtw_lps_conf *conf = &rtwdev->lps_conf; @@ -719,7 +988,7 @@ void rtw_send_rsvd_page_h2c(struct rtw_dev *rtwdev) static struct sk_buff *rtw_nlo_info_get(struct ieee80211_hw *hw) { struct rtw_dev *rtwdev = hw->priv; - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_pno_request *pno_req = &rtwdev->wow.pno_req; struct rtw_nlo_info_hdr *nlo_hdr; struct cfg80211_ssid *ssid; @@ -774,7 +1043,7 @@ static struct sk_buff *rtw_nlo_info_get(struct ieee80211_hw *hw) static struct sk_buff *rtw_cs_channel_info_get(struct ieee80211_hw *hw) { struct rtw_dev *rtwdev = hw->priv; - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_pno_request *pno_req = &rtwdev->wow.pno_req; struct ieee80211_channel *channels = pno_req->channels; struct sk_buff *skb; @@ -808,7 +1077,7 @@ static struct sk_buff *rtw_cs_channel_info_get(struct ieee80211_hw *hw) static struct sk_buff *rtw_lps_pg_dpk_get(struct ieee80211_hw *hw) { struct rtw_dev *rtwdev = hw->priv; - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info; struct rtw_lps_pg_dpk_hdr *dpk_hdr; struct sk_buff *skb; @@ -833,7 +1102,7 @@ static struct sk_buff *rtw_lps_pg_dpk_get(struct ieee80211_hw *hw) static struct sk_buff *rtw_lps_pg_info_get(struct ieee80211_hw *hw) { struct rtw_dev *rtwdev = hw->priv; - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_lps_conf *conf = &rtwdev->lps_conf; struct rtw_lps_pg_info_hdr *pg_info_hdr; struct rtw_wow_param *rtw_wow = &rtwdev->wow; @@ -866,6 +1135,7 @@ static struct sk_buff *rtw_get_rsvd_page_skb(struct ieee80211_hw *hw, struct rtw_vif *rtwvif; struct sk_buff *skb_new; struct cfg80211_ssid *ssid; + u16 tim_offset = 0; if (rsvd_pkt->type == RSVD_DUMMY) { skb_new = alloc_skb(1, GFP_KERNEL); @@ -884,7 +1154,12 @@ static struct sk_buff *rtw_get_rsvd_page_skb(struct ieee80211_hw *hw, switch (rsvd_pkt->type) { case RSVD_BEACON: - skb_new = ieee80211_beacon_get(hw, vif); +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) + skb_new = ieee80211_beacon_get_tim(hw, vif, &tim_offset, NULL, 0); +#else + skb_new = ieee80211_beacon_get_tim(hw, vif, &tim_offset, NULL); +#endif + rsvd_pkt->tim_offset = tim_offset; break; case RSVD_PS_POLL: skb_new = ieee80211_pspoll_get(hw, vif); @@ -893,10 +1168,26 @@ static struct sk_buff *rtw_get_rsvd_page_skb(struct ieee80211_hw *hw, skb_new = ieee80211_proberesp_get(hw, vif); break; case RSVD_NULL: +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 17) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0) + skb_new = ieee80211_nullfunc_get(hw, vif, -1, false); +#else skb_new = ieee80211_nullfunc_get(hw, vif, false); +#endif +#else + skb_new = ieee80211_nullfunc_get(hw, vif); +#endif break; case RSVD_QOS_NULL: +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 17) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0) + skb_new = ieee80211_nullfunc_get(hw, vif, -1, true); +#else skb_new = ieee80211_nullfunc_get(hw, vif, true); +#endif +#else + skb_new = ieee80211_nullfunc_get(hw, vif); +#endif break; case RSVD_LPS_PG_DPK: skb_new = rtw_lps_pg_dpk_get(hw); @@ -935,7 +1226,7 @@ static void rtw_fill_rsvd_page_desc(struct rtw_dev *rtwdev, struct sk_buff *skb, enum rtw_rsvd_packet_type type) { struct rtw_tx_pkt_info pkt_info = {0}; - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; u8 *pkt_desc; rtw_tx_rsvd_page_pkt_info_update(rtwdev, &pkt_info, skb, type); @@ -1201,6 +1492,10 @@ static void rtw_build_rsvd_page_iter(void *data, u8 *mac, struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; struct rtw_rsvd_page *rsvd_pkt; + /* AP not yet started, don't gather its rsvd pages */ + if (vif->type == NL80211_IFTYPE_AP && !rtwdev->ap_active) + return; + list_for_each_entry(rsvd_pkt, &rtwvif->rsvd_page_list, vif_list) { if (rsvd_pkt->type == RSVD_BEACON) list_add(&rsvd_pkt->build_list, @@ -1246,7 +1541,7 @@ static int __rtw_build_rsvd_page_from_vifs(struct rtw_dev *rtwdev) static u8 *rtw_build_rsvd_page(struct rtw_dev *rtwdev, u32 *size) { struct ieee80211_hw *hw = rtwdev->hw; - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct sk_buff *iter; struct rtw_rsvd_page *rsvd_pkt; u32 page = 0; @@ -1415,6 +1710,17 @@ int rtw_fw_download_rsvd_page(struct rtw_dev *rtwdev) return ret; } +void rtw_fw_update_beacon_work(struct work_struct *work) +{ + struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, + update_beacon_work); + + mutex_lock(&rtwdev->mutex); + rtw_fw_download_rsvd_page(rtwdev); + rtw_send_rsvd_page_h2c(rtwdev); + mutex_unlock(&rtwdev->mutex); +} + static void rtw_fw_read_fifo_page(struct rtw_dev *rtwdev, u32 offset, u32 size, u32 *buf, u32 residue, u16 start_pg) { @@ -1450,7 +1756,7 @@ static void rtw_fw_read_fifo_page(struct rtw_dev *rtwdev, u32 offset, u32 size, static void rtw_fw_read_fifo(struct rtw_dev *rtwdev, enum rtw_fw_fifo_sel sel, u32 offset, u32 size, u32 *buf) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; u32 start_pg, residue; if (sel >= RTW_FW_FIFO_MAX) { @@ -1474,7 +1780,7 @@ static bool rtw_fw_dump_check_size(struct rtw_dev *rtwdev, case RTW_FW_FIFO_SEL_RX: if ((start_addr + size) > rtwdev->chip->fw_fifo_addr[sel]) return false; - /*fall through*/ + fallthrough; default: return true; } @@ -1509,7 +1815,7 @@ int rtw_fw_dump_fifo(struct rtw_dev *rtwdev, u8 fifo_sel, u32 addr, u32 size, static void __rtw_fw_update_pkt(struct rtw_dev *rtwdev, u8 pkt_id, u16 size, u8 location) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; u8 h2c_pkt[H2C_PKT_SIZE] = {0}; u16 total_size = H2C_PKT_HDR_SIZE + H2C_PKT_UPDATE_PKT_LEN; @@ -1585,3 +1891,496 @@ void rtw_fw_channel_switch(struct rtw_dev *rtwdev, bool enable) rtw_fw_send_h2c_packet(rtwdev, h2c_pkt); } + +void rtw_fw_adaptivity(struct rtw_dev *rtwdev) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + u8 h2c_pkt[H2C_PKT_SIZE] = {0}; + + if (!rtw_edcca_enabled) { + dm_info->edcca_mode = RTW_EDCCA_NORMAL; + rtw_dbg(rtwdev, RTW_DBG_ADAPTIVITY, + "EDCCA disabled by debugfs\n"); + } + + SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_ADAPTIVITY); + SET_ADAPTIVITY_MODE(h2c_pkt, dm_info->edcca_mode); + SET_ADAPTIVITY_OPTION(h2c_pkt, 1); + SET_ADAPTIVITY_IGI(h2c_pkt, dm_info->igi_history[0]); + SET_ADAPTIVITY_L2H(h2c_pkt, dm_info->l2h_th_ini); + SET_ADAPTIVITY_DENSITY(h2c_pkt, dm_info->scan_density); + + rtw_fw_send_h2c_command(rtwdev, h2c_pkt); +} + +void rtw_fw_scan_notify(struct rtw_dev *rtwdev, bool start) +{ + u8 h2c_pkt[H2C_PKT_SIZE] = {0}; + + SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_SCAN); + SET_SCAN_START(h2c_pkt, start); + + rtw_fw_send_h2c_command(rtwdev, h2c_pkt); +} + +static int rtw_append_probe_req_ie(struct rtw_dev *rtwdev, struct sk_buff *skb, + struct sk_buff_head *list, u8 *bands, + struct rtw_vif *rtwvif) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + struct ieee80211_scan_ies *ies = rtwvif->scan_ies; + struct sk_buff *new; + u8 idx; + + for (idx = NL80211_BAND_2GHZ; idx < NUM_NL80211_BANDS; idx++) { + if (!(BIT(idx) & chip->band)) + continue; + new = skb_copy(skb, GFP_KERNEL); + if (!new) + return -ENOMEM; + skb_put_data(new, ies->ies[idx], ies->len[idx]); + skb_put_data(new, ies->common_ies, ies->common_ie_len); + skb_queue_tail(list, new); + (*bands)++; + } + + return 0; +} + +static int _rtw_hw_scan_update_probe_req(struct rtw_dev *rtwdev, u8 num_probes, + struct sk_buff_head *probe_req_list) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + struct sk_buff *skb, *tmp; + u8 page_offset = 1, *buf, page_size = chip->page_size; + u16 pg_addr = rtwdev->fifo.rsvd_h2c_info_addr, loc; + u16 buf_offset = page_size * page_offset; + u8 tx_desc_sz = chip->tx_pkt_desc_sz; + u8 page_cnt, pages; + unsigned int pkt_len; + int ret; + + if (rtw_fw_feature_ext_check(&rtwdev->fw, FW_FEATURE_EXT_OLD_PAGE_NUM)) + page_cnt = RTW_OLD_PROBE_PG_CNT; + else + page_cnt = RTW_PROBE_PG_CNT; + + pages = page_offset + num_probes * page_cnt; + + buf = kzalloc(page_size * pages, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + buf_offset -= tx_desc_sz; + skb_queue_walk_safe(probe_req_list, skb, tmp) { + skb_unlink(skb, probe_req_list); + rtw_fill_rsvd_page_desc(rtwdev, skb, RSVD_PROBE_REQ); + if (skb->len > page_size * page_cnt) { + ret = -EINVAL; + goto out; + } + + memcpy(buf + buf_offset, skb->data, skb->len); + pkt_len = skb->len - tx_desc_sz; + loc = pg_addr - rtwdev->fifo.rsvd_boundary + page_offset; + __rtw_fw_update_pkt(rtwdev, RTW_PACKET_PROBE_REQ, pkt_len, loc); + + buf_offset += page_cnt * page_size; + page_offset += page_cnt; + kfree_skb(skb); + } + + ret = rtw_fw_write_data_rsvd_page(rtwdev, pg_addr, buf, buf_offset); + if (ret) { + rtw_err(rtwdev, "Download probe request to firmware failed\n"); + goto out; + } + + rtwdev->scan_info.probe_pg_size = page_offset; +out: + kfree(buf); + skb_queue_walk_safe(probe_req_list, skb, tmp) + kfree_skb(skb); + + return ret; +} + +static int rtw_hw_scan_update_probe_req(struct rtw_dev *rtwdev, + struct rtw_vif *rtwvif) +{ + struct cfg80211_scan_request *req = rtwvif->scan_req; + struct sk_buff_head list; + struct sk_buff *skb, *tmp; + u8 num = req->n_ssids, i, bands = 0; + int ret; + + skb_queue_head_init(&list); + for (i = 0; i < num; i++) { + skb = ieee80211_probereq_get(rtwdev->hw, rtwvif->mac_addr, + req->ssids[i].ssid, + req->ssids[i].ssid_len, + req->ie_len); + if (!skb) { + ret = -ENOMEM; + goto out; + } + ret = rtw_append_probe_req_ie(rtwdev, skb, &list, &bands, + rtwvif); + if (ret) + goto out; + + kfree_skb(skb); + } + + return _rtw_hw_scan_update_probe_req(rtwdev, num * bands, &list); + +out: + skb_queue_walk_safe(&list, skb, tmp) + kfree_skb(skb); + + return ret; +} + +static int rtw_add_chan_info(struct rtw_dev *rtwdev, struct rtw_chan_info *info, + struct rtw_chan_list *list, u8 *buf) +{ + u8 *chan = &buf[list->size]; + u8 info_size = RTW_CH_INFO_SIZE; + + if (list->size > list->buf_size) + return -ENOMEM; + + CH_INFO_SET_CH(chan, info->channel); + CH_INFO_SET_PRI_CH_IDX(chan, info->pri_ch_idx); + CH_INFO_SET_BW(chan, info->bw); + CH_INFO_SET_TIMEOUT(chan, info->timeout); + CH_INFO_SET_ACTION_ID(chan, info->action_id); + CH_INFO_SET_EXTRA_INFO(chan, info->extra_info); + if (info->extra_info) { + EXTRA_CH_INFO_SET_ID(chan, RTW_SCAN_EXTRA_ID_DFS); + EXTRA_CH_INFO_SET_INFO(chan, RTW_SCAN_EXTRA_ACTION_SCAN); + EXTRA_CH_INFO_SET_SIZE(chan, RTW_EX_CH_INFO_SIZE - + RTW_EX_CH_INFO_HDR_SIZE); + EXTRA_CH_INFO_SET_DFS_EXT_TIME(chan, RTW_DFS_CHAN_TIME); + info_size += RTW_EX_CH_INFO_SIZE; + } + list->size += info_size; + list->ch_num++; + + return 0; +} + +static int rtw_add_chan_list(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif, + struct rtw_chan_list *list, u8 *buf) +{ + struct cfg80211_scan_request *req = rtwvif->scan_req; + struct rtw_fifo_conf *fifo = &rtwdev->fifo; + struct ieee80211_channel *channel; + int i, ret = 0; + + for (i = 0; i < req->n_channels; i++) { + struct rtw_chan_info ch_info = {0}; + + channel = req->channels[i]; + ch_info.channel = channel->hw_value; + ch_info.bw = RTW_SCAN_WIDTH; + ch_info.pri_ch_idx = RTW_PRI_CH_IDX; + ch_info.timeout = req->duration_mandatory ? + req->duration : RTW_CHANNEL_TIME; + + if (channel->flags & (IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR)) { + ch_info.action_id = RTW_CHANNEL_RADAR; + ch_info.extra_info = 1; + /* Overwrite duration for passive scans if necessary */ + ch_info.timeout = ch_info.timeout > RTW_PASS_CHAN_TIME ? + ch_info.timeout : RTW_PASS_CHAN_TIME; + } else { + ch_info.action_id = RTW_CHANNEL_ACTIVE; + } + + ret = rtw_add_chan_info(rtwdev, &ch_info, list, buf); + if (ret) + return ret; + } + + if (list->size > fifo->rsvd_pg_num << TX_PAGE_SIZE_SHIFT) { + rtw_err(rtwdev, "List exceeds rsvd page total size\n"); + return -EINVAL; + } + + list->addr = fifo->rsvd_h2c_info_addr + rtwdev->scan_info.probe_pg_size; + ret = rtw_fw_write_data_rsvd_page(rtwdev, list->addr, buf, list->size); + if (ret) + rtw_err(rtwdev, "Download channel list failed\n"); + + return ret; +} + +static void rtw_fw_set_scan_offload(struct rtw_dev *rtwdev, + struct rtw_ch_switch_option *opt, + struct rtw_vif *rtwvif, + struct rtw_chan_list *list) +{ + struct rtw_hw_scan_info *scan_info = &rtwdev->scan_info; + struct cfg80211_scan_request *req = rtwvif->scan_req; + struct rtw_fifo_conf *fifo = &rtwdev->fifo; + /* reserve one dummy page at the beginning for tx descriptor */ + u8 pkt_loc = fifo->rsvd_h2c_info_addr - fifo->rsvd_boundary + 1; + bool random_seq = req->flags & NL80211_SCAN_FLAG_RANDOM_SN; + u8 h2c_pkt[H2C_PKT_SIZE] = {0}; + + rtw_h2c_pkt_set_header(h2c_pkt, H2C_PKT_SCAN_OFFLOAD); + SET_PKT_H2C_TOTAL_LEN(h2c_pkt, H2C_PKT_CH_SWITCH_LEN); + + SCAN_OFFLOAD_SET_START(h2c_pkt, opt->switch_en); + SCAN_OFFLOAD_SET_BACK_OP_EN(h2c_pkt, opt->back_op_en); + SCAN_OFFLOAD_SET_RANDOM_SEQ_EN(h2c_pkt, random_seq); + SCAN_OFFLOAD_SET_NO_CCK_EN(h2c_pkt, req->no_cck); + SCAN_OFFLOAD_SET_CH_NUM(h2c_pkt, list->ch_num); + SCAN_OFFLOAD_SET_CH_INFO_SIZE(h2c_pkt, list->size); + SCAN_OFFLOAD_SET_CH_INFO_LOC(h2c_pkt, list->addr - fifo->rsvd_boundary); + SCAN_OFFLOAD_SET_OP_CH(h2c_pkt, scan_info->op_chan); + SCAN_OFFLOAD_SET_OP_PRI_CH_IDX(h2c_pkt, scan_info->op_pri_ch_idx); + SCAN_OFFLOAD_SET_OP_BW(h2c_pkt, scan_info->op_bw); + SCAN_OFFLOAD_SET_OP_PORT_ID(h2c_pkt, rtwvif->port); + SCAN_OFFLOAD_SET_OP_DWELL_TIME(h2c_pkt, req->duration_mandatory ? + req->duration : RTW_CHANNEL_TIME); + SCAN_OFFLOAD_SET_OP_GAP_TIME(h2c_pkt, RTW_OFF_CHAN_TIME); + SCAN_OFFLOAD_SET_SSID_NUM(h2c_pkt, req->n_ssids); + SCAN_OFFLOAD_SET_PKT_LOC(h2c_pkt, pkt_loc); + + rtw_fw_send_h2c_packet(rtwdev, h2c_pkt); +} + +void rtw_hw_scan_start(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, + struct ieee80211_scan_request *scan_req) +{ + struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; + struct cfg80211_scan_request *req = &scan_req->req; + u8 mac_addr[ETH_ALEN]; + + rtwdev->scan_info.scanning_vif = vif; + rtwvif->scan_ies = &scan_req->ies; + rtwvif->scan_req = req; + + ieee80211_stop_queues(rtwdev->hw); + rtw_leave_lps_deep(rtwdev); + rtw_hci_flush_all_queues(rtwdev, false); + rtw_mac_flush_all_queues(rtwdev, false); + if (req->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) + get_random_mask_addr(mac_addr, req->mac_addr, + req->mac_addr_mask); + else + ether_addr_copy(mac_addr, vif->addr); + + rtw_core_scan_start(rtwdev, rtwvif, mac_addr, true); + + rtwdev->hal.rcr &= ~BIT_CBSSID_BCN; + rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr); +} + +void rtw_hw_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, + bool aborted) +{ + struct cfg80211_scan_info info = { + .aborted = aborted, + }; + struct rtw_hw_scan_info *scan_info = &rtwdev->scan_info; + struct rtw_hal *hal = &rtwdev->hal; + struct rtw_vif *rtwvif; + u8 chan = scan_info->op_chan; + + if (!vif) + return; + + rtwdev->hal.rcr |= BIT_CBSSID_BCN; + rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr); + + rtw_core_scan_complete(rtwdev, vif, true); + + rtwvif = (struct rtw_vif *)vif->drv_priv; + if (chan) + rtw_store_op_chan(rtwdev, false); + rtw_phy_set_tx_power_level(rtwdev, hal->current_channel); + ieee80211_wake_queues(rtwdev->hw); + ieee80211_scan_completed(rtwdev->hw, &info); + + rtwvif->scan_req = NULL; + rtwvif->scan_ies = NULL; + rtwdev->scan_info.scanning_vif = NULL; +} + +static int rtw_hw_scan_prehandle(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif, + struct rtw_chan_list *list) +{ + struct cfg80211_scan_request *req = rtwvif->scan_req; + int size = req->n_channels * (RTW_CH_INFO_SIZE + RTW_EX_CH_INFO_SIZE); + u8 *buf; + int ret; + + buf = kmalloc(size, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + ret = rtw_hw_scan_update_probe_req(rtwdev, rtwvif); + if (ret) { + rtw_err(rtwdev, "Update probe request failed\n"); + goto out; + } + + list->buf_size = size; + list->size = 0; + list->ch_num = 0; + ret = rtw_add_chan_list(rtwdev, rtwvif, list, buf); +out: + kfree(buf); + + return ret; +} + +int rtw_hw_scan_offload(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, + bool enable) +{ + struct rtw_vif *rtwvif = vif ? (struct rtw_vif *)vif->drv_priv : NULL; + struct rtw_hw_scan_info *scan_info = &rtwdev->scan_info; + struct rtw_ch_switch_option cs_option = {0}; + struct rtw_chan_list chan_list = {0}; + int ret = 0; + + if (!rtwvif) + return -EINVAL; + + cs_option.switch_en = enable; + cs_option.back_op_en = scan_info->op_chan != 0; + if (enable) { + ret = rtw_hw_scan_prehandle(rtwdev, rtwvif, &chan_list); + if (ret) + goto out; + } + rtw_fw_set_scan_offload(rtwdev, &cs_option, rtwvif, &chan_list); +out: + if (rtwdev->ap_active) { + ret = rtw_download_beacon(rtwdev); + if (ret) + rtw_err(rtwdev, "HW scan download beacon failed\n"); + } + + return ret; +} + +void rtw_hw_scan_abort(struct rtw_dev *rtwdev) +{ + struct ieee80211_vif *vif = rtwdev->scan_info.scanning_vif; + + if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_SCAN_OFFLOAD)) + return; + + rtw_hw_scan_offload(rtwdev, vif, false); + rtw_hw_scan_complete(rtwdev, vif, true); +} + +void rtw_hw_scan_status_report(struct rtw_dev *rtwdev, struct sk_buff *skb) +{ + struct ieee80211_vif *vif = rtwdev->scan_info.scanning_vif; + struct rtw_c2h_cmd *c2h; + bool aborted; + u8 rc; + + if (!test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) + return; + + c2h = get_c2h_from_skb(skb); + rc = GET_SCAN_REPORT_RETURN_CODE(c2h->payload); + aborted = rc != RTW_SCAN_REPORT_SUCCESS; + rtw_hw_scan_complete(rtwdev, vif, aborted); + + if (aborted) + rtw_dbg(rtwdev, RTW_DBG_HW_SCAN, "HW scan aborted with code: %d\n", rc); +} + +void rtw_store_op_chan(struct rtw_dev *rtwdev, bool backup) +{ + struct rtw_hw_scan_info *scan_info = &rtwdev->scan_info; + struct rtw_hal *hal = &rtwdev->hal; + u8 band; + + if (backup) { + scan_info->op_chan = hal->current_channel; + scan_info->op_bw = hal->current_band_width; + scan_info->op_pri_ch_idx = hal->current_primary_channel_index; + scan_info->op_pri_ch = hal->primary_channel; + } else { + band = scan_info->op_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G; + rtw_update_channel(rtwdev, scan_info->op_chan, + scan_info->op_pri_ch, + band, scan_info->op_bw); + } +} + +void rtw_clear_op_chan(struct rtw_dev *rtwdev) +{ + struct rtw_hw_scan_info *scan_info = &rtwdev->scan_info; + + scan_info->op_chan = 0; + scan_info->op_bw = 0; + scan_info->op_pri_ch_idx = 0; + scan_info->op_pri_ch = 0; +} + +static bool rtw_is_op_chan(struct rtw_dev *rtwdev, u8 channel) +{ + struct rtw_hw_scan_info *scan_info = &rtwdev->scan_info; + + return channel == scan_info->op_chan; +} + +void rtw_hw_scan_chan_switch(struct rtw_dev *rtwdev, struct sk_buff *skb) +{ + struct rtw_hal *hal = &rtwdev->hal; + struct rtw_c2h_cmd *c2h; + enum rtw_scan_notify_id id; + u8 chan, band, status; + + if (!test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) + return; + + c2h = get_c2h_from_skb(skb); + chan = GET_CHAN_SWITCH_CENTRAL_CH(c2h->payload); + id = GET_CHAN_SWITCH_ID(c2h->payload); + status = GET_CHAN_SWITCH_STATUS(c2h->payload); + + if (id == RTW_SCAN_NOTIFY_ID_POSTSWITCH) { + band = chan > 14 ? RTW_BAND_5G : RTW_BAND_2G; + rtw_update_channel(rtwdev, chan, chan, band, + RTW_CHANNEL_WIDTH_20); + if (rtw_is_op_chan(rtwdev, chan)) { + rtw_store_op_chan(rtwdev, false); + ieee80211_wake_queues(rtwdev->hw); + rtw_core_enable_beacon(rtwdev, true); + } + } else if (id == RTW_SCAN_NOTIFY_ID_PRESWITCH) { + if (IS_CH_5G_BAND(chan)) { + rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G); + } else if (IS_CH_2G_BAND(chan)) { + u8 chan_type; + + if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) + chan_type = COEX_SWITCH_TO_24G; + else + chan_type = COEX_SWITCH_TO_24G_NOFORSCAN; + rtw_coex_switchband_notify(rtwdev, chan_type); + } + /* The channel of C2H RTW_SCAN_NOTIFY_ID_PRESWITCH is next + * channel that hardware will switch. We need to stop queue + * if next channel is non-op channel. + */ + if (!rtw_is_op_chan(rtwdev, chan) && + rtw_is_op_chan(rtwdev, hal->current_channel)) { + rtw_core_enable_beacon(rtwdev, false); + ieee80211_stop_queues(rtwdev->hw); + } + } + + rtw_dbg(rtwdev, RTW_DBG_HW_SCAN, + "Chan switch: %x, id: %x, status: %x\n", chan, id, status); +} diff --git a/drivers/net/wireless/realtek/rtw88/fw.h b/drivers/net/wireless/realtek/rtw88/fw.h index f4aed247e3..1500723d1a 100644 --- a/drivers/net/wireless/realtek/rtw88/fw.h +++ b/drivers/net/wireless/realtek/rtw88/fw.h @@ -24,19 +24,46 @@ #define DLFW_BLK_SIZE_LEGACY 4 #define FW_START_ADDR_LEGACY 0x1000 +#define BCN_LOSS_CNT 10 +#define BCN_FILTER_NOTIFY_SIGNAL_CHANGE 0 +#define BCN_FILTER_CONNECTION_LOSS 1 +#define BCN_FILTER_CONNECTED 2 +#define BCN_FILTER_NOTIFY_BEACON_LOSS 3 + +#define SCAN_NOTIFY_TIMEOUT msecs_to_jiffies(10) + +#define RTW_CHANNEL_TIME 45 +#define RTW_OFF_CHAN_TIME 100 +#define RTW_PASS_CHAN_TIME 105 +#define RTW_DFS_CHAN_TIME 20 +#define RTW_CH_INFO_SIZE 4 +#define RTW_EX_CH_INFO_SIZE 3 +#define RTW_EX_CH_INFO_HDR_SIZE 2 +#define RTW_SCAN_WIDTH 0 +#define RTW_PRI_CH_IDX 1 +#define RTW_OLD_PROBE_PG_CNT 2 +#define RTW_PROBE_PG_CNT 4 + enum rtw_c2h_cmd_id { C2H_CCX_TX_RPT = 0x03, C2H_BT_INFO = 0x09, C2H_BT_MP_INFO = 0x0b, + C2H_BT_HID_INFO = 0x45, C2H_RA_RPT = 0x0c, C2H_HW_FEATURE_REPORT = 0x19, C2H_WLAN_INFO = 0x27, + C2H_WLAN_RFON = 0x32, + C2H_BCN_FILTER_NOTIFY = 0x36, + C2H_ADAPTIVITY = 0x37, + C2H_SCAN_RESULT = 0x38, C2H_HW_FEATURE_DUMP = 0xfd, C2H_HALMAC = 0xff, }; enum rtw_c2h_cmd_id_ext { + C2H_SCAN_STATUS_RPT = 0x3, C2H_CCX_RPT = 0x0f, + C2H_CHAN_SWITCH = 0x22, }; struct rtw_c2h_cmd { @@ -45,6 +72,31 @@ struct rtw_c2h_cmd { u8 payload[]; } __packed; +struct rtw_c2h_adaptivity { + u8 density; + u8 igi; + u8 l2h_th_init; + u8 l2h; + u8 h2l; + u8 option; +} __packed; + +struct rtw_h2c_register { + u32 w0; + u32 w1; +} __packed; + +#define RTW_H2C_W0_CMDID GENMASK(7, 0) + +/* H2C_CMD_DEFAULT_PORT command */ +#define RTW_H2C_DEFAULT_PORT_W0_PORTID GENMASK(15, 8) +#define RTW_H2C_DEFAULT_PORT_W0_MACID GENMASK(23, 16) + +struct rtw_h2c_cmd { + __le32 msg; + __le32 msg_ext; +} __packed; + enum rtw_rsvd_packet_type { RSVD_BEACON, RSVD_DUMMY, @@ -72,6 +124,32 @@ enum rtw_fw_rf_type { FW_RF_MAX_TYPE = 0xF, }; +enum rtw_fw_feature { + FW_FEATURE_SIG = BIT(0), + FW_FEATURE_LPS_C2H = BIT(1), + FW_FEATURE_LCLK = BIT(2), + FW_FEATURE_PG = BIT(3), + FW_FEATURE_TX_WAKE = BIT(4), + FW_FEATURE_BCN_FILTER = BIT(5), + FW_FEATURE_NOTIFY_SCAN = BIT(6), + FW_FEATURE_ADAPTIVITY = BIT(7), + FW_FEATURE_SCAN_OFFLOAD = BIT(8), + FW_FEATURE_MAX = BIT(31), +}; + +enum rtw_fw_feature_ext { + FW_FEATURE_EXT_OLD_PAGE_NUM = BIT(0), +}; + +enum rtw_beacon_filter_offload_mode { + BCN_FILTER_OFFLOAD_MODE_0 = 0, + BCN_FILTER_OFFLOAD_MODE_1, + BCN_FILTER_OFFLOAD_MODE_2, + BCN_FILTER_OFFLOAD_MODE_3, + + BCN_FILTER_OFFLOAD_MODE_DEFAULT = BCN_FILTER_OFFLOAD_MODE_0, +}; + struct rtw_coex_info_req { u8 seq; u8 op_code; @@ -115,6 +193,7 @@ struct rtw_rsvd_page { struct sk_buff *skb; enum rtw_rsvd_packet_type type; u8 page; + u16 tim_offset; bool add_txdesc; struct cfg80211_ssid *ssid; u16 probe_req_size; @@ -155,6 +234,51 @@ struct rtw_fw_wow_disconnect_para { u8 retry_count; }; +enum rtw_channel_type { + RTW_CHANNEL_PASSIVE, + RTW_CHANNEL_ACTIVE, + RTW_CHANNEL_RADAR, +}; + +enum rtw_scan_extra_id { + RTW_SCAN_EXTRA_ID_DFS, +}; + +enum rtw_scan_extra_info { + RTW_SCAN_EXTRA_ACTION_SCAN, +}; + +enum rtw_scan_report_code { + RTW_SCAN_REPORT_SUCCESS = 0x00, + RTW_SCAN_REPORT_ERR_PHYDM = 0x01, + RTW_SCAN_REPORT_ERR_ID = 0x02, + RTW_SCAN_REPORT_ERR_TX = 0x03, + RTW_SCAN_REPORT_CANCELED = 0x10, + RTW_SCAN_REPORT_CANCELED_EXT = 0x11, + RTW_SCAN_REPORT_FW_DISABLED = 0xF0, +}; + +enum rtw_scan_notify_id { + RTW_SCAN_NOTIFY_ID_PRESWITCH = 0x00, + RTW_SCAN_NOTIFY_ID_POSTSWITCH = 0x01, + RTW_SCAN_NOTIFY_ID_PROBE_PRETX = 0x02, + RTW_SCAN_NOTIFY_ID_PROBE_ISSUETX = 0x03, + RTW_SCAN_NOTIFY_ID_NULL0_PRETX = 0x04, + RTW_SCAN_NOTIFY_ID_NULL0_ISSUETX = 0x05, + RTW_SCAN_NOTIFY_ID_NULL0_POSTTX = 0x06, + RTW_SCAN_NOTIFY_ID_NULL1_PRETX = 0x07, + RTW_SCAN_NOTIFY_ID_NULL1_ISSUETX = 0x08, + RTW_SCAN_NOTIFY_ID_NULL1_POSTTX = 0x09, + RTW_SCAN_NOTIFY_ID_DWELLEXT = 0x0A, +}; + +enum rtw_scan_notify_status { + RTW_SCAN_NOTIFY_STATUS_SUCCESS = 0x00, + RTW_SCAN_NOTIFY_STATUS_FAILURE = 0x01, + RTW_SCAN_NOTIFY_STATUS_RESOURCE = 0x02, + RTW_SCAN_NOTIFY_STATUS_TIMEOUT = 0x03, +}; + struct rtw_ch_switch_option { u8 periodic_option; u32 tsf_high; @@ -168,6 +292,8 @@ struct rtw_ch_switch_option { u8 slow_period; u8 slow_period_sel; u8 nlo_en; + bool switch_en; + bool back_op_en; }; struct rtw_fw_hdr { @@ -178,7 +304,7 @@ struct rtw_fw_hdr { u8 subversion; u8 subindex; __le32 rsvd; /* 0x08 */ - __le32 rsvd2; /* 0x0C */ + __le32 feature; /* 0x0C */ u8 month; /* 0x10 */ u8 day; u8 hour; @@ -218,17 +344,31 @@ struct rtw_fw_hdr_legacy { __le32 rsvd5; } __packed; +#define RTW_FW_VER_CODE(ver, sub_ver, idx) \ + (((ver) << 16) | ((sub_ver) << 8) | (idx)) +#define RTW_FW_SUIT_VER_CODE(s) \ + RTW_FW_VER_CODE((s).version, (s).sub_version, (s).sub_index) + /* C2H */ #define GET_CCX_REPORT_SEQNUM_V0(c2h_payload) (c2h_payload[6] & 0xfc) #define GET_CCX_REPORT_STATUS_V0(c2h_payload) (c2h_payload[0] & 0xc0) #define GET_CCX_REPORT_SEQNUM_V1(c2h_payload) (c2h_payload[8] & 0xfc) #define GET_CCX_REPORT_STATUS_V1(c2h_payload) (c2h_payload[9] & 0xc0) +#define GET_SCAN_REPORT_RETURN_CODE(c2h_payload) (c2h_payload[2] & 0xff) + +#define GET_CHAN_SWITCH_CENTRAL_CH(c2h_payload) (c2h_payload[2]) +#define GET_CHAN_SWITCH_ID(c2h_payload) (c2h_payload[3]) +#define GET_CHAN_SWITCH_STATUS(c2h_payload) (c2h_payload[4]) #define GET_RA_REPORT_RATE(c2h_payload) (c2h_payload[0] & 0x7f) #define GET_RA_REPORT_SGI(c2h_payload) ((c2h_payload[0] & 0x80) >> 7) #define GET_RA_REPORT_BW(c2h_payload) (c2h_payload[6]) #define GET_RA_REPORT_MACID(c2h_payload) (c2h_payload[1]) +#define GET_BCN_FILTER_NOTIFY_TYPE(c2h_payload) (c2h_payload[1] & 0xf) +#define GET_BCN_FILTER_NOTIFY_EVENT(c2h_payload) (c2h_payload[1] & 0x10) +#define GET_BCN_FILTER_NOTIFY_RSSI(c2h_payload) (c2h_payload[2] - 100) + /* PKT H2C */ #define H2C_PKT_CMD_ID 0xFF #define H2C_PKT_CATEGORY 0x01 @@ -239,6 +379,7 @@ struct rtw_fw_hdr_legacy { #define H2C_PKT_CH_SWITCH 0x02 #define H2C_PKT_UPDATE_PKT 0x0C +#define H2C_PKT_SCAN_OFFLOAD 0x19 #define H2C_PKT_CH_SWITCH_LEN 0x20 #define H2C_PKT_UPDATE_PKT_LEN 0x4 @@ -289,6 +430,30 @@ static inline void rtw_h2c_pkt_set_header(u8 *h2c_pkt, u8 sub_id) le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(23, 16)) #define CHSW_INFO_SET_ACTION_ID(pkt, value) \ le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(30, 24)) +#define CHSW_INFO_SET_EXTRA_INFO(pkt, value) \ + le32p_replace_bits((__le32 *)(pkt) + 0x00, value, BIT(31)) + +#define CH_INFO_SET_CH(pkt, value) \ + u8p_replace_bits((u8 *)(pkt) + 0x00, value, GENMASK(7, 0)) +#define CH_INFO_SET_PRI_CH_IDX(pkt, value) \ + u8p_replace_bits((u8 *)(pkt) + 0x01, value, GENMASK(3, 0)) +#define CH_INFO_SET_BW(pkt, value) \ + u8p_replace_bits((u8 *)(pkt) + 0x01, value, GENMASK(7, 4)) +#define CH_INFO_SET_TIMEOUT(pkt, value) \ + u8p_replace_bits((u8 *)(pkt) + 0x02, value, GENMASK(7, 0)) +#define CH_INFO_SET_ACTION_ID(pkt, value) \ + u8p_replace_bits((u8 *)(pkt) + 0x03, value, GENMASK(6, 0)) +#define CH_INFO_SET_EXTRA_INFO(pkt, value) \ + u8p_replace_bits((u8 *)(pkt) + 0x03, value, BIT(7)) + +#define EXTRA_CH_INFO_SET_ID(pkt, value) \ + u8p_replace_bits((u8 *)(pkt) + 0x04, value, GENMASK(6, 0)) +#define EXTRA_CH_INFO_SET_INFO(pkt, value) \ + u8p_replace_bits((u8 *)(pkt) + 0x04, value, BIT(7)) +#define EXTRA_CH_INFO_SET_SIZE(pkt, value) \ + u8p_replace_bits((u8 *)(pkt) + 0x05, value, GENMASK(7, 0)) +#define EXTRA_CH_INFO_SET_DFS_EXT_TIME(pkt, value) \ + u8p_replace_bits((u8 *)(pkt) + 0x06, value, GENMASK(7, 0)) #define UPDATE_PKT_SET_SIZE(h2c_pkt, value) \ le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 0)) @@ -305,12 +470,18 @@ static inline void rtw_h2c_pkt_set_header(u8 *h2c_pkt, u8 sub_id) le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(2)) #define CH_SWITCH_SET_PERIODIC_OPT(h2c_pkt, value) \ le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(4, 3)) +#define CH_SWITCH_SET_SCAN_MODE(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(5)) +#define CH_SWITCH_SET_BACK_OP_EN(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(6)) #define CH_SWITCH_SET_INFO_LOC(h2c_pkt, value) \ le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 8)) #define CH_SWITCH_SET_CH_NUM(h2c_pkt, value) \ le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16)) #define CH_SWITCH_SET_PRI_CH_IDX(h2c_pkt, value) \ le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(27, 24)) +#define CH_SWITCH_SET_DEST_BW(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(31, 28)) #define CH_SWITCH_SET_DEST_CH(h2c_pkt, value) \ le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(7, 0)) #define CH_SWITCH_SET_NORMAL_PERIOD(h2c_pkt, value) \ @@ -330,13 +501,54 @@ static inline void rtw_h2c_pkt_set_header(u8 *h2c_pkt, u8 sub_id) #define CH_SWITCH_SET_INFO_SIZE(h2c_pkt, value) \ le32p_replace_bits((__le32 *)(h2c_pkt) + 0x06, value, GENMASK(15, 0)) +#define SCAN_OFFLOAD_SET_START(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(0)) +#define SCAN_OFFLOAD_SET_BACK_OP_EN(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(1)) +#define SCAN_OFFLOAD_SET_RANDOM_SEQ_EN(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(2)) +#define SCAN_OFFLOAD_SET_NO_CCK_EN(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(3)) +#define SCAN_OFFLOAD_SET_VERBOSE(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(4)) +#define SCAN_OFFLOAD_SET_CH_NUM(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 8)) +#define SCAN_OFFLOAD_SET_CH_INFO_SIZE(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(31, 16)) +#define SCAN_OFFLOAD_SET_CH_INFO_LOC(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(7, 0)) +#define SCAN_OFFLOAD_SET_OP_CH(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(15, 8)) +#define SCAN_OFFLOAD_SET_OP_PRI_CH_IDX(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(19, 16)) +#define SCAN_OFFLOAD_SET_OP_BW(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(23, 20)) +#define SCAN_OFFLOAD_SET_OP_PORT_ID(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(26, 24)) +#define SCAN_OFFLOAD_SET_OP_DWELL_TIME(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x04, value, GENMASK(15, 0)) +#define SCAN_OFFLOAD_SET_OP_GAP_TIME(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x04, value, GENMASK(31, 16)) +#define SCAN_OFFLOAD_SET_MODE(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x05, value, GENMASK(3, 0)) +#define SCAN_OFFLOAD_SET_SSID_NUM(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x05, value, GENMASK(7, 4)) +#define SCAN_OFFLOAD_SET_PKT_LOC(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x05, value, GENMASK(15, 8)) + /* Command H2C */ #define H2C_CMD_RSVD_PAGE 0x0 #define H2C_CMD_MEDIA_STATUS_RPT 0x01 #define H2C_CMD_SET_PWR_MODE 0x20 #define H2C_CMD_LPS_PG_INFO 0x2b +#define H2C_CMD_DEFAULT_PORT 0x2c #define H2C_CMD_RA_INFO 0x40 #define H2C_CMD_RSSI_MONITOR 0x42 +#define H2C_CMD_BCN_FILTER_OFFLOAD_P0 0x56 +#define H2C_CMD_BCN_FILTER_OFFLOAD_P1 0x57 +#define H2C_CMD_WL_PHY_INFO 0x58 +#define H2C_CMD_SCAN 0x59 +#define H2C_CMD_ADAPTIVITY 0x5A #define H2C_CMD_COEX_TDMA_TYPE 0x60 #define H2C_CMD_QUERY_BT_INFO 0x61 @@ -345,6 +557,8 @@ static inline void rtw_h2c_pkt_set_header(u8 *h2c_pkt, u8 sub_id) #define H2C_CMD_WL_CH_INFO 0x66 #define H2C_CMD_QUERY_BT_MP_INFO 0x67 #define H2C_CMD_BT_WIFI_CONTROL 0x69 +#define H2C_CMD_WIFI_CALIBRATION 0x6d +#define H2C_CMD_QUERY_BT_HID_INFO 0x73 #define H2C_CMD_KEEP_ALIVE 0x03 #define H2C_CMD_DISCONNECT_DECISION 0x04 @@ -353,6 +567,8 @@ static inline void rtw_h2c_pkt_set_header(u8 *h2c_pkt, u8 sub_id) #define H2C_CMD_AOAC_GLOBAL_INFO 0x82 #define H2C_CMD_NLO_INFO 0x8C +#define H2C_CMD_RECOVER_BT_DEV 0xD1 + #define SET_H2C_CMD_ID_CLASS(h2c_pkt, value) \ le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(7, 0)) @@ -361,6 +577,45 @@ static inline void rtw_h2c_pkt_set_header(u8 *h2c_pkt, u8 sub_id) #define MEDIA_STATUS_RPT_SET_MACID(h2c_pkt, value) \ le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) +#define SET_WL_PHY_INFO_TX_TP(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(17, 8)) +#define SET_WL_PHY_INFO_RX_TP(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(27, 18)) +#define SET_WL_PHY_INFO_TX_RATE_DESC(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0)) +#define SET_WL_PHY_INFO_RX_RATE_DESC(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8)) +#define SET_WL_PHY_INFO_RX_EVM(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16)) +#define SET_BCN_FILTER_OFFLOAD_P1_MACID(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) +#define SET_BCN_FILTER_OFFLOAD_P1_ENABLE(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(16)) +#define SET_BCN_FILTER_OFFLOAD_P1_HYST(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(20, 17)) +#define SET_BCN_FILTER_OFFLOAD_P1_OFFLOAD_MODE(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 21)) +#define SET_BCN_FILTER_OFFLOAD_P1_THRESHOLD(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) +#define SET_BCN_FILTER_OFFLOAD_P1_BCN_LOSS_CNT(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(3, 0)) +#define SET_BCN_FILTER_OFFLOAD_P1_BCN_INTERVAL(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(13, 4)) + +#define SET_SCAN_START(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) + +#define SET_ADAPTIVITY_MODE(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(11, 8)) +#define SET_ADAPTIVITY_OPTION(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 12)) +#define SET_ADAPTIVITY_IGI(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) +#define SET_ADAPTIVITY_L2H(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) +#define SET_ADAPTIVITY_DENSITY(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0)) + #define SET_PWR_MODE_SET_MODE(h2c_pkt, value) \ le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(14, 8)) #define SET_PWR_MODE_SET_RLBM(h2c_pkt, value) \ @@ -458,6 +713,11 @@ static inline void rtw_h2c_pkt_set_header(u8 *h2c_pkt, u8 sub_id) #define SET_BT_WIFI_CONTROL_DATA5(h2c_pkt, value) \ le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16)) +#define SET_COEX_QUERY_HID_INFO_SUBID(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) +#define SET_COEX_QUERY_HID_INFO_DATA1(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) + #define SET_KEEP_ALIVE_ENABLE(h2c_pkt, value) \ le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) #define SET_KEEP_ALIVE_ADOPT(h2c_pkt, value) \ @@ -508,6 +768,9 @@ static inline void rtw_h2c_pkt_set_header(u8 *h2c_pkt, u8 sub_id) #define SET_NLO_LOC_NLO_INFO(h2c_pkt, value) \ le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) +#define SET_RECOVER_BT_DEV_EN(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) + #define GET_FW_DUMP_LEN(_header) \ le32_get_bits(*((__le32 *)(_header) + 0x00), GENMASK(15, 0)) #define GET_FW_DUMP_SEQ(_header) \ @@ -522,6 +785,9 @@ static inline void rtw_h2c_pkt_set_header(u8 *h2c_pkt, u8 sub_id) le32_get_bits(*((__le32 *)(_header) + 0x01), GENMASK(31, 16)) #define GET_FW_DUMP_TLV_VAL(_header) \ le32_get_bits(*((__le32 *)(_header) + 0x02), GENMASK(31, 0)) + +#define RFK_SET_INFORM_START(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) static inline struct rtw_c2h_cmd *get_c2h_from_skb(struct sk_buff *skb) { u32 pkt_offset; @@ -530,13 +796,27 @@ static inline struct rtw_c2h_cmd *get_c2h_from_skb(struct sk_buff *skb) return (struct rtw_c2h_cmd *)(skb->data + pkt_offset); } +static inline bool rtw_fw_feature_check(struct rtw_fw_state *fw, + enum rtw_fw_feature feature) +{ + return !!(fw->feature & feature); +} + +static inline bool rtw_fw_feature_ext_check(struct rtw_fw_state *fw, + enum rtw_fw_feature_ext feature) +{ + return !!(fw->feature_ext & feature); +} + void rtw_fw_c2h_cmd_rx_irqsafe(struct rtw_dev *rtwdev, u32 pkt_offset, struct sk_buff *skb); void rtw_fw_c2h_cmd_handle(struct rtw_dev *rtwdev, struct sk_buff *skb); void rtw_fw_send_general_info(struct rtw_dev *rtwdev); void rtw_fw_send_phydm_info(struct rtw_dev *rtwdev); +void rtw_fw_default_port(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif); void rtw_fw_do_iqk(struct rtw_dev *rtwdev, struct rtw_iqk_para *para); +void rtw_fw_inform_rfk_status(struct rtw_dev *rtwdev, bool start); void rtw_fw_set_pwr_mode(struct rtw_dev *rtwdev); void rtw_fw_set_pg_info(struct rtw_dev *rtwdev); void rtw_fw_query_bt_info(struct rtw_dev *rtwdev); @@ -547,10 +827,20 @@ void rtw_fw_force_bt_tx_power(struct rtw_dev *rtwdev, u8 bt_pwr_dec_lvl); void rtw_fw_bt_ignore_wlan_action(struct rtw_dev *rtwdev, bool enable); void rtw_fw_coex_tdma_type(struct rtw_dev *rtwdev, u8 para1, u8 para2, u8 para3, u8 para4, u8 para5); +void rtw_fw_coex_query_hid_info(struct rtw_dev *rtwdev, u8 sub_id, u8 data); + void rtw_fw_bt_wifi_control(struct rtw_dev *rtwdev, u8 op_code, u8 *data); void rtw_fw_send_rssi_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 18, 0) +void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, + bool reset_ra_mask); +#else void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si); +#endif void rtw_fw_media_status_report(struct rtw_dev *rtwdev, u8 mac_id, bool conn); +void rtw_fw_update_wl_phy_info(struct rtw_dev *rtwdev); +void rtw_fw_beacon_filter_config(struct rtw_dev *rtwdev, bool connect, + struct ieee80211_vif *vif); int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr, u8 *buf, u32 size); void rtw_remove_rsvd_page(struct rtw_dev *rtwdev, @@ -562,6 +852,7 @@ void rtw_add_rsvd_page_pno(struct rtw_dev *rtwdev, void rtw_add_rsvd_page_sta(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif); int rtw_fw_download_rsvd_page(struct rtw_dev *rtwdev); +void rtw_fw_update_beacon_work(struct work_struct *work); void rtw_send_rsvd_page_h2c(struct rtw_dev *rtwdev); int rtw_dump_drv_rsvd_page(struct rtw_dev *rtwdev, u32 offset, u32 size, u32 *buf); @@ -574,6 +865,7 @@ void rtw_fw_set_aoac_global_info_cmd(struct rtw_dev *rtwdev, u8 group_key_enc); void rtw_fw_set_nlo_info(struct rtw_dev *rtwdev, bool enable); +void rtw_fw_set_recover_bt_device(struct rtw_dev *rtwdev); void rtw_fw_update_pkt_probe_req(struct rtw_dev *rtwdev, struct cfg80211_ssid *ssid); void rtw_fw_channel_switch(struct rtw_dev *rtwdev, bool enable); @@ -581,5 +873,17 @@ void rtw_fw_h2c_cmd_dbg(struct rtw_dev *rtwdev, u8 *h2c); void rtw_fw_c2h_cmd_isr(struct rtw_dev *rtwdev); int rtw_fw_dump_fifo(struct rtw_dev *rtwdev, u8 fifo_sel, u32 addr, u32 size, u32 *buffer); - +void rtw_fw_scan_notify(struct rtw_dev *rtwdev, bool start); +void rtw_fw_adaptivity(struct rtw_dev *rtwdev); +void rtw_store_op_chan(struct rtw_dev *rtwdev, bool backup); +void rtw_clear_op_chan(struct rtw_dev *rtwdev); +void rtw_hw_scan_start(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, + struct ieee80211_scan_request *req); +void rtw_hw_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, + bool aborted); +int rtw_hw_scan_offload(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, + bool enable); +void rtw_hw_scan_status_report(struct rtw_dev *rtwdev, struct sk_buff *skb); +void rtw_hw_scan_chan_switch(struct rtw_dev *rtwdev, struct sk_buff *skb); +void rtw_hw_scan_abort(struct rtw_dev *rtwdev); #endif diff --git a/drivers/net/wireless/realtek/rtw88/hci.h b/drivers/net/wireless/realtek/rtw88/hci.h index 2cba327e62..830d7532f2 100644 --- a/drivers/net/wireless/realtek/rtw88/hci.h +++ b/drivers/net/wireless/realtek/rtw88/hci.h @@ -11,6 +11,7 @@ struct rtw_hci_ops { struct rtw_tx_pkt_info *pkt_info, struct sk_buff *skb); void (*tx_kick_off)(struct rtw_dev *rtwdev); + void (*flush_queues)(struct rtw_dev *rtwdev, u32 queues, bool drop); int (*setup)(struct rtw_dev *rtwdev); int (*start)(struct rtw_dev *rtwdev); void (*stop)(struct rtw_dev *rtwdev); @@ -165,12 +166,11 @@ static inline u32 rtw_read_rf(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path, u32 addr, u32 mask) { - unsigned long flags; u32 val; - spin_lock_irqsave(&rtwdev->rf_lock, flags); + lockdep_assert_held(&rtwdev->mutex); + val = rtwdev->chip->ops->read_rf(rtwdev, rf_path, addr, mask); - spin_unlock_irqrestore(&rtwdev->rf_lock, flags); return val; } @@ -179,11 +179,9 @@ static inline void rtw_write_rf(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path, u32 addr, u32 mask, u32 data) { - unsigned long flags; + lockdep_assert_held(&rtwdev->mutex); - spin_lock_irqsave(&rtwdev->rf_lock, flags); rtwdev->chip->ops->write_rf(rtwdev, rf_path, addr, mask, data); - spin_unlock_irqrestore(&rtwdev->rf_lock, flags); } static inline u32 @@ -258,4 +256,19 @@ static inline enum rtw_hci_type rtw_hci_type(struct rtw_dev *rtwdev) return rtwdev->hci.type; } +static inline void rtw_hci_flush_queues(struct rtw_dev *rtwdev, u32 queues, + bool drop) +{ + if (rtwdev->hci.ops->flush_queues) + rtwdev->hci.ops->flush_queues(rtwdev, queues, drop); +} + +static inline void rtw_hci_flush_all_queues(struct rtw_dev *rtwdev, bool drop) +{ + if (rtwdev->hci.ops->flush_queues) + rtwdev->hci.ops->flush_queues(rtwdev, + BIT(rtwdev->hw->queues) - 1, + drop); +} + #endif diff --git a/drivers/net/wireless/realtek/rtw88/mac.c b/drivers/net/wireless/realtek/rtw88/mac.c index 59028b121b..298663b035 100644 --- a/drivers/net/wireless/realtek/rtw88/mac.c +++ b/drivers/net/wireless/realtek/rtw88/mac.c @@ -7,6 +7,7 @@ #include "reg.h" #include "fw.h" #include "debug.h" +#include "sdio.h" void rtw_set_channel_mac(struct rtw_dev *rtwdev, u8 channel, u8 bw, u8 primary_ch_idx) @@ -60,6 +61,7 @@ EXPORT_SYMBOL(rtw_set_channel_mac); static int rtw_mac_pre_system_cfg(struct rtw_dev *rtwdev) { + unsigned int retry; u32 value32; u8 value8; @@ -75,7 +77,29 @@ static int rtw_mac_pre_system_cfg(struct rtw_dev *rtwdev) switch (rtw_hci_type(rtwdev)) { case RTW_HCI_TYPE_PCIE: - rtw_write32_set(rtwdev, REG_HCI_OPT_CTRL, BIT_BT_DIG_CLK_EN); + rtw_write32_set(rtwdev, REG_HCI_OPT_CTRL, BIT_USB_SUS_DIS); + break; + case RTW_HCI_TYPE_SDIO: + rtw_write8_clr(rtwdev, REG_SDIO_HSUS_CTRL, BIT_HCI_SUS_REQ); + + for (retry = 0; retry < RTW_PWR_POLLING_CNT; retry++) { + if (rtw_read8(rtwdev, REG_SDIO_HSUS_CTRL) & BIT_HCI_RESUME_RDY) + break; + + usleep_range(10, 50); + } + + if (retry == RTW_PWR_POLLING_CNT) { + rtw_err(rtwdev, "failed to poll REG_SDIO_HSUS_CTRL[1]"); + return -ETIMEDOUT; + } + + if (rtw_sdio_is_sdio30_supported(rtwdev)) + rtw_write8_set(rtwdev, REG_HCI_OPT_CTRL + 2, + BIT_SDIO_PAD_E5 >> 16); + else + rtw_write8_clr(rtwdev, REG_HCI_OPT_CTRL + 2, + BIT_SDIO_PAD_E5 >> 16); break; case RTW_HCI_TYPE_USB: break; @@ -217,10 +241,13 @@ static int rtw_pwr_seq_parser(struct rtw_dev *rtwdev, cut_mask = cut_version_to_mask(cut); switch (rtw_hci_type(rtwdev)) { case RTW_HCI_TYPE_PCIE: - intf_mask = BIT(2); + intf_mask = RTW_PWR_INTF_PCI_MSK; break; case RTW_HCI_TYPE_USB: - intf_mask = BIT(1); + intf_mask = RTW_PWR_INTF_USB_MSK; + break; + case RTW_HCI_TYPE_SDIO: + intf_mask = RTW_PWR_INTF_SDIO_MSK; break; default: return -EINVAL; @@ -233,7 +260,7 @@ static int rtw_pwr_seq_parser(struct rtw_dev *rtwdev, ret = rtw_sub_pwr_seq_parser(rtwdev, intf_mask, cut_mask, cmd); if (ret) - return -EBUSY; + return ret; idx++; } while (1); @@ -243,10 +270,12 @@ static int rtw_pwr_seq_parser(struct rtw_dev *rtwdev, static int rtw_mac_power_switch(struct rtw_dev *rtwdev, bool pwr_on) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; const struct rtw_pwr_seq_cmd **pwr_seq; + u32 imr = 0; u8 rpwm; bool cur_pwr; + int ret; if (rtw_chip_wcpu_11ac(rtwdev)) { rpwm = rtw_read8(rtwdev, rtwdev->hci.rpwm_addr); @@ -269,11 +298,24 @@ static int rtw_mac_power_switch(struct rtw_dev *rtwdev, bool pwr_on) if (pwr_on == cur_pwr) return -EALREADY; + if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO) { + imr = rtw_read32(rtwdev, REG_SDIO_HIMR); + rtw_write32(rtwdev, REG_SDIO_HIMR, 0); + } + + if (!pwr_on) + clear_bit(RTW_FLAG_POWERON, rtwdev->flags); + pwr_seq = pwr_on ? chip->pwr_on_seq : chip->pwr_off_seq; - if (rtw_pwr_seq_parser(rtwdev, pwr_seq)) - return -EINVAL; + ret = rtw_pwr_seq_parser(rtwdev, pwr_seq); - return 0; + if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO) + rtw_write32(rtwdev, REG_SDIO_HIMR, imr); + + if (!ret && pwr_on) + set_bit(RTW_FLAG_POWERON, rtwdev->flags); + + return ret; } static int __rtw_mac_init_system_cfg(struct rtw_dev *rtwdev) @@ -335,6 +377,11 @@ int rtw_mac_power_on(struct rtw_dev *rtwdev) ret = rtw_mac_power_switch(rtwdev, true); if (ret == -EALREADY) { rtw_mac_power_switch(rtwdev, false); + + ret = rtw_mac_pre_system_cfg(rtwdev); + if (ret) + goto err; + ret = rtw_mac_power_switch(rtwdev, true); if (ret) goto err; @@ -439,6 +486,9 @@ static void download_firmware_reg_backup(struct rtw_dev *rtwdev, rtw_write16(rtwdev, REG_FIFOPAGE_INFO_1, 0x200); rtw_write32(rtwdev, REG_RQPN_CTRL_2, bckp[bckp_idx - 1].val); + if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO) + rtw_read32(rtwdev, REG_SDIO_FREE_TXPG); + /* Disable beacon related functions */ tmp = rtw_read8(rtwdev, REG_BCN_CTRL); bckp[bckp_idx].len = 1; @@ -530,6 +580,25 @@ static int iddma_download_firmware(struct rtw_dev *rtwdev, u32 src, u32 dst, return 0; } +int rtw_ddma_to_fw_fifo(struct rtw_dev *rtwdev, u32 ocp_src, u32 size) +{ + u32 ch0_ctrl = BIT_DDMACH0_OWN | BIT_DDMACH0_DDMA_MODE; + + if (!check_hw_ready(rtwdev, REG_DDMA_CH0CTRL, BIT_DDMACH0_OWN, 0)) { + rtw_dbg(rtwdev, RTW_DBG_FW, "busy to start ddma\n"); + return -EBUSY; + } + + ch0_ctrl |= size & BIT_MASK_DDMACH0_DLEN; + + if (iddma_enable(rtwdev, ocp_src, OCPBASE_RXBUF_FW_88XX, ch0_ctrl)) { + rtw_dbg(rtwdev, RTW_DBG_FW, "busy to complete ddma\n"); + return -EBUSY; + } + + return 0; +} + static bool check_fw_checksum(struct rtw_dev *rtwdev, u32 addr) { @@ -568,7 +637,7 @@ static int download_firmware_to_mem(struct rtw_dev *rtwdev, const u8 *data, u32 src, u32 dst, u32 size) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; u32 desc_size = chip->tx_pkt_desc_sz; u8 first_part; u32 mem_offset; @@ -725,8 +794,10 @@ static int __rtw_download_firmware(struct rtw_dev *rtwdev, wlan_cpu_enable(rtwdev, true); - if (!ltecoex_reg_write(rtwdev, 0x38, ltecoex_bckp)) - return -EBUSY; + if (!ltecoex_reg_write(rtwdev, 0x38, ltecoex_bckp)) { + ret = -EBUSY; + goto dlfw_fail; + } ret = download_firmware_validate(rtwdev); if (ret) @@ -887,7 +958,8 @@ static int __rtw_download_firmware_legacy(struct rtw_dev *rtwdev, return ret; } -int rtw_download_firmware(struct rtw_dev *rtwdev, struct rtw_fw_state *fw) +static +int _rtw_download_firmware(struct rtw_dev *rtwdev, struct rtw_fw_state *fw) { if (rtw_chip_wcpu_11n(rtwdev)) return __rtw_download_firmware_legacy(rtwdev, fw); @@ -895,6 +967,21 @@ int rtw_download_firmware(struct rtw_dev *rtwdev, struct rtw_fw_state *fw) return __rtw_download_firmware(rtwdev, fw); } +int rtw_download_firmware(struct rtw_dev *rtwdev, struct rtw_fw_state *fw) +{ + int ret; + + ret = _rtw_download_firmware(rtwdev, fw); + if (ret) + return ret; + + if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_PCIE && + rtwdev->chip->id == RTW_CHIP_TYPE_8821C) + rtw_fw_set_recover_bt_device(rtwdev); + + return 0; +} + static u32 get_priority_queues(struct rtw_dev *rtwdev, u32 queues) { const struct rtw_rqpn *rqpn = rtwdev->fifo.rqpn; @@ -915,7 +1002,7 @@ static u32 get_priority_queues(struct rtw_dev *rtwdev, u32 queues) static void __rtw_mac_flush_prio_queue(struct rtw_dev *rtwdev, u32 prio_queue, bool drop) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; const struct rtw_prioq_addr *addr; bool wsize; u16 avail_page, rsvd_page; @@ -977,7 +1064,7 @@ void rtw_mac_flush_queues(struct rtw_dev *rtwdev, u32 queues, bool drop) static int txdma_queue_mapping(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; const struct rtw_rqpn *rqpn = NULL; u16 txdma_pq_map = 0; @@ -995,6 +1082,9 @@ static int txdma_queue_mapping(struct rtw_dev *rtwdev) else return -EINVAL; break; + case RTW_HCI_TYPE_SDIO: + rqpn = &chip->rqpn_table[0]; + break; default: return -EINVAL; } @@ -1013,18 +1103,25 @@ static int txdma_queue_mapping(struct rtw_dev *rtwdev) if (rtw_chip_wcpu_11ac(rtwdev)) rtw_write32(rtwdev, REG_H2CQ_CSR, BIT_H2CQ_FULL); + if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO) { + rtw_read32(rtwdev, REG_SDIO_FREE_TXPG); + rtw_write32(rtwdev, REG_SDIO_TX_CTRL, 0); + } else if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_USB) { + rtw_write8_set(rtwdev, REG_TXDMA_PQ_MAP, BIT_RXDMA_ARBBW_EN); + } + return 0; } static int set_trx_fifo_info(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_fifo_conf *fifo = &rtwdev->fifo; - struct rtw_chip_info *chip = rtwdev->chip; u16 cur_pg_addr; u8 csi_buf_pg_num = chip->csi_buf_pg_num; /* config rsvd page num */ - fifo->rsvd_drv_pg_num = 8; + fifo->rsvd_drv_pg_num = chip->rsvd_drv_pg_num; fifo->txff_pg_num = chip->txff_size >> 7; if (rtw_chip_wcpu_11n(rtwdev)) fifo->rsvd_pg_num = fifo->rsvd_drv_pg_num; @@ -1073,8 +1170,8 @@ static int __priority_queue_cfg(struct rtw_dev *rtwdev, const struct rtw_page_table *pg_tbl, u16 pubq_num) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_fifo_conf *fifo = &rtwdev->fifo; - struct rtw_chip_info *chip = rtwdev->chip; rtw_write16(rtwdev, REG_FIFOPAGE_INFO_1, pg_tbl->hq_num); rtw_write16(rtwdev, REG_FIFOPAGE_INFO_2, pg_tbl->lq_num); @@ -1104,8 +1201,8 @@ static int __priority_queue_cfg_legacy(struct rtw_dev *rtwdev, const struct rtw_page_table *pg_tbl, u16 pubq_num) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_fifo_conf *fifo = &rtwdev->fifo; - struct rtw_chip_info *chip = rtwdev->chip; u32 val32; val32 = BIT_RQPN_NE(pg_tbl->nq_num, pg_tbl->exq_num); @@ -1130,8 +1227,8 @@ static int __priority_queue_cfg_legacy(struct rtw_dev *rtwdev, static int priority_queue_cfg(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_fifo_conf *fifo = &rtwdev->fifo; - struct rtw_chip_info *chip = rtwdev->chip; const struct rtw_page_table *pg_tbl = NULL; u16 pubq_num; int ret; @@ -1154,6 +1251,9 @@ static int priority_queue_cfg(struct rtw_dev *rtwdev) else return -EINVAL; break; + case RTW_HCI_TYPE_SDIO: + pg_tbl = &chip->page_table[0]; + break; default: return -EINVAL; } @@ -1258,7 +1358,7 @@ static int rtw_drv_info_cfg(struct rtw_dev *rtwdev) int rtw_mac_init(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; int ret; ret = rtw_init_trx_cfg(rtwdev); diff --git a/drivers/net/wireless/realtek/rtw88/mac.h b/drivers/net/wireless/realtek/rtw88/mac.h index ce64cdf7a5..58c3dccc14 100644 --- a/drivers/net/wireless/realtek/rtw88/mac.h +++ b/drivers/net/wireless/realtek/rtw88/mac.h @@ -7,7 +7,6 @@ #define RTW_HW_PORT_NUM 5 #define cut_version_to_mask(cut) (0x1 << ((cut) + 1)) -#define SDIO_LOCAL_OFFSET 0x10250000 #define DDMA_POLLING_COUNT 1000 #define C2H_PKT_BUF 256 #define REPORT_BUF 128 @@ -15,7 +14,10 @@ #define ILLEGAL_KEY_GROUP 0xFAAAAA00 /* HW memory address */ +#define OCPBASE_RXBUF_FW_88XX 0x18680000 #define OCPBASE_TXBUF_88XX 0x18780000 +#define OCPBASE_ROM_88XX 0x00000000 +#define OCPBASE_IMEM_88XX 0x00030000 #define OCPBASE_DMEM_88XX 0x00200000 #define OCPBASE_EMEM_88XX 0x00100000 @@ -33,6 +35,7 @@ void rtw_mac_power_off(struct rtw_dev *rtwdev); int rtw_download_firmware(struct rtw_dev *rtwdev, struct rtw_fw_state *fw); int rtw_mac_init(struct rtw_dev *rtwdev); void rtw_mac_flush_queues(struct rtw_dev *rtwdev, u32 queues, bool drop); +int rtw_ddma_to_fw_fifo(struct rtw_dev *rtwdev, u32 ocp_src, u32 size); static inline void rtw_mac_flush_all_queues(struct rtw_dev *rtwdev, bool drop) { diff --git a/drivers/net/wireless/realtek/rtw88/mac80211.c b/drivers/net/wireless/realtek/rtw88/mac80211.c index c92fba2fa4..c564068156 100644 --- a/drivers/net/wireless/realtek/rtw88/mac80211.c +++ b/drivers/net/wireless/realtek/rtw88/mac80211.c @@ -13,6 +13,9 @@ #include "bf.h" #include "debug.h" #include "wow.h" +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 11, 0) +#include "sar.h" +#endif static void rtw_ops_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control, @@ -42,7 +45,11 @@ static void rtw_ops_wake_tx_queue(struct ieee80211_hw *hw, list_add_tail(&rtwtxq->list, &rtwdev->txqs); spin_unlock_bh(&rtwdev->txq_lock); - tasklet_schedule(&rtwdev->tx_tasklet); + /* ensure to dequeue EAPOL (4/4) at the right time */ + if (txq->ac == IEEE80211_AC_VO) + __rtw_tx_work(rtwdev); + else + queue_work(rtwdev->tx_wq, &rtwdev->tx_work); } static int rtw_ops_start(struct ieee80211_hw *hw) @@ -71,6 +78,9 @@ static int rtw_ops_config(struct ieee80211_hw *hw, u32 changed) struct rtw_dev *rtwdev = hw->priv; int ret = 0; + /* let previous ips work finish to ensure we don't leave ips twice */ + cancel_work_sync(&rtwdev->ips_work); + mutex_lock(&rtwdev->mutex); rtw_leave_lps_deep(rtwdev); @@ -84,20 +94,12 @@ static int rtw_ops_config(struct ieee80211_hw *hw, u32 changed) } } - if (changed & IEEE80211_CONF_CHANGE_PS) { - if (hw->conf.flags & IEEE80211_CONF_PS) { - rtwdev->ps_enabled = true; - } else { - rtwdev->ps_enabled = false; - rtw_leave_lps(rtwdev); - } - } - if (changed & IEEE80211_CONF_CHANGE_CHANNEL) rtw_set_channel(rtwdev); if ((changed & IEEE80211_CONF_CHANGE_IDLE) && - (hw->conf.flags & IEEE80211_CONF_IDLE)) + (hw->conf.flags & IEEE80211_CONF_IDLE) && + !test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) rtw_enter_ips(rtwdev); out: @@ -150,21 +152,32 @@ static int rtw_ops_add_interface(struct ieee80211_hw *hw, struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; enum rtw_net_type net_type; u32 config = 0; - u8 port = 0; + u8 port; u8 bcn_ctrl = 0; - rtwvif->port = port; + if (rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_BCN_FILTER)) + vif->driver_flags |= IEEE80211_VIF_BEACON_FILTER | + IEEE80211_VIF_SUPPORTS_CQM_RSSI; rtwvif->stats.tx_unicast = 0; rtwvif->stats.rx_unicast = 0; rtwvif->stats.tx_cnt = 0; rtwvif->stats.rx_cnt = 0; + rtwvif->scan_req = NULL; memset(&rtwvif->bfee, 0, sizeof(struct rtw_bfee)); - rtwvif->conf = &rtw_vif_port[port]; rtw_txq_init(rtwdev, vif->txq); INIT_LIST_HEAD(&rtwvif->rsvd_page_list); mutex_lock(&rtwdev->mutex); + port = find_first_zero_bit(rtwdev->hw_port, RTW_PORT_NUM); + if (port >= RTW_PORT_NUM) { + mutex_unlock(&rtwdev->mutex); + return -EINVAL; + } + set_bit(port, rtwdev->hw_port); + + rtwvif->port = port; + rtwvif->conf = &rtw_vif_port[port]; rtw_leave_lps_deep(rtwdev); switch (vif->type) { @@ -186,6 +199,7 @@ static int rtw_ops_add_interface(struct ieee80211_hw *hw, break; default: WARN_ON(1); + clear_bit(rtwvif->port, rtwdev->hw_port); mutex_unlock(&rtwdev->mutex); return -EINVAL; } @@ -197,10 +211,12 @@ static int rtw_ops_add_interface(struct ieee80211_hw *hw, rtwvif->bcn_ctrl = bcn_ctrl; config |= PORT_SET_BCN_CTRL; rtw_vif_port_config(rtwdev, rtwvif, config); + rtw_core_port_switch(rtwdev, vif); + rtw_recalc_lps(rtwdev, vif); mutex_unlock(&rtwdev->mutex); - rtw_info(rtwdev, "start vif %pM on port %d\n", vif->addr, rtwvif->port); + rtw_dbg(rtwdev, RTW_DBG_STATE, "start vif %pM on port %d\n", vif->addr, rtwvif->port); return 0; } @@ -211,7 +227,7 @@ static void rtw_ops_remove_interface(struct ieee80211_hw *hw, struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; u32 config = 0; - rtw_info(rtwdev, "stop vif %pM on port %d\n", vif->addr, rtwvif->port); + rtw_dbg(rtwdev, RTW_DBG_STATE, "stop vif %pM on port %d\n", vif->addr, rtwvif->port); mutex_lock(&rtwdev->mutex); @@ -227,6 +243,8 @@ static void rtw_ops_remove_interface(struct ieee80211_hw *hw, rtwvif->bcn_ctrl = 0; config |= PORT_SET_BCN_CTRL; rtw_vif_port_config(rtwdev, rtwvif, config); + clear_bit(rtwvif->port, rtwdev->hw_port); + rtw_recalc_lps(rtwdev, NULL); mutex_unlock(&rtwdev->mutex); } @@ -237,8 +255,8 @@ static int rtw_ops_change_interface(struct ieee80211_hw *hw, { struct rtw_dev *rtwdev = hw->priv; - rtw_info(rtwdev, "change vif %pM (%d)->(%d), p2p (%d)->(%d)\n", - vif->addr, vif->type, type, vif->p2p, p2p); + rtw_dbg(rtwdev, RTW_DBG_STATE, "change vif %pM (%d)->(%d), p2p (%d)->(%d)\n", + vif->addr, vif->type, type, vif->p2p, p2p); rtw_ops_remove_interface(hw, vif); @@ -347,10 +365,16 @@ static void rtw_conf_tx(struct rtw_dev *rtwdev, static void rtw_ops_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_bss_conf *conf, +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) + u64 changed) +#else u32 changed) +#endif { struct rtw_dev *rtwdev = hw->priv; struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; + struct rtw_coex *coex = &rtwdev->coex; + struct rtw_coex_stat *coex_stat = &coex->stat; u32 config = 0; mutex_lock(&rtwdev->mutex); @@ -359,17 +383,32 @@ static void rtw_ops_bss_info_changed(struct ieee80211_hw *hw, if (changed & BSS_CHANGED_ASSOC) { rtw_vif_assoc_changed(rtwvif, conf); +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) + if (vif->cfg.assoc) { +#else if (conf->assoc) { +#endif rtw_coex_connect_notify(rtwdev, COEX_ASSOCIATE_FINISH); rtw_fw_download_rsvd_page(rtwdev); rtw_send_rsvd_page_h2c(rtwdev); + rtw_fw_default_port(rtwdev, rtwvif); +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) + rtw_coex_media_status_notify(rtwdev, vif->cfg.assoc); +#else rtw_coex_media_status_notify(rtwdev, conf->assoc); +#endif if (rtw_bf_support) rtw_bf_assoc(rtwdev, vif, conf); } else { rtw_leave_lps(rtwdev); rtw_bf_disassoc(rtwdev, vif, conf); + /* Abort ongoing scan if cancel_scan isn't issued + * when disconnected by peer + */ + if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) + rtw_hw_scan_abort(rtwdev); + } config |= PORT_SET_NET_TYPE; @@ -379,10 +418,22 @@ static void rtw_ops_bss_info_changed(struct ieee80211_hw *hw, if (changed & BSS_CHANGED_BSSID) { ether_addr_copy(rtwvif->bssid, conf->bssid); config |= PORT_SET_BSSID; + if (!rtw_core_check_sta_active(rtwdev)) + rtw_clear_op_chan(rtwdev); + else + rtw_store_op_chan(rtwdev, true); } - if (changed & BSS_CHANGED_BEACON) + if (changed & BSS_CHANGED_BEACON_INT) { + if (ieee80211_vif_type_p2p(vif) == NL80211_IFTYPE_STATION) + coex_stat->wl_beacon_interval = conf->beacon_int; + } + + if (changed & BSS_CHANGED_BEACON) { + rtw_set_dtim_period(rtwdev, conf->dtim_period); rtw_fw_download_rsvd_page(rtwdev); + rtw_send_rsvd_page_h2c(rtwdev); + } if (changed & BSS_CHANGED_BEACON_ENABLED) { if (conf->enable_beacon) @@ -392,6 +443,8 @@ static void rtw_ops_bss_info_changed(struct ieee80211_hw *hw, rtw_write32_clr(rtwdev, REG_FWHW_TXQ_CTRL, BIT_EN_BCNQ_DL); } + if (changed & BSS_CHANGED_CQM) + rtw_fw_beacon_filter_config(rtwdev, true, vif); if (changed & BSS_CHANGED_MU_GROUPS) rtw_chip_set_gid_table(rtwdev, vif, conf); @@ -399,13 +452,61 @@ static void rtw_ops_bss_info_changed(struct ieee80211_hw *hw, if (changed & BSS_CHANGED_ERP_SLOT) rtw_conf_tx(rtwdev, rtwvif); + if (changed & BSS_CHANGED_PS) + rtw_recalc_lps(rtwdev, NULL); + rtw_vif_port_config(rtwdev, rtwvif, config); mutex_unlock(&rtwdev->mutex); } +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) +static int rtw_ops_start_ap(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + struct ieee80211_bss_conf *link_conf) +#else +static int rtw_ops_start_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif) +#endif +{ + struct rtw_dev *rtwdev = hw->priv; + const struct rtw_chip_info *chip = rtwdev->chip; + + mutex_lock(&rtwdev->mutex); + rtw_write32_set(rtwdev, REG_TCR, BIT_TCR_UPDATE_HGQMD); + rtwdev->ap_active = true; + rtw_store_op_chan(rtwdev, true); + chip->ops->phy_calibration(rtwdev); + mutex_unlock(&rtwdev->mutex); + + return 0; +} + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) +static void rtw_ops_stop_ap(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + struct ieee80211_bss_conf *link_conf) +#else +static void rtw_ops_stop_ap(struct ieee80211_hw *hw, + struct ieee80211_vif *vif) +#endif +{ + struct rtw_dev *rtwdev = hw->priv; + + mutex_lock(&rtwdev->mutex); + rtw_write32_clr(rtwdev, REG_TCR, BIT_TCR_UPDATE_HGQMD); + rtwdev->ap_active = false; + if (!rtw_core_check_sta_active(rtwdev)) + rtw_clear_op_chan(rtwdev); + mutex_unlock(&rtwdev->mutex); +} + static int rtw_ops_conf_tx(struct ieee80211_hw *hw, - struct ieee80211_vif *vif, u16 ac, + struct ieee80211_vif *vif, +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) + unsigned int link_id, u16 ac, +#else + u16 ac, +#endif const struct ieee80211_tx_queue_params *params) { struct rtw_dev *rtwdev = hw->priv; @@ -444,12 +545,23 @@ static int rtw_ops_sta_remove(struct ieee80211_hw *hw, struct rtw_dev *rtwdev = hw->priv; mutex_lock(&rtwdev->mutex); + rtw_fw_beacon_filter_config(rtwdev, false, vif); rtw_sta_remove(rtwdev, sta, true); mutex_unlock(&rtwdev->mutex); return 0; } +static int rtw_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, + bool set) +{ + struct rtw_dev *rtwdev = hw->priv; + + ieee80211_queue_work(hw, &rtwdev->update_beacon_work); + + return 0; +} + static int rtw_ops_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, struct ieee80211_vif *vif, struct ieee80211_sta *sta, struct ieee80211_key_conf *key) @@ -513,13 +625,14 @@ static int rtw_ops_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, hw_key_type, hw_key_idx); break; case DISABLE_KEY: + rtw_hci_flush_all_queues(rtwdev, false); rtw_mac_flush_all_queues(rtwdev, false); rtw_sec_clear_cam(rtwdev, sec, key->hw_key_idx); break; } /* download new cam settings for PG to backup */ - if (rtw_fw_lps_deep_mode == LPS_DEEP_MODE_PG) + if (rtw_get_lps_deep_mode(rtwdev) == LPS_DEEP_MODE_PG) rtw_fw_download_rsvd_page(rtwdev); out: @@ -528,18 +641,35 @@ static int rtw_ops_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, return ret; } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 6, 0) static int rtw_ops_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_ampdu_params *params) +#else +static int rtw_ops_ampdu_action(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + enum ieee80211_ampdu_mlme_action action, + struct ieee80211_sta *sta, u16 tid, u16 *ssn, + u8 buf_size, bool amsdu) +#endif { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 6, 0) struct ieee80211_sta *sta = params->sta; u16 tid = params->tid; struct ieee80211_txq *txq = sta->txq[tid]; struct rtw_txq *rtwtxq = (struct rtw_txq *)txq->drv_priv; switch (params->action) { +#else + switch (action) { +#endif case IEEE80211_AMPDU_TX_START: +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 5, 0) return IEEE80211_AMPDU_TX_START_IMMEDIATE; +#else + ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); + break; +#endif case IEEE80211_AMPDU_TX_STOP_CONT: case IEEE80211_AMPDU_TX_STOP_FLUSH: case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: @@ -560,6 +690,7 @@ static int rtw_ops_ampdu_action(struct ieee80211_hw *hw, return 0; } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0) static bool rtw_ops_can_aggregate_in_amsdu(struct ieee80211_hw *hw, struct sk_buff *head, struct sk_buff *skb) @@ -573,6 +704,7 @@ static bool rtw_ops_can_aggregate_in_amsdu(struct ieee80211_hw *hw, return true; } +#endif static void rtw_ops_sw_scan_start(struct ieee80211_hw *hw, struct ieee80211_vif *vif, @@ -580,21 +712,9 @@ static void rtw_ops_sw_scan_start(struct ieee80211_hw *hw, { struct rtw_dev *rtwdev = hw->priv; struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; - u32 config = 0; mutex_lock(&rtwdev->mutex); - - rtw_leave_lps(rtwdev); - - ether_addr_copy(rtwvif->mac_addr, mac_addr); - config |= PORT_SET_MAC_ADDR; - rtw_vif_port_config(rtwdev, rtwvif, config); - - rtw_coex_scan_notify(rtwdev, COEX_SCAN_START); - - set_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags); - set_bit(RTW_FLAG_SCANNING, rtwdev->flags); - + rtw_core_scan_start(rtwdev, rtwvif, mac_addr, false); mutex_unlock(&rtwdev->mutex); } @@ -602,26 +722,24 @@ static void rtw_ops_sw_scan_complete(struct ieee80211_hw *hw, struct ieee80211_vif *vif) { struct rtw_dev *rtwdev = hw->priv; - struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; - u32 config = 0; mutex_lock(&rtwdev->mutex); - - clear_bit(RTW_FLAG_SCANNING, rtwdev->flags); - clear_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags); - - ether_addr_copy(rtwvif->mac_addr, vif->addr); - config |= PORT_SET_MAC_ADDR; - rtw_vif_port_config(rtwdev, rtwvif, config); - - rtw_coex_scan_notify(rtwdev, COEX_SCAN_FINISH); - + rtw_core_scan_complete(rtwdev, vif, false); mutex_unlock(&rtwdev->mutex); } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 18, 0) static void rtw_ops_mgd_prepare_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,14,0)) + struct ieee80211_prep_tx_info *info) + #else u16 duration) + #endif +#else +static void rtw_ops_mgd_prepare_tx(struct ieee80211_hw *hw, + struct ieee80211_vif *vif) +#endif { struct rtw_dev *rtwdev = hw->priv; @@ -663,6 +781,7 @@ static void rtw_ops_flush(struct ieee80211_hw *hw, mutex_lock(&rtwdev->mutex); rtw_leave_lps_deep(rtwdev); + rtw_hci_flush_queues(rtwdev, queues, drop); rtw_mac_flush_queues(rtwdev, queues, drop); mutex_unlock(&rtwdev->mutex); } @@ -691,7 +810,7 @@ static void rtw_ra_mask_info_update_iter(void *data, struct ieee80211_sta *sta) } si->use_cfg_mask = true; - rtw_update_sta_info(br_data->rtwdev, si); + rtw_update_sta_info(br_data->rtwdev, si, true); } static void rtw_ra_mask_info_update(struct rtw_dev *rtwdev, @@ -703,7 +822,7 @@ static void rtw_ra_mask_info_update(struct rtw_dev *rtwdev, br_data.rtwdev = rtwdev; br_data.vif = vif; br_data.mask = mask; - rtw_iterate_stas_atomic(rtwdev, rtw_ra_mask_info_update_iter, &br_data); + rtw_iterate_stas(rtwdev, rtw_ra_mask_info_update_iter, &br_data); } static int rtw_ops_set_bitrate_mask(struct ieee80211_hw *hw, @@ -712,7 +831,9 @@ static int rtw_ops_set_bitrate_mask(struct ieee80211_hw *hw, { struct rtw_dev *rtwdev = hw->priv; + mutex_lock(&rtwdev->mutex); rtw_ra_mask_info_update(rtwdev, vif, mask); + mutex_unlock(&rtwdev->mutex); return 0; } @@ -722,7 +843,7 @@ static int rtw_ops_set_antenna(struct ieee80211_hw *hw, u32 rx_antenna) { struct rtw_dev *rtwdev = hw->priv; - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; int ret; if (!chip->ops->set_antenna) @@ -797,6 +918,71 @@ static void rtw_reconfig_complete(struct ieee80211_hw *hw, mutex_unlock(&rtwdev->mutex); } +static int rtw_ops_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, + struct ieee80211_scan_request *req) +{ + struct rtw_dev *rtwdev = hw->priv; + int ret; + + if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_SCAN_OFFLOAD)) + return 1; + + if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) + return -EBUSY; + + mutex_lock(&rtwdev->mutex); + rtw_hw_scan_start(rtwdev, vif, req); + ret = rtw_hw_scan_offload(rtwdev, vif, true); + if (ret) { + rtw_hw_scan_abort(rtwdev); + rtw_err(rtwdev, "HW scan failed with status: %d\n", ret); + } + mutex_unlock(&rtwdev->mutex); + + return ret; +} + +static void rtw_ops_cancel_hw_scan(struct ieee80211_hw *hw, + struct ieee80211_vif *vif) +{ + struct rtw_dev *rtwdev = hw->priv; + + if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_SCAN_OFFLOAD)) + return; + + if (!test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) + return; + + mutex_lock(&rtwdev->mutex); + rtw_hw_scan_abort(rtwdev); + mutex_unlock(&rtwdev->mutex); +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 11, 0) +static int rtw_ops_set_sar_specs(struct ieee80211_hw *hw, + const struct cfg80211_sar_specs *sar) +{ + struct rtw_dev *rtwdev = hw->priv; + + mutex_lock(&rtwdev->mutex); + rtw_set_sar_specs(rtwdev, sar); + mutex_unlock(&rtwdev->mutex); + + return 0; +} +#endif + +static void rtw_ops_sta_rc_update(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + struct ieee80211_sta *sta, u32 changed) +{ + struct rtw_dev *rtwdev = hw->priv; + struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; + + if (changed & IEEE80211_RC_BW_CHANGED) + ieee80211_queue_work(rtwdev->hw, &si->rc_work); +} + const struct ieee80211_ops rtw_ops = { .tx = rtw_ops_tx, .wake_tx_queue = rtw_ops_wake_tx_queue, @@ -808,12 +994,17 @@ const struct ieee80211_ops rtw_ops = { .change_interface = rtw_ops_change_interface, .configure_filter = rtw_ops_configure_filter, .bss_info_changed = rtw_ops_bss_info_changed, + .start_ap = rtw_ops_start_ap, + .stop_ap = rtw_ops_stop_ap, .conf_tx = rtw_ops_conf_tx, .sta_add = rtw_ops_sta_add, .sta_remove = rtw_ops_sta_remove, + .set_tim = rtw_ops_set_tim, .set_key = rtw_ops_set_key, .ampdu_action = rtw_ops_ampdu_action, +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0) .can_aggregate_in_amsdu = rtw_ops_can_aggregate_in_amsdu, +#endif .sw_scan_start = rtw_ops_sw_scan_start, .sw_scan_complete = rtw_ops_sw_scan_complete, .mgd_prepare_tx = rtw_ops_mgd_prepare_tx, @@ -824,6 +1015,12 @@ const struct ieee80211_ops rtw_ops = { .set_antenna = rtw_ops_set_antenna, .get_antenna = rtw_ops_get_antenna, .reconfig_complete = rtw_reconfig_complete, + .hw_scan = rtw_ops_hw_scan, + .cancel_hw_scan = rtw_ops_cancel_hw_scan, + .sta_rc_update = rtw_ops_sta_rc_update, +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 11, 0) + .set_sar_specs = rtw_ops_set_sar_specs, +#endif #ifdef CONFIG_PM .suspend = rtw_ops_suspend, .resume = rtw_ops_resume, diff --git a/drivers/net/wireless/realtek/rtw88/main.c b/drivers/net/wireless/realtek/rtw88/main.c index 2ef1416899..f58902994a 100644 --- a/drivers/net/wireless/realtek/rtw88/main.c +++ b/drivers/net/wireless/realtek/rtw88/main.c @@ -2,6 +2,8 @@ /* Copyright(c) 2018-2019 Realtek Corporation */ +#include + #include "main.h" #include "regd.h" #include "fw.h" @@ -15,18 +17,28 @@ #include "tx.h" #include "debug.h" #include "bf.h" +#include "sar.h" +#include "sdio.h" -unsigned int rtw_fw_lps_deep_mode; -EXPORT_SYMBOL(rtw_fw_lps_deep_mode); +bool rtw_disable_lps_deep_mode; +EXPORT_SYMBOL(rtw_disable_lps_deep_mode); bool rtw_bf_support = true; unsigned int rtw_debug_mask; EXPORT_SYMBOL(rtw_debug_mask); +/* EDCCA is enabled during normal behavior. For debugging purpose in + * a noisy environment, it can be disabled via edcca debugfs. Because + * all rtw88 devices will probably be affected if environment is noisy, + * rtw_edcca_enabled is just declared by driver instead of by device. + * So, turning it off will take effect for all rtw88 devices before + * there is a tough reason to maintain rtw_edcca_enabled by device. + */ +bool rtw_edcca_enabled = true; -module_param_named(lps_deep_mode, rtw_fw_lps_deep_mode, uint, 0644); +module_param_named(disable_lps_deep, rtw_disable_lps_deep_mode, bool, 0644); module_param_named(support_bf, rtw_bf_support, bool, 0644); module_param_named(debug_mask, rtw_debug_mask, uint, 0644); -MODULE_PARM_DESC(lps_deep_mode, "Deeper PS mode. If 0, deep PS is disabled"); +MODULE_PARM_DESC(disable_lps_deep, "Set Y to disable Deep PS"); MODULE_PARM_DESC(support_bf, "Set Y to enable beamformee support"); MODULE_PARM_DESC(debug_mask, "Debugging mask"); @@ -67,6 +79,7 @@ static struct ieee80211_channel rtw_channeltable_5g[] = { {.center_freq = 5660, .hw_value = 132,}, {.center_freq = 5680, .hw_value = 136,}, {.center_freq = 5700, .hw_value = 140,}, + {.center_freq = 5720, .hw_value = 144,}, {.center_freq = 5745, .hw_value = 149,}, {.center_freq = 5765, .hw_value = 153,}, {.center_freq = 5785, .hw_value = 157,}, @@ -90,6 +103,26 @@ static struct ieee80211_rate rtw_ratetable[] = { {.bitrate = 540, .hw_value = 0x0b,}, }; +static const struct ieee80211_iface_limit rtw_iface_limits[] = { + { + .max = 1, + .types = BIT(NL80211_IFTYPE_STATION), + }, + { + .max = 1, + .types = BIT(NL80211_IFTYPE_AP), + } +}; + +static const struct ieee80211_iface_combination rtw_iface_combs[] = { + { + .limits = rtw_iface_limits, + .n_limits = ARRAY_SIZE(rtw_iface_limits), + .max_interfaces = 2, + .num_different_channels = 1, + } +}; + u16 rtw_desc_to_bitrate(u8 desc_rate) { struct ieee80211_rate rate; @@ -152,14 +185,17 @@ static void rtw_dynamic_csi_rate(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif) bf_info->cur_csi_rpt_rate = new_csi_rate_idx; } -static void rtw_vif_watch_dog_iter(void *data, u8 *mac, - struct ieee80211_vif *vif) +static void rtw_vif_watch_dog_iter(void *data, struct ieee80211_vif *vif) { struct rtw_watch_dog_iter_data *iter_data = data; struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; if (vif->type == NL80211_IFTYPE_STATION) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) + if (vif->cfg.assoc) +#else if (vif->bss_conf.assoc) +#endif iter_data->rtwvif = rtwvif; rtw_dynamic_csi_rate(iter_data->rtwdev, rtwvif); @@ -195,8 +231,11 @@ static void rtw_watch_dog_work(struct work_struct *work) else clear_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags); + rtw_coex_wl_status_check(rtwdev); + rtw_coex_query_bt_hid_list(rtwdev); + if (busy_traffic != test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags)) - rtw_coex_wl_status_change_notify(rtwdev); + rtw_coex_wl_status_change_notify(rtwdev, 0); if (stats->tx_cnt > RTW_LPS_THRESHOLD || stats->rx_cnt > RTW_LPS_THRESHOLD) @@ -226,19 +265,22 @@ static void rtw_watch_dog_work(struct work_struct *work) rtw_phy_dynamic_mechanism(rtwdev); data.rtwdev = rtwdev; - /* use atomic version to avoid taking local->iflist_mtx mutex */ - rtw_iterate_vifs_atomic(rtwdev, rtw_vif_watch_dog_iter, &data); + /* rtw_iterate_vifs internally uses an atomic iterator which is needed + * to avoid taking local->iflist_mtx mutex + */ + rtw_iterate_vifs(rtwdev, rtw_vif_watch_dog_iter, &data); /* fw supports only one station associated to enter lps, if there are * more than two stations associated to the AP, then we can not enter * lps, because fw does not handle the overlapped beacon interval * - * mac80211 should iterate vifs and determine if driver can enter - * ps by passing IEEE80211_CONF_PS to us, all we need to do is to + * rtw_recalc_lps() iterate vifs and determine if driver can enter + * ps by vif->type and vif->cfg.ps, all we need to do here is to * get that vif and check if device is having traffic more than the * threshold. */ - if (rtwdev->ps_enabled && data.rtwvif && !ps_active) + if (rtwdev->ps_enabled && data.rtwvif && !ps_active && + !rtwdev->beacon_loss && !rtwdev->ap_active) rtw_enter_lps(rtwdev, data.rtwvif->port); rtwdev->watch_dog_cnt++; @@ -259,6 +301,16 @@ static void rtw_c2h_work(struct work_struct *work) } } +static void rtw_ips_work(struct work_struct *work) +{ + struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ips_work); + + mutex_lock(&rtwdev->mutex); + if (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE) + rtw_enter_ips(rtwdev); + mutex_unlock(&rtwdev->mutex); +} + static u8 rtw_acquire_macid(struct rtw_dev *rtwdev) { unsigned long mac_id; @@ -270,29 +322,50 @@ static u8 rtw_acquire_macid(struct rtw_dev *rtwdev) return mac_id; } +static void rtw_sta_rc_work(struct work_struct *work) +{ + struct rtw_sta_info *si = container_of(work, struct rtw_sta_info, + rc_work); + struct rtw_dev *rtwdev = si->rtwdev; + + mutex_lock(&rtwdev->mutex); + rtw_update_sta_info(rtwdev, si, true); + mutex_unlock(&rtwdev->mutex); +} + int rtw_sta_add(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, struct ieee80211_vif *vif) { struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; + struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; int i; si->mac_id = rtw_acquire_macid(rtwdev); if (si->mac_id >= RTW_MAX_MAC_ID_NUM) return -ENOSPC; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) + if (vif->type == NL80211_IFTYPE_STATION && vif->cfg.assoc == 0) +#else + if (vif->type == NL80211_IFTYPE_STATION && vif->bss_conf.assoc == 0) +#endif + rtwvif->mac_id = si->mac_id; + si->rtwdev = rtwdev; si->sta = sta; si->vif = vif; si->init_ra_lv = 1; ewma_rssi_init(&si->avg_rssi); for (i = 0; i < ARRAY_SIZE(sta->txq); i++) rtw_txq_init(rtwdev, sta->txq[i]); + INIT_WORK(&si->rc_work, rtw_sta_rc_work); - rtw_update_sta_info(rtwdev, si); + rtw_update_sta_info(rtwdev, si, true); rtw_fw_media_status_report(rtwdev, si->mac_id, true); rtwdev->sta_cnt++; - rtw_info(rtwdev, "sta %pM joined with macid %d\n", - sta->addr, si->mac_id); + rtwdev->beacon_loss = false; + rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM joined with macid %d\n", + sta->addr, si->mac_id); return 0; } @@ -303,6 +376,8 @@ void rtw_sta_remove(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; int i; + cancel_work_sync(&si->rc_work); + rtw_release_macid(rtwdev, si->mac_id); if (fw_exist) rtw_fw_media_status_report(rtwdev, si->mac_id, false); @@ -313,65 +388,203 @@ void rtw_sta_remove(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, kfree(si->mask); rtwdev->sta_cnt--; - rtw_info(rtwdev, "sta %pM with macid %d left\n", - sta->addr, si->mac_id); + rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM with macid %d left\n", + sta->addr, si->mac_id); +} + +struct rtw_fwcd_hdr { + u32 item; + u32 size; + u32 padding1; + u32 padding2; +} __packed; + +static int rtw_fwcd_prep(struct rtw_dev *rtwdev) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; + const struct rtw_fwcd_segs *segs = chip->fwcd_segs; + u32 prep_size = chip->fw_rxff_size + sizeof(struct rtw_fwcd_hdr); + u8 i; + + if (segs) { + prep_size += segs->num * sizeof(struct rtw_fwcd_hdr); + + for (i = 0; i < segs->num; i++) + prep_size += segs->segs[i]; + } + + desc->data = vmalloc(prep_size); + if (!desc->data) + return -ENOMEM; + + desc->size = prep_size; + desc->next = desc->data; + + return 0; +} + +static u8 *rtw_fwcd_next(struct rtw_dev *rtwdev, u32 item, u32 size) +{ + struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; + struct rtw_fwcd_hdr *hdr; + u8 *next; + + if (!desc->data) { + rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared successfully\n"); + return NULL; + } + + next = desc->next + sizeof(struct rtw_fwcd_hdr); + if (next - desc->data + size > desc->size) { + rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared enough\n"); + return NULL; + } + + hdr = (struct rtw_fwcd_hdr *)(desc->next); + hdr->item = item; + hdr->size = size; + hdr->padding1 = 0x01234567; + hdr->padding2 = 0x89abcdef; + desc->next = next + size; + + return next; +} + +static void rtw_fwcd_dump(struct rtw_dev *rtwdev) +{ + struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; + + rtw_dbg(rtwdev, RTW_DBG_FW, "dump fwcd\n"); + + /* Data will be freed after lifetime of device coredump. After calling + * dev_coredump, data is supposed to be handled by the device coredump + * framework. Note that a new dump will be discarded if a previous one + * hasn't been released yet. + */ + dev_coredumpv(rtwdev->dev, desc->data, desc->size, GFP_KERNEL); } -static bool rtw_fw_dump_crash_log(struct rtw_dev *rtwdev) +static void rtw_fwcd_free(struct rtw_dev *rtwdev, bool free_self) +{ + struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc; + + if (free_self) { + rtw_dbg(rtwdev, RTW_DBG_FW, "free fwcd by self\n"); + vfree(desc->data); + } + + desc->data = NULL; + desc->next = NULL; +} + +static int rtw_fw_dump_crash_log(struct rtw_dev *rtwdev) { u32 size = rtwdev->chip->fw_rxff_size; u32 *buf; u8 seq; - bool ret = true; - buf = vmalloc(size); + buf = (u32 *)rtw_fwcd_next(rtwdev, RTW_FWCD_TLV, size); if (!buf) - goto exit; + return -ENOMEM; if (rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0, size, buf)) { rtw_dbg(rtwdev, RTW_DBG_FW, "dump fw fifo fail\n"); - goto free_buf; + return -EINVAL; } if (GET_FW_DUMP_LEN(buf) == 0) { rtw_dbg(rtwdev, RTW_DBG_FW, "fw crash dump's length is 0\n"); - goto free_buf; + return -EINVAL; } seq = GET_FW_DUMP_SEQ(buf); - if (seq > 0 && seq != (rtwdev->fw.prev_dump_seq + 1)) { + if (seq > 0) { rtw_dbg(rtwdev, RTW_DBG_FW, "fw crash dump's seq is wrong: %d\n", seq); - goto free_buf; + return -EINVAL; } - if (seq == 0 && - (GET_FW_DUMP_TLV_TYPE(buf) != FW_CD_TYPE || - GET_FW_DUMP_TLV_LEN(buf) != FW_CD_LEN || - GET_FW_DUMP_TLV_VAL(buf) != FW_CD_VAL)) { - rtw_dbg(rtwdev, RTW_DBG_FW, "fw crash dump's tlv is wrong\n"); - goto free_buf; + + return 0; +} + +int rtw_dump_fw(struct rtw_dev *rtwdev, const u32 ocp_src, u32 size, + u32 fwcd_item) +{ + u32 rxff = rtwdev->chip->fw_rxff_size; + u32 dump_size, done_size = 0; + u8 *buf; + int ret; + + buf = rtw_fwcd_next(rtwdev, fwcd_item, size); + if (!buf) + return -ENOMEM; + + while (size) { + dump_size = size > rxff ? rxff : size; + + ret = rtw_ddma_to_fw_fifo(rtwdev, ocp_src + done_size, + dump_size); + if (ret) { + rtw_err(rtwdev, + "ddma fw 0x%x [+0x%x] to fw fifo fail\n", + ocp_src, done_size); + return ret; + } + + ret = rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0, + dump_size, (u32 *)(buf + done_size)); + if (ret) { + rtw_err(rtwdev, + "dump fw 0x%x [+0x%x] from fw fifo fail\n", + ocp_src, done_size); + return ret; + } + + size -= dump_size; + done_size += dump_size; } - print_hex_dump_bytes("rtw88 fw dump: ", DUMP_PREFIX_OFFSET, buf, size); + return 0; +} +EXPORT_SYMBOL(rtw_dump_fw); + +int rtw_dump_reg(struct rtw_dev *rtwdev, const u32 addr, const u32 size) +{ + u8 *buf; + u32 i; - if (GET_FW_DUMP_MORE(buf) == 1) { - rtwdev->fw.prev_dump_seq = seq; - ret = false; + if (addr & 0x3) { + WARN(1, "should be 4-byte aligned, addr = 0x%08x\n", addr); + return -EINVAL; } -free_buf: - vfree(buf); -exit: - rtw_write8(rtwdev, REG_MCU_TST_CFG, 0); + buf = rtw_fwcd_next(rtwdev, RTW_FWCD_REG, size); + if (!buf) + return -ENOMEM; - return ret; + for (i = 0; i < size; i += 4) + *(u32 *)(buf + i) = rtw_read32(rtwdev, addr + i); + + return 0; } +EXPORT_SYMBOL(rtw_dump_reg); void rtw_vif_assoc_changed(struct rtw_vif *rtwvif, struct ieee80211_bss_conf *conf) { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) + struct ieee80211_vif *vif = NULL; + + if (conf) + vif = container_of(conf, struct ieee80211_vif, bss_conf); + + if (conf && vif->cfg.assoc) { + rtwvif->aid = vif->cfg.aid; +#else if (conf && conf->assoc) { rtwvif->aid = conf->aid; +#endif rtwvif->net_type = RTW_NET_MGD_LINKED; } else { rtwvif->aid = 0; @@ -418,34 +631,46 @@ void rtw_fw_recovery(struct rtw_dev *rtwdev) ieee80211_queue_work(rtwdev->hw, &rtwdev->fw_recovery_work); } -static void rtw_fw_recovery_work(struct work_struct *work) +static void __fw_recovery_work(struct rtw_dev *rtwdev) { - struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, - fw_recovery_work); + int ret = 0; - /* rtw_fw_dump_crash_log() returns false indicates that there are - * still more log to dump. Driver set 0x1cf[7:0] = 0x1 to tell firmware - * to dump the remaining part of the log, and firmware will trigger an - * IMR_C2HCMD interrupt to inform driver the log is ready. - */ - if (!rtw_fw_dump_crash_log(rtwdev)) { - rtw_write8(rtwdev, REG_HRCV_MSG, 1); - return; - } - rtwdev->fw.prev_dump_seq = 0; + set_bit(RTW_FLAG_RESTARTING, rtwdev->flags); + clear_bit(RTW_FLAG_RESTART_TRIGGERING, rtwdev->flags); - WARN(1, "firmware crash, start reset and recover\n"); + ret = rtw_fwcd_prep(rtwdev); + if (ret) + goto free; + ret = rtw_fw_dump_crash_log(rtwdev); + if (ret) + goto free; + ret = rtw_chip_dump_fw_crash(rtwdev); + if (ret) + goto free; - mutex_lock(&rtwdev->mutex); + rtw_fwcd_dump(rtwdev); +free: + rtw_fwcd_free(rtwdev, !!ret); + rtw_write8(rtwdev, REG_MCU_TST_CFG, 0); + + WARN(1, "firmware crash, start reset and recover\n"); - set_bit(RTW_FLAG_RESTARTING, rtwdev->flags); rcu_read_lock(); rtw_iterate_keys_rcu(rtwdev, NULL, rtw_reset_key_iter, rtwdev); rcu_read_unlock(); rtw_iterate_stas_atomic(rtwdev, rtw_reset_sta_iter, rtwdev); rtw_iterate_vifs_atomic(rtwdev, rtw_reset_vif_iter, rtwdev); + bitmap_zero(rtwdev->hw_port, RTW_PORT_NUM); rtw_enter_ips(rtwdev); +} + +static void rtw_fw_recovery_work(struct work_struct *work) +{ + struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, + fw_recovery_work); + mutex_lock(&rtwdev->mutex); + __fw_recovery_work(rtwdev); mutex_unlock(&rtwdev->mutex); ieee80211_restart_hw(rtwdev->hw); @@ -485,67 +710,145 @@ static void rtw_txq_ba_work(struct work_struct *work) rtw_iterate_stas_atomic(rtwdev, rtw_txq_ba_iter, &data); } +void rtw_set_rx_freq_band(struct rtw_rx_pkt_stat *pkt_stat, u8 channel) +{ + if (IS_CH_2G_BAND(channel)) + pkt_stat->band = NL80211_BAND_2GHZ; + else if (IS_CH_5G_BAND(channel)) + pkt_stat->band = NL80211_BAND_5GHZ; + else + return; + + pkt_stat->freq = ieee80211_channel_to_frequency(channel, pkt_stat->band); +} +EXPORT_SYMBOL(rtw_set_rx_freq_band); + +void rtw_set_dtim_period(struct rtw_dev *rtwdev, int dtim_period) +{ + rtw_write32_set(rtwdev, REG_TCR, BIT_TCR_UPDATE_TIMIE); + rtw_write8(rtwdev, REG_DTIM_COUNTER_ROOT, dtim_period - 1); +} + +void rtw_update_channel(struct rtw_dev *rtwdev, u8 center_channel, + u8 primary_channel, enum rtw_supported_band band, + enum rtw_bandwidth bandwidth) +{ + enum nl80211_band nl_band = rtw_hw_to_nl80211_band(band); + struct rtw_hal *hal = &rtwdev->hal; + u8 *cch_by_bw = hal->cch_by_bw; + u32 center_freq, primary_freq; + enum rtw_sar_bands sar_band; + u8 primary_channel_idx; + + center_freq = ieee80211_channel_to_frequency(center_channel, nl_band); + primary_freq = ieee80211_channel_to_frequency(primary_channel, nl_band); + + /* assign the center channel used while 20M bw is selected */ + cch_by_bw[RTW_CHANNEL_WIDTH_20] = primary_channel; + + /* assign the center channel used while current bw is selected */ + cch_by_bw[bandwidth] = center_channel; + + switch (bandwidth) { + case RTW_CHANNEL_WIDTH_20: + default: + primary_channel_idx = RTW_SC_DONT_CARE; + break; + case RTW_CHANNEL_WIDTH_40: + if (primary_freq > center_freq) + primary_channel_idx = RTW_SC_20_UPPER; + else + primary_channel_idx = RTW_SC_20_LOWER; + break; + case RTW_CHANNEL_WIDTH_80: + if (primary_freq > center_freq) { + if (primary_freq - center_freq == 10) + primary_channel_idx = RTW_SC_20_UPPER; + else + primary_channel_idx = RTW_SC_20_UPMOST; + + /* assign the center channel used + * while 40M bw is selected + */ + cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel + 4; + } else { + if (center_freq - primary_freq == 10) + primary_channel_idx = RTW_SC_20_LOWER; + else + primary_channel_idx = RTW_SC_20_LOWEST; + + /* assign the center channel used + * while 40M bw is selected + */ + cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel - 4; + } + break; + } + + switch (center_channel) { + case 1 ... 14: + sar_band = RTW_SAR_BAND_0; + break; + case 36 ... 64: + sar_band = RTW_SAR_BAND_1; + break; + case 100 ... 144: + sar_band = RTW_SAR_BAND_3; + break; + case 149 ... 177: + sar_band = RTW_SAR_BAND_4; + break; + default: + WARN(1, "unknown ch(%u) to SAR band\n", center_channel); + sar_band = RTW_SAR_BAND_0; + break; + } + + hal->current_primary_channel_index = primary_channel_idx; + hal->current_band_width = bandwidth; + hal->primary_channel = primary_channel; + hal->current_channel = center_channel; + hal->current_band_type = band; + hal->sar_band = sar_band; +} + void rtw_get_channel_params(struct cfg80211_chan_def *chandef, struct rtw_channel_params *chan_params) { struct ieee80211_channel *channel = chandef->chan; enum nl80211_chan_width width = chandef->width; - u8 *cch_by_bw = chan_params->cch_by_bw; u32 primary_freq, center_freq; u8 center_chan; u8 bandwidth = RTW_CHANNEL_WIDTH_20; - u8 primary_chan_idx = 0; - u8 i; center_chan = channel->hw_value; primary_freq = channel->center_freq; center_freq = chandef->center_freq1; - /* assign the center channel used while 20M bw is selected */ - cch_by_bw[RTW_CHANNEL_WIDTH_20] = channel->hw_value; - switch (width) { case NL80211_CHAN_WIDTH_20_NOHT: case NL80211_CHAN_WIDTH_20: bandwidth = RTW_CHANNEL_WIDTH_20; - primary_chan_idx = RTW_SC_DONT_CARE; break; case NL80211_CHAN_WIDTH_40: bandwidth = RTW_CHANNEL_WIDTH_40; - if (primary_freq > center_freq) { - primary_chan_idx = RTW_SC_20_UPPER; + if (primary_freq > center_freq) center_chan -= 2; - } else { - primary_chan_idx = RTW_SC_20_LOWER; + else center_chan += 2; - } break; case NL80211_CHAN_WIDTH_80: bandwidth = RTW_CHANNEL_WIDTH_80; if (primary_freq > center_freq) { - if (primary_freq - center_freq == 10) { - primary_chan_idx = RTW_SC_20_UPPER; + if (primary_freq - center_freq == 10) center_chan -= 2; - } else { - primary_chan_idx = RTW_SC_20_UPMOST; + else center_chan -= 6; - } - /* assign the center channel used - * while 40M bw is selected - */ - cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan + 4; } else { - if (center_freq - primary_freq == 10) { - primary_chan_idx = RTW_SC_20_LOWER; + if (center_freq - primary_freq == 10) center_chan += 2; - } else { - primary_chan_idx = RTW_SC_20_LOWEST; + else center_chan += 6; - } - /* assign the center channel used - * while 40M bw is selected - */ - cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan - 4; } break; default: @@ -555,40 +858,33 @@ void rtw_get_channel_params(struct cfg80211_chan_def *chandef, chan_params->center_chan = center_chan; chan_params->bandwidth = bandwidth; - chan_params->primary_chan_idx = primary_chan_idx; - - /* assign the center channel used while current bw is selected */ - cch_by_bw[bandwidth] = center_chan; - - for (i = bandwidth + 1; i <= RTW_MAX_CHANNEL_WIDTH; i++) - cch_by_bw[i] = 0; + chan_params->primary_chan = channel->hw_value; } void rtw_set_channel(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct ieee80211_hw *hw = rtwdev->hw; struct rtw_hal *hal = &rtwdev->hal; - struct rtw_chip_info *chip = rtwdev->chip; struct rtw_channel_params ch_param; - u8 center_chan, bandwidth, primary_chan_idx; - u8 i; + u8 center_chan, primary_chan, bandwidth, band; rtw_get_channel_params(&hw->conf.chandef, &ch_param); if (WARN(ch_param.center_chan == 0, "Invalid channel\n")) return; center_chan = ch_param.center_chan; + primary_chan = ch_param.primary_chan; bandwidth = ch_param.bandwidth; - primary_chan_idx = ch_param.primary_chan_idx; + band = ch_param.center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G; - hal->current_band_width = bandwidth; - hal->current_channel = center_chan; - hal->current_band_type = center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G; + rtw_update_channel(rtwdev, center_chan, primary_chan, band, bandwidth); - for (i = RTW_CHANNEL_WIDTH_20; i <= RTW_MAX_CHANNEL_WIDTH; i++) - hal->cch_by_bw[i] = ch_param.cch_by_bw[i]; + if (rtwdev->scan_info.op_chan) + rtw_store_op_chan(rtwdev, true); - chip->ops->set_channel(rtwdev, center_chan, bandwidth, primary_chan_idx); + chip->ops->set_channel(rtwdev, center_chan, bandwidth, + hal->current_primary_channel_index); if (hal->current_band_type == RTW_BAND_5G) { rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G); @@ -611,7 +907,7 @@ void rtw_set_channel(struct rtw_dev *rtwdev) void rtw_chip_prepare_tx(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; if (rtwdev->need_rfk) { rtwdev->need_rfk = false; @@ -680,8 +976,8 @@ static u8 hw_bw_cap_to_bitamp(u8 bw_cap) static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_hal *hal = &rtwdev->hal; - struct rtw_chip_info *chip = rtwdev->chip; if (hw_ant_num == EFUSE_HW_CAP_IGNORE || hw_ant_num >= hal->rf_path_num) @@ -705,7 +1001,11 @@ static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num) static u64 get_vht_ra_mask(struct ieee80211_sta *sta) { u64 ra_mask = 0; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map); +#else u16 mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.rx_mcs_map); +#endif u8 vht_mcs_cap; int i, nss; @@ -825,37 +1125,52 @@ static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num) #define RA_MASK_VHT_RATES (RA_MASK_VHT_RATES_1SS | \ RA_MASK_VHT_RATES_2SS | \ RA_MASK_VHT_RATES_3SS) +#define RA_MASK_CCK_IN_BG 0x00005 #define RA_MASK_CCK_IN_HT 0x00005 #define RA_MASK_CCK_IN_VHT 0x00005 #define RA_MASK_OFDM_IN_VHT 0x00010 #define RA_MASK_OFDM_IN_HT_2G 0x00010 #define RA_MASK_OFDM_IN_HT_5G 0x00030 -static u64 rtw_update_rate_mask(struct rtw_dev *rtwdev, - struct rtw_sta_info *si, - u64 ra_mask, bool is_vht_enable, - u8 wireless_set) +static u64 rtw_rate_mask_rssi(struct rtw_sta_info *si, u8 wireless_set) +{ + u8 rssi_level = si->rssi_level; + + if (wireless_set == WIRELESS_CCK) + return 0xffffffffffffffffULL; + + if (rssi_level == 0) + return 0xffffffffffffffffULL; + else if (rssi_level == 1) + return 0xfffffffffffffff0ULL; + else if (rssi_level == 2) + return 0xffffffffffffefe0ULL; + else if (rssi_level == 3) + return 0xffffffffffffcfc0ULL; + else if (rssi_level == 4) + return 0xffffffffffff8f80ULL; + else + return 0xffffffffffff0f00ULL; +} + +static u64 rtw_rate_mask_recover(u64 ra_mask, u64 ra_mask_bak) +{ + if ((ra_mask & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)) == 0) + ra_mask |= (ra_mask_bak & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)); + + if (ra_mask == 0) + ra_mask |= (ra_mask_bak & (RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)); + + return ra_mask; +} + +static u64 rtw_rate_mask_cfg(struct rtw_dev *rtwdev, struct rtw_sta_info *si, + u64 ra_mask, bool is_vht_enable) { struct rtw_hal *hal = &rtwdev->hal; const struct cfg80211_bitrate_mask *mask = si->mask; u64 cfg_mask = GENMASK_ULL(63, 0); - u8 rssi_level, band; - - if (wireless_set != WIRELESS_CCK) { - rssi_level = si->rssi_level; - if (rssi_level == 0) - ra_mask &= 0xffffffffffffffffULL; - else if (rssi_level == 1) - ra_mask &= 0xfffffffffffffff0ULL; - else if (rssi_level == 2) - ra_mask &= 0xffffffffffffefe0ULL; - else if (rssi_level == 3) - ra_mask &= 0xffffffffffffcfc0ULL; - else if (rssi_level == 4) - ra_mask &= 0xffffffffffff8f80ULL; - else if (rssi_level >= 5) - ra_mask &= 0xffffffffffff0f00ULL; - } + u8 band; if (!si->use_cfg_mask) return ra_mask; @@ -891,8 +1206,10 @@ static u64 rtw_update_rate_mask(struct rtw_dev *rtwdev, return ra_mask; } -void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) +void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, + bool reset_ra_mask) { + struct rtw_dm_info *dm_info = &rtwdev->dm_info; struct ieee80211_sta *sta = si->sta; struct rtw_efuse *efuse = &rtwdev->efuse; struct rtw_hal *hal = &rtwdev->hal; @@ -904,16 +1221,38 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) u8 ldpc_en = 0; u8 tx_num = 1; u64 ra_mask = 0; + u64 ra_mask_bak = 0; bool is_vht_enable = false; bool is_support_sgi = false; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + if (sta->deflink.vht_cap.vht_supported) { +#else if (sta->vht_cap.vht_supported) { +#endif is_vht_enable = true; ra_mask |= get_vht_ra_mask(sta); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK) +#else if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK) +#endif stbc_en = VHT_STBC_EN; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC) +#else if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC) +#endif ldpc_en = VHT_LDPC_EN; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + } else if (sta->deflink.ht_cap.ht_supported) { + ra_mask |= (sta->deflink.ht_cap.mcs.rx_mask[1] << 20) | + (sta->deflink.ht_cap.mcs.rx_mask[0] << 12); + if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) + stbc_en = HT_STBC_EN; + if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING) + ldpc_en = HT_LDPC_EN; +#else } else if (sta->ht_cap.ht_supported) { ra_mask |= (sta->ht_cap.mcs.rx_mask[1] << 20) | (sta->ht_cap.mcs.rx_mask[0] << 12); @@ -921,91 +1260,157 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) stbc_en = HT_STBC_EN; if (sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING) ldpc_en = HT_LDPC_EN; +#endif } - if (efuse->hw_cap.nss == 1) + if (efuse->hw_cap.nss == 1 || rtwdev->hal.txrx_1ss) ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS; if (hal->current_band_type == RTW_BAND_5G) { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_5GHZ] << 4; +#else ra_mask |= (u64)sta->supp_rates[NL80211_BAND_5GHZ] << 4; +#endif + ra_mask_bak = ra_mask; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + if (sta->deflink.vht_cap.vht_supported) { +#else if (sta->vht_cap.vht_supported) { +#endif ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT; wireless_set = WIRELESS_OFDM | WIRELESS_VHT; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + } else if (sta->deflink.ht_cap.ht_supported) { +#else } else if (sta->ht_cap.ht_supported) { +#endif ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G; wireless_set = WIRELESS_OFDM | WIRELESS_HT; } else { wireless_set = WIRELESS_OFDM; } + dm_info->rrsr_val_init = RRSR_INIT_5G; } else if (hal->current_band_type == RTW_BAND_2G) { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + ra_mask |= sta->deflink.supp_rates[NL80211_BAND_2GHZ]; +#else ra_mask |= sta->supp_rates[NL80211_BAND_2GHZ]; +#endif + ra_mask_bak = ra_mask; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + if (sta->deflink.vht_cap.vht_supported) { +#else if (sta->vht_cap.vht_supported) { +#endif ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT | RA_MASK_OFDM_IN_VHT; wireless_set = WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT | WIRELESS_VHT; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + } else if (sta->deflink.ht_cap.ht_supported) { +#else } else if (sta->ht_cap.ht_supported) { +#endif ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT | RA_MASK_OFDM_IN_HT_2G; wireless_set = WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + } else if (sta->deflink.supp_rates[0] <= 0xf) { +#else } else if (sta->supp_rates[0] <= 0xf) { +#endif wireless_set = WIRELESS_CCK; } else { + ra_mask &= RA_MASK_OFDM_RATES | RA_MASK_CCK_IN_BG; wireless_set = WIRELESS_CCK | WIRELESS_OFDM; } + dm_info->rrsr_val_init = RRSR_INIT_2G; } else { rtw_err(rtwdev, "Unknown band type\n"); + ra_mask_bak = ra_mask; wireless_set = 0; } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + switch (sta->deflink.bandwidth) { +#else switch (sta->bandwidth) { +#endif case IEEE80211_STA_RX_BW_80: bw_mode = RTW_CHANNEL_WIDTH_80; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + is_support_sgi = sta->deflink.vht_cap.vht_supported && + (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80); +#else is_support_sgi = sta->vht_cap.vht_supported && (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80); +#endif break; case IEEE80211_STA_RX_BW_40: bw_mode = RTW_CHANNEL_WIDTH_40; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + is_support_sgi = sta->deflink.ht_cap.ht_supported && + (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40); +#else is_support_sgi = sta->ht_cap.ht_supported && (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40); +#endif break; default: bw_mode = RTW_CHANNEL_WIDTH_20; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + is_support_sgi = sta->deflink.ht_cap.ht_supported && + (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20); +#else is_support_sgi = sta->ht_cap.ht_supported && (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20); +#endif break; } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + if (sta->deflink.vht_cap.vht_supported && ra_mask & 0xffc00000) { +#else if (sta->vht_cap.vht_supported && ra_mask & 0xffc00000) { +#endif tx_num = 2; rf_type = RF_2T2R; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + } else if (sta->deflink.ht_cap.ht_supported && ra_mask & 0xfff00000) { +#else } else if (sta->ht_cap.ht_supported && ra_mask & 0xfff00000) { +#endif tx_num = 2; rf_type = RF_2T2R; } rate_id = get_rate_id(wireless_set, bw_mode, tx_num); - ra_mask = rtw_update_rate_mask(rtwdev, si, ra_mask, is_vht_enable, - wireless_set); + ra_mask &= rtw_rate_mask_rssi(si, wireless_set); + ra_mask = rtw_rate_mask_recover(ra_mask, ra_mask_bak); + ra_mask = rtw_rate_mask_cfg(rtwdev, si, ra_mask, is_vht_enable); si->bw_mode = bw_mode; si->stbc_en = stbc_en; si->ldpc_en = ldpc_en; si->rf_type = rf_type; - si->wireless_set = wireless_set; si->sgi_enable = is_support_sgi; si->vht_enable = is_vht_enable; si->ra_mask = ra_mask; si->rate_id = rate_id; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 18, 0) + rtw_fw_send_ra_info(rtwdev, si, reset_ra_mask); +#else rtw_fw_send_ra_info(rtwdev, si); +#endif } static int rtw_wait_firmware_completion(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_fw_state *fw; fw = &rtwdev->fw; @@ -1023,9 +1428,29 @@ static int rtw_wait_firmware_completion(struct rtw_dev *rtwdev) return 0; } +static enum rtw_lps_deep_mode rtw_update_lps_deep_mode(struct rtw_dev *rtwdev, + struct rtw_fw_state *fw) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + + if (rtw_disable_lps_deep_mode || !chip->lps_deep_mode_supported || + !fw->feature) + return LPS_DEEP_MODE_NONE; + + if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_PG)) && + rtw_fw_feature_check(fw, FW_FEATURE_PG)) + return LPS_DEEP_MODE_PG; + + if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_LCLK)) && + rtw_fw_feature_check(fw, FW_FEATURE_LCLK)) + return LPS_DEEP_MODE_LCLK; + + return LPS_DEEP_MODE_NONE; +} + static int rtw_power_on(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_fw_state *fw = &rtwdev->fw; bool wifi_only; int ret; @@ -1087,6 +1512,73 @@ static int rtw_power_on(struct rtw_dev *rtwdev) return ret; } +void rtw_core_fw_scan_notify(struct rtw_dev *rtwdev, bool start) +{ + if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_NOTIFY_SCAN)) + return; + + if (start) { + rtw_fw_scan_notify(rtwdev, true); + } else { + reinit_completion(&rtwdev->fw_scan_density); + rtw_fw_scan_notify(rtwdev, false); + if (!wait_for_completion_timeout(&rtwdev->fw_scan_density, + SCAN_NOTIFY_TIMEOUT)) + rtw_warn(rtwdev, "firmware failed to report density after scan\n"); + } +} + +void rtw_core_scan_start(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif, + const u8 *mac_addr, bool hw_scan) +{ + u32 config = 0; + int ret = 0; + + rtw_leave_lps(rtwdev); + + if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)) { + ret = rtw_leave_ips(rtwdev); + if (ret) { + rtw_err(rtwdev, "failed to leave idle state\n"); + return; + } + } + + ether_addr_copy(rtwvif->mac_addr, mac_addr); + config |= PORT_SET_MAC_ADDR; + rtw_vif_port_config(rtwdev, rtwvif, config); + + rtw_coex_scan_notify(rtwdev, COEX_SCAN_START); + rtw_core_fw_scan_notify(rtwdev, true); + + set_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags); + set_bit(RTW_FLAG_SCANNING, rtwdev->flags); +} + +void rtw_core_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, + bool hw_scan) +{ + struct rtw_vif *rtwvif = vif ? (struct rtw_vif *)vif->drv_priv : NULL; + u32 config = 0; + + if (!rtwvif) + return; + + clear_bit(RTW_FLAG_SCANNING, rtwdev->flags); + clear_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags); + + rtw_core_fw_scan_notify(rtwdev, false); + + ether_addr_copy(rtwvif->mac_addr, vif->addr); + config |= PORT_SET_MAC_ADDR; + rtw_vif_port_config(rtwdev, rtwvif, config); + + rtw_coex_scan_notify(rtwdev, COEX_SCAN_FINISH); + + if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)) + ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work); +} + int rtw_core_start(struct rtw_dev *rtwdev) { int ret; @@ -1097,6 +1589,9 @@ int rtw_core_start(struct rtw_dev *rtwdev) rtw_sec_enable_sec_engine(rtwdev); + rtwdev->lps_conf.deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->fw); + rtwdev->lps_conf.wow_deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->wow_fw); + /* rcr reset after powered on */ rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr); @@ -1111,6 +1606,7 @@ int rtw_core_start(struct rtw_dev *rtwdev) static void rtw_power_off(struct rtw_dev *rtwdev) { rtw_hci_stop(rtwdev); + rtw_coex_power_off_setting(rtwdev); rtw_mac_power_off(rtwdev); } @@ -1124,12 +1620,16 @@ void rtw_core_stop(struct rtw_dev *rtwdev) mutex_unlock(&rtwdev->mutex); cancel_work_sync(&rtwdev->c2h_work); + cancel_work_sync(&rtwdev->update_beacon_work); cancel_delayed_work_sync(&rtwdev->watch_dog_work); cancel_delayed_work_sync(&coex->bt_relink_work); cancel_delayed_work_sync(&coex->bt_reenable_work); cancel_delayed_work_sync(&coex->defreeze_work); cancel_delayed_work_sync(&coex->wl_remain_work); cancel_delayed_work_sync(&coex->bt_remain_work); + cancel_delayed_work_sync(&coex->wl_connecting_work); + cancel_delayed_work_sync(&coex->bt_multi_link_remain_work); + cancel_delayed_work_sync(&coex->wl_ccklock_work); mutex_lock(&rtwdev->mutex); @@ -1139,6 +1639,7 @@ void rtw_core_stop(struct rtw_dev *rtwdev) static void rtw_init_ht_cap(struct rtw_dev *rtwdev, struct ieee80211_sta_ht_cap *ht_cap) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_efuse *efuse = &rtwdev->efuse; ht_cap->ht_supported = true; @@ -1149,13 +1650,15 @@ static void rtw_init_ht_cap(struct rtw_dev *rtwdev, if (rtw_chip_has_rx_ldpc(rtwdev)) ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING; + if (rtw_chip_has_tx_stbc(rtwdev)) + ht_cap->cap |= IEEE80211_HT_CAP_TX_STBC; if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40)) ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 | IEEE80211_HT_CAP_DSSSCCK40 | IEEE80211_HT_CAP_SGI_40; ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; - ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16; + ht_cap->ampdu_density = chip->ampdu_density; ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; if (efuse->hw_cap.nss > 1) { ht_cap->mcs.rx_mask[0] = 0xFF; @@ -1219,8 +1722,23 @@ static void rtw_init_vht_cap(struct rtw_dev *rtwdev, vht_cap->vht_mcs.tx_highest = highest; } +static u16 rtw_get_max_scan_ie_len(struct rtw_dev *rtwdev) +{ + u16 len; + + len = rtwdev->chip->max_scan_ie_len; + + if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_SCAN_OFFLOAD) && + rtwdev->chip->id == RTW_CHIP_TYPE_8822C) + len = IEEE80211_MAX_DATA_LEN; + else if (rtw_fw_feature_ext_check(&rtwdev->fw, FW_FEATURE_EXT_OLD_PAGE_NUM)) + len -= RTW_OLD_PROBE_PG_CNT * TX_PAGE_SIZE; + + return len; +} + static void rtw_set_supported_band(struct ieee80211_hw *hw, - struct rtw_chip_info *chip) + const struct rtw_chip_info *chip) { struct rtw_dev *rtwdev = hw->priv; struct ieee80211_supported_band *sband; @@ -1249,16 +1767,73 @@ static void rtw_set_supported_band(struct ieee80211_hw *hw, err_out: rtw_err(rtwdev, "failed to set supported band\n"); - kfree(sband); } static void rtw_unset_supported_band(struct ieee80211_hw *hw, - struct rtw_chip_info *chip) + const struct rtw_chip_info *chip) { kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]); kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]); } +static void rtw_vif_smps_iter(void *data, u8 *mac, + struct ieee80211_vif *vif) +{ + struct rtw_dev *rtwdev = (struct rtw_dev *)data; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) + if (vif->type != NL80211_IFTYPE_STATION || !vif->cfg.assoc) +#else + if (vif->type != NL80211_IFTYPE_STATION || !vif->bss_conf.assoc) +#endif + return; + + if (rtwdev->hal.txrx_1ss) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) + ieee80211_request_smps(vif, 0, IEEE80211_SMPS_STATIC); +#else + ieee80211_request_smps(vif, IEEE80211_SMPS_STATIC); +#endif + else +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) + ieee80211_request_smps(vif, 0, IEEE80211_SMPS_OFF); +#else + ieee80211_request_smps(vif, IEEE80211_SMPS_OFF); +#endif +} + +void rtw_set_txrx_1ss(struct rtw_dev *rtwdev, bool txrx_1ss) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_hal *hal = &rtwdev->hal; + + if (!chip->ops->config_txrx_mode || rtwdev->hal.txrx_1ss == txrx_1ss) + return; + + rtwdev->hal.txrx_1ss = txrx_1ss; + if (txrx_1ss) + chip->ops->config_txrx_mode(rtwdev, BB_PATH_A, BB_PATH_A, false); + else + chip->ops->config_txrx_mode(rtwdev, hal->antenna_tx, + hal->antenna_rx, false); + rtw_iterate_vifs_atomic(rtwdev, rtw_vif_smps_iter, rtwdev); +} + +static void __update_firmware_feature(struct rtw_dev *rtwdev, + struct rtw_fw_state *fw) +{ + u32 feature; + const struct rtw_fw_hdr *fw_hdr = + (const struct rtw_fw_hdr *)fw->firmware->data; + + feature = le32_to_cpu(fw_hdr->feature); + fw->feature = feature & FW_FEATURE_SIG ? feature : 0; + + if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C && + RTW_FW_SUIT_VER_CODE(rtwdev->fw) < RTW_FW_VER_CODE(9, 9, 13)) + fw->feature_ext |= FW_FEATURE_EXT_OLD_PAGE_NUM; +} + static void __update_firmware_info(struct rtw_dev *rtwdev, struct rtw_fw_state *fw) { @@ -1269,6 +1844,8 @@ static void __update_firmware_info(struct rtw_dev *rtwdev, fw->version = le16_to_cpu(fw_hdr->version); fw->sub_version = fw_hdr->subversion; fw->sub_index = fw_hdr->subindex; + + __update_firmware_feature(rtwdev, fw); } static void __update_firmware_info_legacy(struct rtw_dev *rtwdev, @@ -1307,7 +1884,8 @@ static void rtw_load_firmware_cb(const struct firmware *firmware, void *context) update_firmware_info(rtwdev, fw); complete_all(&fw->completion); - rtw_info(rtwdev, "Firmware version %u.%u.%u, H2C version %u\n", + rtw_info(rtwdev, "%sFirmware version %u.%u.%u, H2C version %u\n", + fw->type == RTW_WOWLAN_FW ? "WOW " : "", fw->version, fw->sub_version, fw->sub_index, fw->h2c_version); } @@ -1333,6 +1911,7 @@ static int rtw_load_firmware(struct rtw_dev *rtwdev, enum rtw_fw_type type) return -ENOENT; } + fw->type = type; fw->rtwdev = rtwdev; init_completion(&fw->completion); @@ -1348,16 +1927,23 @@ static int rtw_load_firmware(struct rtw_dev *rtwdev, enum rtw_fw_type type) static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_hal *hal = &rtwdev->hal; struct rtw_efuse *efuse = &rtwdev->efuse; - int ret = 0; switch (rtw_hci_type(rtwdev)) { case RTW_HCI_TYPE_PCIE: rtwdev->hci.rpwm_addr = 0x03d9; rtwdev->hci.cpwm_addr = 0x03da; break; + case RTW_HCI_TYPE_SDIO: + rtwdev->hci.rpwm_addr = REG_SDIO_HRPWM1; + rtwdev->hci.cpwm_addr = REG_SDIO_HCPWM1_V2; + break; + case RTW_HCI_TYPE_USB: + rtwdev->hci.rpwm_addr = 0xfe58; + rtwdev->hci.cpwm_addr = 0xfe57; + break; default: rtw_err(rtwdev, "unsupported hci type\n"); return -EINVAL; @@ -1389,7 +1975,7 @@ static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev) hal->bfee_sts_cap = 3; - return ret; + return 0; } static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev) @@ -1548,9 +2134,11 @@ static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev) if (!rfe_def) return -ENODEV; - rtw_phy_setup_phy_cond(rtwdev, 0); + rtw_phy_setup_phy_cond(rtwdev, hal->pkg_type); rtw_phy_init_tx_power(rtwdev); + if (rfe_def->agc_btg_tbl) + rtw_load_table(rtwdev, rfe_def->agc_btg_tbl); rtw_load_table(rtwdev, rfe_def->phy_pg_tbl); rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl); rtw_phy_tx_power_by_rate_config(hal); @@ -1605,16 +2193,26 @@ static void rtw_stats_init(struct rtw_dev *rtwdev) int rtw_core_init(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex *coex = &rtwdev->coex; int ret; INIT_LIST_HEAD(&rtwdev->rsvd_page_list); INIT_LIST_HEAD(&rtwdev->txqs); +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 0) + setup_timer(&rtwdev->tx_report.purge_timer, + (void *)(long unsigned int)rtw_tx_report_purge_timer, + (long unsigned int)rtwdev); +#else timer_setup(&rtwdev->tx_report.purge_timer, rtw_tx_report_purge_timer, 0); - tasklet_setup(&rtwdev->tx_tasklet, rtw_tx_tasklet); +#endif + rtwdev->tx_wq = alloc_workqueue("rtw_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0); + if (!rtwdev->tx_wq) { + rtw_warn(rtwdev, "alloc_workqueue rtw_tx_wq failed\n"); + return -ENOMEM; + } INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work); INIT_DELAYED_WORK(&coex->bt_relink_work, rtw_coex_bt_relink_work); @@ -1622,31 +2220,34 @@ int rtw_core_init(struct rtw_dev *rtwdev) INIT_DELAYED_WORK(&coex->defreeze_work, rtw_coex_defreeze_work); INIT_DELAYED_WORK(&coex->wl_remain_work, rtw_coex_wl_remain_work); INIT_DELAYED_WORK(&coex->bt_remain_work, rtw_coex_bt_remain_work); + INIT_DELAYED_WORK(&coex->wl_connecting_work, rtw_coex_wl_connecting_work); + INIT_DELAYED_WORK(&coex->bt_multi_link_remain_work, + rtw_coex_bt_multi_link_remain_work); + INIT_DELAYED_WORK(&coex->wl_ccklock_work, rtw_coex_wl_ccklock_work); + INIT_WORK(&rtwdev->tx_work, rtw_tx_work); INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work); + INIT_WORK(&rtwdev->ips_work, rtw_ips_work); INIT_WORK(&rtwdev->fw_recovery_work, rtw_fw_recovery_work); + INIT_WORK(&rtwdev->update_beacon_work, rtw_fw_update_beacon_work); INIT_WORK(&rtwdev->ba_work, rtw_txq_ba_work); skb_queue_head_init(&rtwdev->c2h_queue); skb_queue_head_init(&rtwdev->coex.queue); skb_queue_head_init(&rtwdev->tx_report.queue); - spin_lock_init(&rtwdev->rf_lock); - spin_lock_init(&rtwdev->h2c.lock); spin_lock_init(&rtwdev->txq_lock); spin_lock_init(&rtwdev->tx_report.q_lock); mutex_init(&rtwdev->mutex); - mutex_init(&rtwdev->coex.mutex); mutex_init(&rtwdev->hal.tx_power_mutex); init_waitqueue_head(&rtwdev->coex.wait); + init_completion(&rtwdev->lps_leave_check); + init_completion(&rtwdev->fw_scan_density); rtwdev->sec.total_cam_num = 32; rtwdev->hal.current_channel = 1; + rtwdev->dm_info.fix_rate = U8_MAX; set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map); - if (!(BIT(rtw_fw_lps_deep_mode) & chip->lps_deep_mode_supported)) - rtwdev->lps_conf.deep_mode = LPS_DEEP_MODE_NONE; - else - rtwdev->lps_conf.deep_mode = rtw_fw_lps_deep_mode; rtw_stats_init(rtwdev); @@ -1658,7 +2259,7 @@ int rtw_core_init(struct rtw_dev *rtwdev) ret = rtw_load_firmware(rtwdev, RTW_NORMAL_FW); if (ret) { rtw_warn(rtwdev, "no firmware loaded\n"); - return ret; + goto out; } if (chip->wow_fw_name) { @@ -1668,10 +2269,15 @@ int rtw_core_init(struct rtw_dev *rtwdev) wait_for_completion(&rtwdev->fw.completion); if (rtwdev->fw.firmware) release_firmware(rtwdev->fw.firmware); - return ret; + goto out; } } + return 0; + +out: + destroy_workqueue(rtwdev->tx_wq); + return ret; } EXPORT_SYMBOL(rtw_core_init); @@ -1690,9 +2296,16 @@ void rtw_core_deinit(struct rtw_dev *rtwdev) if (wow_fw->firmware) release_firmware(wow_fw->firmware); - tasklet_kill(&rtwdev->tx_tasklet); + destroy_workqueue(rtwdev->tx_wq); +# if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 2, 0) + timer_delete_sync(&rtwdev->tx_report.purge_timer); +# else + del_timer_sync(&rtwdev->tx_report.purge_timer); +# endif spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags); skb_queue_purge(&rtwdev->tx_report.queue); + skb_queue_purge(&rtwdev->coex.queue); + skb_queue_purge(&rtwdev->c2h_queue); spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags); list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, @@ -1702,7 +2315,6 @@ void rtw_core_deinit(struct rtw_dev *rtwdev) } mutex_destroy(&rtwdev->mutex); - mutex_destroy(&rtwdev->coex.mutex); mutex_destroy(&rtwdev->hal.tx_power_mutex); } EXPORT_SYMBOL(rtw_core_deinit); @@ -1713,9 +2325,11 @@ int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) int max_tx_headroom = 0; int ret; - /* TODO: USB & SDIO may need extra room? */ max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz; + if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO) + max_tx_headroom += RTW_SDIO_DATA_PTR_ALIGN; + hw->extra_tx_headroom = max_tx_headroom; hw->queues = IEEE80211_NUM_ACS; hw->txq_data_size = sizeof(struct rtw_txq); @@ -1733,6 +2347,7 @@ int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU); ieee80211_hw_set(hw, HAS_RATE_CONTROL); ieee80211_hw_set(hw, TX_AMSDU); + ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS); hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP) | @@ -1745,8 +2360,17 @@ int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) WIPHY_FLAG_TDLS_EXTERNAL_SETUP; hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR; + hw->wiphy->max_scan_ssids = RTW_SCAN_MAX_SSIDS; + hw->wiphy->max_scan_ie_len = rtw_get_max_scan_ie_len(rtwdev); + + if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C) { + hw->wiphy->iface_combinations = rtw_iface_combs; + hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtw_iface_combs); + } wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0); + wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SCAN_RANDOM_SN); + wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL); #ifdef CONFIG_PM hw->wiphy->wowlan = rtwdev->chip->wowlan_stub; @@ -1755,7 +2379,15 @@ int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) rtw_set_supported_band(hw, rtwdev->chip); SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr); - rtw_regd_init(rtwdev, rtw_regd_notifier); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 11, 0) + hw->wiphy->sar_capa = &rtw_sar_capa; +#endif + + ret = rtw_regd_init(rtwdev); + if (ret) { + rtw_err(rtwdev, "failed to init regd\n"); + return ret; + } ret = ieee80211_register_hw(hw); if (ret) { @@ -1763,8 +2395,11 @@ int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) return ret; } - if (regulatory_hint(hw->wiphy, rtwdev->regd.alpha2)) - rtw_err(rtwdev, "regulatory_hint fail\n"); + ret = rtw_regd_hint(rtwdev); + if (ret) { + rtw_err(rtwdev, "failed to hint regd\n"); + return ret; + } rtw_debugfs_init(rtwdev); @@ -1777,13 +2412,139 @@ EXPORT_SYMBOL(rtw_register_hw); void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; ieee80211_unregister_hw(hw); rtw_unset_supported_band(hw, chip); } EXPORT_SYMBOL(rtw_unregister_hw); +static +void rtw_swap_reg_nbytes(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1, + const struct rtw_hw_reg *reg2, u8 nbytes) +{ + u8 i; + + for (i = 0; i < nbytes; i++) { + u8 v1 = rtw_read8(rtwdev, reg1->addr + i); + u8 v2 = rtw_read8(rtwdev, reg2->addr + i); + + rtw_write8(rtwdev, reg1->addr + i, v2); + rtw_write8(rtwdev, reg2->addr + i, v1); + } +} + +static +void rtw_swap_reg_mask(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1, + const struct rtw_hw_reg *reg2) +{ + u32 v1, v2; + + v1 = rtw_read32_mask(rtwdev, reg1->addr, reg1->mask); + v2 = rtw_read32_mask(rtwdev, reg2->addr, reg2->mask); + rtw_write32_mask(rtwdev, reg2->addr, reg2->mask, v1); + rtw_write32_mask(rtwdev, reg1->addr, reg1->mask, v2); +} + +struct rtw_iter_port_switch_data { + struct rtw_dev *rtwdev; + struct rtw_vif *rtwvif_ap; +}; + +static void rtw_port_switch_iter(void *data, struct ieee80211_vif *vif) +{ + struct rtw_iter_port_switch_data *iter_data = data; + struct rtw_dev *rtwdev = iter_data->rtwdev; + struct rtw_vif *rtwvif_target = (struct rtw_vif *)vif->drv_priv; + struct rtw_vif *rtwvif_ap = iter_data->rtwvif_ap; + const struct rtw_hw_reg *reg1, *reg2; + + if (rtwvif_target->port != RTW_PORT_0) + return; + + rtw_dbg(rtwdev, RTW_DBG_STATE, "AP port switch from %d -> %d\n", + rtwvif_ap->port, rtwvif_target->port); + + /* Leave LPS so the value swapped are not in PS mode */ + rtw_leave_lps(rtwdev); + + reg1 = &rtwvif_ap->conf->net_type; + reg2 = &rtwvif_target->conf->net_type; + rtw_swap_reg_mask(rtwdev, reg1, reg2); + + reg1 = &rtwvif_ap->conf->mac_addr; + reg2 = &rtwvif_target->conf->mac_addr; + rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN); + + reg1 = &rtwvif_ap->conf->bssid; + reg2 = &rtwvif_target->conf->bssid; + rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN); + + reg1 = &rtwvif_ap->conf->bcn_ctrl; + reg2 = &rtwvif_target->conf->bcn_ctrl; + rtw_swap_reg_nbytes(rtwdev, reg1, reg2, 1); + + swap(rtwvif_target->port, rtwvif_ap->port); + swap(rtwvif_target->conf, rtwvif_ap->conf); + + rtw_fw_default_port(rtwdev, rtwvif_target); +} + +void rtw_core_port_switch(struct rtw_dev *rtwdev, struct ieee80211_vif *vif) +{ + struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; + struct rtw_iter_port_switch_data iter_data; + + if (vif->type != NL80211_IFTYPE_AP || rtwvif->port == RTW_PORT_0) + return; + + iter_data.rtwdev = rtwdev; + iter_data.rtwvif_ap = rtwvif; + rtw_iterate_vifs(rtwdev, rtw_port_switch_iter, &iter_data); +} + +static void rtw_check_sta_active_iter(void *data, struct ieee80211_vif *vif) +{ + struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; + bool *active = data; + + if (*active) + return; + + if (vif->type != NL80211_IFTYPE_STATION) + return; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) + if (vif->cfg.assoc || !is_zero_ether_addr(rtwvif->bssid)) +#else + if (vif->bss_conf.assoc || !is_zero_ether_addr(rtwvif->bssid)) +#endif + *active = true; +} + +bool rtw_core_check_sta_active(struct rtw_dev *rtwdev) +{ + bool sta_active = false; + + rtw_iterate_vifs(rtwdev, rtw_check_sta_active_iter, &sta_active); + + return rtwdev->ap_active || sta_active; +} + +void rtw_core_enable_beacon(struct rtw_dev *rtwdev, bool enable) +{ + if (!rtwdev->ap_active) + return; + + if (enable) { + rtw_write32_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); + rtw_write32_clr(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE); + } else { + rtw_write32_clr(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); + rtw_write32_set(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE); + } +} + MODULE_AUTHOR("Realtek Corporation"); MODULE_DESCRIPTION("Realtek 802.11ac wireless core module"); MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/net/wireless/realtek/rtw88/main.h b/drivers/net/wireless/realtek/rtw88/main.h index 8ba0b0824a..d4714c5a5a 100644 --- a/drivers/net/wireless/realtek/rtw88/main.h +++ b/drivers/net/wireless/realtek/rtw88/main.h @@ -5,21 +5,57 @@ #ifndef __RTK_MAIN_H_ #define __RTK_MAIN_H_ +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0) +#include "compiler.h" +#endif #include #include #include #include #include +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 19, 0) #include +#else +#include "bitfield.h" +#endif #include #include +#include #include "util.h" +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 8, 0) +#include +#endif + +#if !defined(RHEL_RELEASE_CODE) +#define RHEL_RELEASE_CODE 0 +#define RHEL_RELEASE_VERSION(a, b) a<<8 & b +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 8, 0)) || defined(RHEL_RELEASE) && (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,0)) +/* see Documentation/timers/timers-howto.rst for the thresholds */ +static inline void fsleep(unsigned long usecs) +{ + if (usecs <= 10) + udelay(usecs); + else if (usecs <= 20000) + usleep_range(usecs, 2 * usecs); + else + msleep(DIV_ROUND_UP(usecs, 1000)); +} +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 7, 0) +#define NUM_NL80211_BANDS IEEE80211_NUM_BANDS +#endif #define RTW_MAX_MAC_ID_NUM 32 #define RTW_MAX_SEC_CAM_NUM 32 #define MAX_PG_CAM_BACKUP_NUM 8 +#define RTW_SCAN_MAX_SSIDS 4 + #define RTW_MAX_PATTERN_NUM 12 #define RTW_MAX_PATTERN_MASK_SIZE 16 #define RTW_MAX_PATTERN_SIZE 128 @@ -29,6 +65,7 @@ #define RFREG_MASK 0xfffff #define INV_RF_DATA 0xffffffff #define TX_PAGE_SIZE_SHIFT 7 +#define TX_PAGE_SIZE (1 << TX_PAGE_SIZE_SHIFT) #define RTW_CHANNEL_WIDTH_MAX 3 #define RTW_RF_PATH_MAX 4 @@ -36,9 +73,69 @@ #define RTW_TP_SHIFT 18 /* bytes/2s --> Mbps */ +#ifndef read_poll_timeout +#define read_poll_timeout(op, val, cond, sleep_us, timeout_us, \ + sleep_before_read, args...) \ +({ \ + u64 __timeout_us = (timeout_us); \ + unsigned long __sleep_us = (sleep_us); \ + ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \ + might_sleep_if((__sleep_us) != 0); \ + if (sleep_before_read && __sleep_us) \ + usleep_range((__sleep_us >> 2) + 1, __sleep_us); \ + for (;;) { \ + (val) = op(args); \ + if (cond) \ + break; \ + if (__timeout_us && \ + ktime_compare(ktime_get(), __timeout) > 0) { \ + (val) = op(args); \ + break; \ + } \ + if (__sleep_us) \ + usleep_range((__sleep_us >> 2) + 1, __sleep_us); \ + } \ + (cond) ? 0 : -ETIMEDOUT; \ +}) +#endif + +#if !defined(IEEE80211_AMPDU_TX_START_IMMEDIATE) +#define IEEE80211_AMPDU_TX_START_IMMEDIATE 1 +#endif + +#if !defined(fallthrough) +#define fallthrough do {} while (0) +#endif + +#ifndef read_poll_timeout_atomic +#define read_poll_timeout_atomic(op, val, cond, delay_us, timeout_us, \ + delay_before_read, args...) \ +({ \ + u64 __timeout_us = (timeout_us); \ + unsigned long __delay_us = (delay_us); \ + ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \ + if (delay_before_read && __delay_us) \ + udelay(__delay_us); \ + for (;;) { \ + (val) = op(args); \ + if (cond) \ + break; \ + if (__timeout_us && \ + ktime_compare(ktime_get(), __timeout) > 0) { \ + (val) = op(args); \ + break; \ + } \ + if (__delay_us) \ + udelay(__delay_us); \ + } \ + (cond) ? 0 : -ETIMEDOUT; \ +}) +#endif + extern bool rtw_bf_support; -extern unsigned int rtw_fw_lps_deep_mode; +extern bool rtw_disable_lps_deep_mode; extern unsigned int rtw_debug_mask; +extern bool rtw_edcca_enabled; extern const struct ieee80211_ops rtw_ops; #define RTW_MAX_CHANNEL_NUM_2G 14 @@ -78,14 +175,12 @@ struct rtw_hci { IS_CH_5G_BAND_3(channel) || IS_CH_5G_BAND_4(channel)) enum rtw_supported_band { - RTW_BAND_2G = 1 << 0, - RTW_BAND_5G = 1 << 1, - RTW_BAND_60G = 1 << 2, - - RTW_BAND_MAX, + RTW_BAND_2G = BIT(NL80211_BAND_2GHZ), + RTW_BAND_5G = BIT(NL80211_BAND_5GHZ), + RTW_BAND_60G = BIT(NL80211_BAND_60GHZ), }; -/* now, support upto 80M bw */ +/* now, support up to 80M bw */ #define RTW_MAX_CHANNEL_WIDTH RTW_CHANNEL_WIDTH_80 enum rtw_bandwidth { @@ -353,13 +448,15 @@ enum rtw_flags { RTW_FLAG_RUNNING, RTW_FLAG_FW_RUNNING, RTW_FLAG_SCANNING, - RTW_FLAG_INACTIVE_PS, + RTW_FLAG_POWERON, RTW_FLAG_LEISURE_PS, RTW_FLAG_LEISURE_PS_DEEP, RTW_FLAG_DIG_DISABLE, RTW_FLAG_BUSY_TRAFFIC, RTW_FLAG_WOWLAN, RTW_FLAG_RESTARTING, + RTW_FLAG_RESTART_TRIGGERING, + RTW_FLAG_FORCE_LOWEST_RATE, NUM_OF_RTW_FLAGS, }; @@ -390,6 +487,15 @@ enum rtw_snr { RTW_SNR_NUM }; +enum rtw_port { + RTW_PORT_0 = 0, + RTW_PORT_1 = 1, + RTW_PORT_2 = 2, + RTW_PORT_3 = 3, + RTW_PORT_4 = 4, + RTW_PORT_NUM +}; + enum rtw_wow_flags { RTW_WOW_FLAG_EN_MAGIC_PKT, RTW_WOW_FLAG_EN_REKEY_PKT, @@ -497,20 +603,10 @@ struct rtw_txpwr_idx { struct rtw_5g_txpwr_idx pwr_idx_5g; }; -struct rtw_timer_list { - struct timer_list timer; - void (*function)(void *data); - void *args; -}; - struct rtw_channel_params { u8 center_chan; + u8 primary_chan; u8 bandwidth; - u8 primary_chan_idx; - /* center channel by different available bandwidth, - * val of (bw > current bandwidth) is invalid - */ - u8 cch_by_bw[RTW_MAX_CHANNEL_WIDTH + 1]; }; struct rtw_hw_reg { @@ -543,6 +639,11 @@ struct rtw_rf_sipi_addr { u32 lssi_read_pi; }; +struct rtw_hw_reg_offset { + struct rtw_hw_reg hw_reg; + u8 offset; +}; + struct rtw_backup_info { u8 len; u32 reg; @@ -569,6 +670,7 @@ struct rtw_tx_pkt_info { u32 tx_pkt_size; u8 offset; u8 pkt_offset; + u8 tim_offset; u8 mac_id; u8 rate_id; u8 rate; @@ -620,9 +722,12 @@ struct rtw_rx_pkt_stat { s8 rx_snr[RTW_RF_PATH_MAX]; u8 rx_evm[RTW_RF_PATH_MAX]; s8 cfo_tail[RTW_RF_PATH_MAX]; + u16 freq; + u8 band; struct rtw_sta_info *si; struct ieee80211_vif *vif; + struct ieee80211_hdr *hdr; }; DECLARE_EWMA(tp, 10, 2); @@ -664,6 +769,7 @@ enum rtw_pwr_state { struct rtw_lps_conf { enum rtw_lps_mode mode; enum rtw_lps_deep_mode deep_mode; + enum rtw_lps_deep_mode wow_deep_mode; enum rtw_pwr_state state; u8 awake_interval; u8 rlbm; @@ -714,15 +820,14 @@ struct rtw_ra_report { struct rtw_txq { struct list_head list; - unsigned long flags; - unsigned long last_push; }; #define RTW_BC_MC_MACID 1 DECLARE_EWMA(rssi, 10, 16); struct rtw_sta_info { + struct rtw_dev *rtwdev; struct ieee80211_sta *sta; struct ieee80211_vif *vif; @@ -733,12 +838,10 @@ struct rtw_sta_info { u8 rate_id; enum rtw_bandwidth bw_mode; enum rtw_rf_type rf_type; - enum rtw_wireless_set wireless_set; u8 stbc_en:2; u8 ldpc_en:2; bool sgi_enable; bool vht_enable; - bool updated; u8 init_ra_lv; u64 ra_mask; @@ -748,6 +851,8 @@ struct rtw_sta_info { bool use_cfg_mask; struct cfg80211_bitrate_mask *mask; + + struct work_struct rc_work; }; enum rtw_bfee_role { @@ -781,6 +886,7 @@ struct rtw_bf_info { struct rtw_vif { enum rtw_net_type net_type; u16 aid; + u8 mac_id; /* for STA mode only */ u8 mac_addr[ETH_ALEN]; u8 bssid[ETH_ALEN]; u8 port; @@ -788,6 +894,8 @@ struct rtw_vif { struct list_head rsvd_page_list; struct ieee80211_tx_queue_params tx_params[IEEE80211_NUM_ACS]; const struct rtw_vif_port *conf; + struct cfg80211_scan_request *scan_req; + struct ieee80211_scan_ies *scan_ies; struct rtw_traffic_stats stats; @@ -796,12 +904,27 @@ struct rtw_vif { struct rtw_regulatory { char alpha2[2]; - u8 chplan; - u8 txpwr_regd; + u8 txpwr_regd_2g; + u8 txpwr_regd_5g; +}; + +enum rtw_regd_state { + RTW_REGD_STATE_WORLDWIDE, + RTW_REGD_STATE_PROGRAMMED, + RTW_REGD_STATE_SETTING, + + RTW_REGD_STATE_NR, +}; + +struct rtw_regd { + enum rtw_regd_state state; + const struct rtw_regulatory *regulatory; + enum nl80211_dfs_regions dfs_region; }; struct rtw_chip_ops { int (*mac_init)(struct rtw_dev *rtwdev); + int (*dump_fw_crash)(struct rtw_dev *rtwdev); void (*shutdown)(struct rtw_dev *rtwdev); int (*read_efuse)(struct rtw_dev *rtwdev, u8 *map); void (*phy_set_param)(struct rtw_dev *rtwdev); @@ -834,6 +957,20 @@ struct rtw_chip_ops { struct ieee80211_bss_conf *conf); void (*cfg_csi_rate)(struct rtw_dev *rtwdev, u8 rssi, u8 cur_rate, u8 fixrate_en, u8 *new_rate); + void (*adaptivity_init)(struct rtw_dev *rtwdev); + void (*adaptivity)(struct rtw_dev *rtwdev); + void (*cfo_init)(struct rtw_dev *rtwdev); + void (*cfo_track)(struct rtw_dev *rtwdev); + void (*config_tx_path)(struct rtw_dev *rtwdev, u8 tx_path, + enum rtw_bb_path tx_path_1ss, + enum rtw_bb_path tx_path_cck, + bool is_tx2_path); + void (*config_txrx_mode)(struct rtw_dev *rtwdev, u8 tx_path, + u8 rx_path, bool is_tx2_path); + /* for USB/SDIO only */ + void (*fill_txdesc_checksum)(struct rtw_dev *rtwdev, + struct rtw_tx_pkt_info *pkt_info, + u8 *txdesc); /* for coex */ void (*coex_set_init)(struct rtw_dev *rtwdev); @@ -1041,6 +1178,7 @@ enum rtw_rfe_fem { struct rtw_rfe_def { const struct rtw_table *phy_pg_tbl; const struct rtw_table *txpwr_lmt_tbl; + const struct rtw_table *agc_btg_tbl; }; #define RTW_DEF_RFE(chip, bb_pg, pwrlmt) { \ @@ -1048,6 +1186,12 @@ struct rtw_rfe_def { .txpwr_lmt_tbl = &rtw ## chip ## _txpwr_lmt_type ## pwrlmt ## _tbl, \ } +#define RTW_DEF_RFE_EXT(chip, bb_pg, pwrlmt, btg) { \ + .phy_pg_tbl = &rtw ## chip ## _bb_pg_type ## bb_pg ## _tbl, \ + .txpwr_lmt_tbl = &rtw ## chip ## _txpwr_lmt_type ## pwrlmt ## _tbl, \ + .agc_btg_tbl = &rtw ## chip ## _agc_btg_type ## btg ## _tbl, \ + } + #define RTW_PWR_TRK_5G_1 0 #define RTW_PWR_TRK_5G_2 1 #define RTW_PWR_TRK_5G_3 2 @@ -1094,6 +1238,15 @@ enum rtw_fw_fifo_sel { RTW_FW_FIFO_MAX, }; +enum rtw_fwcd_item { + RTW_FWCD_TLV, + RTW_FWCD_REG, + RTW_FWCD_ROM, + RTW_FWCD_IMEM, + RTW_FWCD_DMEM, + RTW_FWCD_EMEM, +}; + /* hardware configuration for each IC */ struct rtw_chip_info { struct rtw_chip_ops *ops; @@ -1111,6 +1264,7 @@ struct rtw_chip_info { u32 txff_size; u32 rxff_size; u32 fw_rxff_size; + u16 rsvd_drv_pg_num; u8 band; u8 page_size; u8 csi_buf_pg_num; @@ -1119,10 +1273,16 @@ struct rtw_chip_info { u8 txgi_factor; bool is_pwr_by_rate_dec; bool rx_ldpc; + bool tx_stbc; u8 max_power_index; + u8 ampdu_density; u16 fw_fifo_addr[RTW_FW_FIFO_MAX]; + const struct rtw_fwcd_segs *fwcd_segs; + u8 default_1ss_tx_path; + + bool path_div_supported; bool ht_supported; bool vht_supported; u8 lps_deep_mode_supported; @@ -1162,18 +1322,22 @@ struct rtw_chip_info { u8 bfer_su_max_num; u8 bfer_mu_max_num; + struct rtw_hw_reg_offset *edcca_th; + s8 l2h_th_ini_cs; + s8 l2h_th_ini_ad; + const char *wow_fw_name; const struct wiphy_wowlan_support *wowlan_stub; const u8 max_sched_scan_ssids; - - /* for 8821c set channel */ - u32 ch_param[3]; + const u16 max_scan_ie_len; /* coex paras */ u32 coex_para_ver; u8 bt_desired_ver; bool scbd_support; bool new_scbd10_def; /* true: fix 2M(8822c) */ + bool ble_hid_profile_support; + bool wl_mimo_ps_support; u8 pstdma_type; /* 0: LPSoff, 1:LPSon */ u8 bt_rssi_type; u8 ant_isolation; @@ -1198,6 +1362,7 @@ struct rtw_chip_info { const struct coex_5g_afh_map *afh_5g; const struct rtw_hw_reg *btg_reg; const struct rtw_reg_domain *coex_info_hw_regs; + u32 wl_fw_desired_ver; }; enum rtw_coex_bt_state_cnt { @@ -1219,6 +1384,7 @@ enum rtw_coex_bt_state_cnt { }; enum rtw_coex_wl_state_cnt { + COEX_CNT_WL_SCANAP, COEX_CNT_WL_CONNPKT, COEX_CNT_WL_COEXRUN, COEX_CNT_WL_NOISY0, @@ -1241,6 +1407,8 @@ struct rtw_coex_rfe { bool wlg_at_btg; }; +#define COEX_WL_TDMA_PARA_LENGTH 5 + struct rtw_coex_dm { bool cur_ps_tdma_on; bool cur_wl_rx_low_gain_en; @@ -1260,6 +1428,7 @@ struct rtw_coex_dm { u32 cur_ant_pos_type; u32 cur_switch_status; u32 setting_tdma; + u8 fw_tdma_para[COEX_WL_TDMA_PARA_LENGTH]; }; #define COEX_BTINFO_SRC_WL_FW 0x0 @@ -1267,7 +1436,8 @@ struct rtw_coex_dm { #define COEX_BTINFO_SRC_BT_ACT 0x2 #define COEX_BTINFO_SRC_BT_IQK 0x3 #define COEX_BTINFO_SRC_BT_SCBD 0x4 -#define COEX_BTINFO_SRC_MAX 0x5 +#define COEX_BTINFO_SRC_H2C60 0x5 +#define COEX_BTINFO_SRC_MAX 0x6 #define COEX_INFO_FTP BIT(7) #define COEX_INFO_A2DP BIT(6) @@ -1278,6 +1448,43 @@ struct rtw_coex_dm { #define COEX_INFO_SCO_ESCO BIT(1) #define COEX_INFO_CONNECTION BIT(0) #define COEX_BTINFO_LENGTH_MAX 10 +#define COEX_BTINFO_LENGTH 7 + +#define COEX_BT_HIDINFO_LIST 0x0 +#define COEX_BT_HIDINFO_A 0x1 +#define COEX_BT_HIDINFO_NAME 3 + +#define COEX_BT_HIDINFO_LENGTH 6 +#define COEX_BT_HIDINFO_HANDLE_NUM 4 +#define COEX_BT_HIDINFO_C2H_HANDLE 0 +#define COEX_BT_HIDINFO_C2H_VENDOR 1 +#define COEX_BT_BLE_HANDLE_THRS 0x10 +#define COEX_BT_HIDINFO_NOTCON 0xff + +struct rtw_coex_hid { + u8 hid_handle; + u8 hid_vendor; + u8 hid_name[COEX_BT_HIDINFO_NAME]; + bool hid_info_completed; + bool is_game_hid; +}; + +struct rtw_coex_hid_handle_list { + u8 cmd_id; + u8 len; + u8 subid; + u8 handle_cnt; + u8 handle[COEX_BT_HIDINFO_HANDLE_NUM]; +} __packed; + +struct rtw_coex_hid_info_a { + u8 cmd_id; + u8 len; + u8 subid; + u8 handle; + u8 vendor; + u8 name[COEX_BT_HIDINFO_NAME]; +} __packed; struct rtw_coex_stat { bool bt_disabled; @@ -1299,6 +1506,8 @@ struct rtw_coex_stat { bool bt_fix_2M; bool bt_setup_link; bool bt_multi_link; + bool bt_multi_link_pre; + bool bt_multi_link_remain; bool bt_a2dp_sink; bool bt_a2dp_active; bool bt_reenable; @@ -1306,6 +1515,9 @@ struct rtw_coex_stat { bool bt_init_scan; bool bt_slave; bool bt_418_hid_exist; + bool bt_ble_hid_exist; + bool bt_game_hid_exist; + bool bt_hid_handle_cnt; bool bt_mailbox_reply; bool wl_under_lps; @@ -1323,9 +1535,17 @@ struct rtw_coex_stat { bool wl_cck_lock; bool wl_cck_lock_pre; bool wl_cck_lock_ever; + bool wl_connecting; + bool wl_slot_toggle; + bool wl_slot_toggle_change; /* if toggle to no-toggle */ + bool wl_mimo_ps; u32 bt_supported_version; u32 bt_supported_feature; + u32 hi_pri_tx; + u32 hi_pri_rx; + u32 lo_pri_tx; + u32 lo_pri_rx; u32 patch_ver; u16 bt_reg_vendor_ae; u16 bt_reg_vendor_ac; @@ -1347,13 +1567,21 @@ struct rtw_coex_stat { u8 bt_a2dp_bitpool; u8 bt_iqk_state; + u16 wl_beacon_interval; u8 wl_noisy_level; u8 wl_fw_dbg_info[10]; u8 wl_fw_dbg_info_pre[10]; + u8 wl_rx_rate; + u8 wl_tx_rate; + u8 wl_rts_rx_rate; u8 wl_coex_mode; + u8 wl_iot_peer; u8 ampdu_max_time; u8 wl_tput_dir; + u8 wl_toggle_para[6]; + u8 wl_toggle_interval; + u16 score_board; u16 retry_limit; @@ -1363,13 +1591,17 @@ struct rtw_coex_stat { /* counters to record wifi states */ u32 cnt_wl[COEX_CNT_WL_MAX]; + /* counters to record bt c2h data */ + u32 cnt_bt_info_c2h[COEX_BTINFO_SRC_MAX]; + u32 darfrc; u32 darfrch; + + struct rtw_coex_hid hid_info[COEX_BT_HIDINFO_HANDLE_NUM]; + struct rtw_coex_hid_handle_list hid_handle_list; }; struct rtw_coex { - /* protects coex info request section */ - struct mutex mutex; struct sk_buff_head queue; wait_queue_head_t wait; @@ -1378,6 +1610,7 @@ struct rtw_coex { bool freeze; bool freerun; bool wl_rf_off; + bool manual_control; struct rtw_coex_stat stat; struct rtw_coex_dm dm; @@ -1388,6 +1621,10 @@ struct rtw_coex { struct delayed_work defreeze_work; struct delayed_work wl_remain_work; struct delayed_work bt_remain_work; + struct delayed_work wl_connecting_work; + struct delayed_work bt_multi_link_remain_work; + struct delayed_work wl_ccklock_work; + }; #define DPK_RF_REG_NUM 7 @@ -1454,6 +1691,60 @@ struct rtw_iqk_info { } result; }; +enum rtw_rf_band { + RF_BAND_2G_CCK, + RF_BAND_2G_OFDM, + RF_BAND_5G_L, + RF_BAND_5G_M, + RF_BAND_5G_H, + RF_BAND_MAX +}; + +#define RF_GAIN_NUM 11 +#define RF_HW_OFFSET_NUM 10 + +struct rtw_gapk_info { + u32 rf3f_bp[RF_BAND_MAX][RF_GAIN_NUM][RTW_RF_PATH_MAX]; + u32 rf3f_fs[RTW_RF_PATH_MAX][RF_GAIN_NUM]; + bool txgapk_bp_done; + s8 offset[RF_GAIN_NUM][RTW_RF_PATH_MAX]; + s8 fianl_offset[RF_GAIN_NUM][RTW_RF_PATH_MAX]; + u8 read_txgain; + u8 channel; +}; + +#define EDCCA_TH_L2H_IDX 0 +#define EDCCA_TH_H2L_IDX 1 +#define EDCCA_TH_L2H_LB 48 +#define EDCCA_ADC_BACKOFF 12 +#define EDCCA_IGI_BASE 50 +#define EDCCA_IGI_L2H_DIFF 8 +#define EDCCA_L2H_H2L_DIFF 7 +#define EDCCA_L2H_H2L_DIFF_NORMAL 8 + +enum rtw_edcca_mode { + RTW_EDCCA_NORMAL = 0, + RTW_EDCCA_ADAPTIVITY = 1, +}; + +struct rtw_cfo_track { + bool is_adjust; + u8 crystal_cap; + s32 cfo_tail[RTW_RF_PATH_MAX]; + s32 cfo_cnt[RTW_RF_PATH_MAX]; + u32 packet_count; + u32 packet_count_pre; +}; + +#define RRSR_INIT_2G 0x15f +#define RRSR_INIT_5G 0x150 + +enum rtw_dm_cap { + RTW_DM_CAP_NA, + RTW_DM_CAP_TXGAPK, + RTW_DM_CAP_NUM +}; + struct rtw_dm_info { u32 cck_fa_cnt; u32 ofdm_fa_cnt; @@ -1483,7 +1774,10 @@ struct rtw_dm_info { u8 cck_gi_u_bnd; u8 cck_gi_l_bnd; + u8 fix_rate; u8 tx_rate; + u32 rrsr_val_init; + u32 rrsr_mask_min; u8 thermal_avg[RTW_RF_PATH_MAX]; u8 thermal_meter_k; u8 thermal_meter_lck; @@ -1502,6 +1796,7 @@ struct rtw_dm_info { u8 dack_dck[RTW_RF_PATH_MAX][2][DACK_DCK_BACKUP_NUM]; struct rtw_dpk_info dpk_info; + struct rtw_cfo_track cfo_track; /* [bandwidth 0:20M/1:40M][number of path] */ u8 cck_pd_lv[2][RTW_RF_PATH_MAX]; @@ -1519,7 +1814,14 @@ struct rtw_dm_info { struct ewma_evm ewma_evm[RTW_EVM_NUM]; struct ewma_snr ewma_snr[RTW_SNR_NUM]; + u32 dm_flags; /* enum rtw_dm_cap */ struct rtw_iqk_info iqk; + struct rtw_gapk_info gapk; + bool is_bt_iqk_timeout; + + s8 l2h_th_ini; + enum rtw_edcca_mode edcca_mode; + u8 scan_density; }; struct rtw_efuse { @@ -1623,6 +1925,17 @@ struct rtw_fifo_conf { const struct rtw_rqpn *rqpn; }; +struct rtw_fwcd_desc { + u32 size; + u8 *next; + u8 *data; +}; + +struct rtw_fwcd_segs { + const u32 *segs; + u8 num; +}; + #define FW_CD_TYPE 0xffff #define FW_CD_LEN 4 #define FW_CD_VAL 0xaabbccdd @@ -1630,11 +1943,41 @@ struct rtw_fw_state { const struct firmware *firmware; struct rtw_dev *rtwdev; struct completion completion; + struct rtw_fwcd_desc fwcd_desc; u16 version; u8 sub_version; u8 sub_index; u16 h2c_version; - u8 prev_dump_seq; + u32 feature; + u32 feature_ext; + enum rtw_fw_type type; +}; + +enum rtw_sar_sources { + RTW_SAR_SOURCE_NONE, + RTW_SAR_SOURCE_COMMON, +}; + +enum rtw_sar_bands { + RTW_SAR_BAND_0, + RTW_SAR_BAND_1, + /* RTW_SAR_BAND_2, not used now */ + RTW_SAR_BAND_3, + RTW_SAR_BAND_4, + + RTW_SAR_BAND_NR, +}; + +/* the union is reserved for other kinds of SAR sources + * which might not re-use same format with array common. + */ +union rtw_sar_cfg { + s8 common[RTW_SAR_BAND_NR]; +}; + +struct rtw_sar { + enum rtw_sar_sources src; + union rtw_sar_cfg cfg[RTW_RF_PATH_MAX][RTW_RATE_SECTION_MAX]; }; struct rtw_hal { @@ -1644,12 +1987,16 @@ struct rtw_hal { u8 cut_version; u8 mp_chip; u8 oem_id; + u8 pkg_type; struct rtw_phy_cond phy_cond; + bool rfe_btg; u8 ps_mode; u8 current_channel; + u8 current_primary_channel_index; u8 current_band_width; u8 current_band_type; + u8 primary_channel; /* center channel for different available bandwidth, * val of (bw > current_band_width) is invalid @@ -1663,6 +2010,7 @@ struct rtw_hal { u32 antenna_tx; u32 antenna_rx; u8 bfee_sts_cap; + bool txrx_1ss; /* protect tx power section */ struct mutex tx_power_mutex; @@ -1684,6 +2032,45 @@ struct rtw_hal { [RTW_MAX_CHANNEL_NUM_5G]; s8 tx_pwr_tbl[RTW_RF_PATH_MAX] [DESC_RATE_MAX]; + + enum rtw_sar_bands sar_band; + struct rtw_sar sar; + + /* for 8821c set channel */ + u32 ch_param[3]; +}; + +struct rtw_path_div { + enum rtw_bb_path current_tx_path; + u32 path_a_sum; + u32 path_b_sum; + u16 path_a_cnt; + u16 path_b_cnt; +}; + +struct rtw_chan_info { + int pri_ch_idx; + int action_id; + int bw; + u8 extra_info; + u8 channel; + u16 timeout; +}; + +struct rtw_chan_list { + u32 buf_size; + u32 ch_num; + u32 size; + u16 addr; +}; + +struct rtw_hw_scan_info { + struct ieee80211_vif *scanning_vif; + u8 probe_pg_size; + u8 op_pri_ch_idx; + u8 op_pri_ch; + u8 op_chan; + u8 op_bw; }; struct rtw_dev { @@ -1692,14 +2079,15 @@ struct rtw_dev { struct rtw_hci hci; - struct rtw_chip_info *chip; + struct rtw_hw_scan_info scan_info; + const struct rtw_chip_info *chip; struct rtw_hal hal; struct rtw_fifo_conf fifo; struct rtw_fw_state fw; struct rtw_efuse efuse; struct rtw_sec_desc sec; struct rtw_traffic_stats stats; - struct rtw_regulatory regd; + struct rtw_regd regd; struct rtw_bf_info bf_info; struct rtw_dm_info dm_info; @@ -1708,9 +2096,6 @@ struct rtw_dev { /* ensures exclusive access from mac80211 callbacks */ struct mutex mutex; - /* read/write rf register */ - spinlock_t rf_lock; - /* watch dog every 2 sec */ struct delayed_work watch_dog_work; u32 watch_dog_cnt; @@ -1720,42 +2105,49 @@ struct rtw_dev { /* c2h cmd queue & handler work */ struct sk_buff_head c2h_queue; struct work_struct c2h_work; + struct work_struct ips_work; struct work_struct fw_recovery_work; + struct work_struct update_beacon_work; /* used to protect txqs list */ spinlock_t txq_lock; struct list_head txqs; - struct tasklet_struct tx_tasklet; + struct workqueue_struct *tx_wq; + struct work_struct tx_work; struct work_struct ba_work; struct rtw_tx_report tx_report; struct { - /* incicate the mail box to use with fw */ + /* indicate the mail box to use with fw */ u8 last_box_num; - /* protect to send h2c to fw */ - spinlock_t lock; u32 seq; } h2c; /* lps power state & handler work */ struct rtw_lps_conf lps_conf; bool ps_enabled; + bool beacon_loss; + struct completion lps_leave_check; struct dentry *debugfs; u8 sta_cnt; u32 rts_threshold; + DECLARE_BITMAP(hw_port, RTW_PORT_NUM); DECLARE_BITMAP(mac_id_map, RTW_MAX_MAC_ID_NUM); DECLARE_BITMAP(flags, NUM_OF_RTW_FLAGS); u8 mp_mode; + struct rtw_path_div dm_path_div; struct rtw_fw_state wow_fw; struct rtw_wow_param wow; bool need_rfk; + struct completion fw_scan_density; + bool ap_active; /* hci related data, must be last */ u8 priv[] __aligned(sizeof(void *)); @@ -1821,11 +2213,40 @@ static inline bool rtw_chip_has_rx_ldpc(struct rtw_dev *rtwdev) return rtwdev->chip->rx_ldpc; } +static inline bool rtw_chip_has_tx_stbc(struct rtw_dev *rtwdev) +{ + return rtwdev->chip->tx_stbc; +} + static inline void rtw_release_macid(struct rtw_dev *rtwdev, u8 mac_id) { clear_bit(mac_id, rtwdev->mac_id_map); } +static inline int rtw_chip_dump_fw_crash(struct rtw_dev *rtwdev) +{ + if (rtwdev->chip->ops->dump_fw_crash) + return rtwdev->chip->ops->dump_fw_crash(rtwdev); + + return 0; +} + +static inline +enum nl80211_band rtw_hw_to_nl80211_band(enum rtw_supported_band hw_band) +{ + switch (hw_band) { + default: + case RTW_BAND_2G: + return NL80211_BAND_2GHZ; + case RTW_BAND_5G: + return NL80211_BAND_5GHZ; + case RTW_BAND_60G: + return NL80211_BAND_60GHZ; + } +} + +void rtw_set_rx_freq_band(struct rtw_rx_pkt_stat *pkt_stat, u8 channel); +void rtw_set_dtim_period(struct rtw_dev *rtwdev, int dtim_period); void rtw_get_channel_params(struct cfg80211_chan_def *chandef, struct rtw_channel_params *ch_param); bool check_hw_ready(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 target); @@ -1838,8 +2259,17 @@ void rtw_set_channel(struct rtw_dev *rtwdev); void rtw_chip_prepare_tx(struct rtw_dev *rtwdev); void rtw_vif_port_config(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif, u32 config); +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 0) +void rtw_tx_report_purge_timer(void *ctx); +#else void rtw_tx_report_purge_timer(struct timer_list *t); -void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si); +#endif +void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, + bool reset_ra_mask); +void rtw_core_scan_start(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif, + const u8 *mac_addr, bool hw_scan); +void rtw_core_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, + bool hw_scan); int rtw_core_start(struct rtw_dev *rtwdev); void rtw_core_stop(struct rtw_dev *rtwdev); int rtw_chip_info_setup(struct rtw_dev *rtwdev); @@ -1855,5 +2285,15 @@ int rtw_sta_add(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, void rtw_sta_remove(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, bool fw_exist); void rtw_fw_recovery(struct rtw_dev *rtwdev); - +void rtw_core_fw_scan_notify(struct rtw_dev *rtwdev, bool start); +int rtw_dump_fw(struct rtw_dev *rtwdev, const u32 ocp_src, u32 size, + u32 fwcd_item); +int rtw_dump_reg(struct rtw_dev *rtwdev, const u32 addr, const u32 size); +void rtw_set_txrx_1ss(struct rtw_dev *rtwdev, bool config_1ss); +void rtw_update_channel(struct rtw_dev *rtwdev, u8 center_channel, + u8 primary_channel, enum rtw_supported_band band, + enum rtw_bandwidth bandwidth); +void rtw_core_port_switch(struct rtw_dev *rtwdev, struct ieee80211_vif *vif); +bool rtw_core_check_sta_active(struct rtw_dev *rtwdev); +void rtw_core_enable_beacon(struct rtw_dev *rtwdev, bool enable); #endif diff --git a/drivers/net/wireless/realtek/rtw88/pci.c b/drivers/net/wireless/realtek/rtw88/pci.c index 676d861aaf..494cf63293 100644 --- a/drivers/net/wireless/realtek/rtw88/pci.c +++ b/drivers/net/wireless/realtek/rtw88/pci.c @@ -30,7 +30,8 @@ static u32 rtw_pci_tx_queue_idx_addr[] = { [RTW_TX_QUEUE_H2C] = RTK_PCI_TXBD_IDX_H2CQ, }; -static u8 rtw_pci_get_tx_qsel(struct sk_buff *skb, u8 queue) +static u8 rtw_pci_get_tx_qsel(struct sk_buff *skb, + enum rtw_tx_queue_type queue) { switch (queue) { case RTW_TX_QUEUE_BCN: @@ -88,13 +89,6 @@ static void rtw_pci_write32(struct rtw_dev *rtwdev, u32 addr, u32 val) writel(val, rtwpci->mmap + addr); } -static inline void *rtw_pci_get_tx_desc(struct rtw_pci_tx_ring *tx_ring, u8 idx) -{ - int offset = tx_ring->r.desc_size * idx; - - return tx_ring->r.head + offset; -} - static void rtw_pci_free_tx_ring_skbs(struct rtw_dev *rtwdev, struct rtw_pci_tx_ring *tx_ring) { @@ -267,11 +261,6 @@ static int rtw_pci_init_rx_ring(struct rtw_dev *rtwdev, int i, allocated; int ret = 0; - if (len > TRX_BD_IDX_MASK) { - rtw_err(rtwdev, "len %d exceeds maximum RX entries\n", len); - return -EINVAL; - } - head = dma_alloc_coherent(&pdev->dev, ring_sz, &dma, GFP_KERNEL); if (!head) { rtw_err(rtwdev, "failed to allocate rx ring\n"); @@ -327,7 +316,7 @@ static int rtw_pci_init_trx_ring(struct rtw_dev *rtwdev) struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; struct rtw_pci_tx_ring *tx_ring; struct rtw_pci_rx_ring *rx_ring; - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; int i = 0, j = 0, tx_alloced = 0, rx_alloced = 0; int tx_desc_size, rx_desc_size; u32 len; @@ -488,13 +477,14 @@ static void rtw_pci_reset_trx_ring(struct rtw_dev *rtwdev) } static void rtw_pci_enable_interrupt(struct rtw_dev *rtwdev, - struct rtw_pci *rtwpci) + struct rtw_pci *rtwpci, bool exclude_rx) { unsigned long flags; + u32 imr0_unmask = exclude_rx ? IMR_ROK : 0; spin_lock_irqsave(&rtwpci->hwirq_lock, flags); - rtw_write32(rtwdev, RTK_PCI_HIMR0, rtwpci->irq_mask[0]); + rtw_write32(rtwdev, RTK_PCI_HIMR0, rtwpci->irq_mask[0] & ~imr0_unmask); rtw_write32(rtwdev, RTK_PCI_HIMR1, rtwpci->irq_mask[1]); if (rtw_chip_wcpu_11ac(rtwdev)) rtw_write32(rtwdev, RTK_PCI_HIMR3, rtwpci->irq_mask[3]); @@ -546,7 +536,7 @@ static int rtw_pci_setup(struct rtw_dev *rtwdev) static void rtw_pci_dma_release(struct rtw_dev *rtwdev, struct rtw_pci *rtwpci) { struct rtw_pci_tx_ring *tx_ring; - u8 queue; + enum rtw_tx_queue_type queue; rtw_pci_reset_trx_ring(rtwdev); for (queue = 0; queue < RTK_MAX_TX_QUEUE_NUM; queue++) { @@ -555,12 +545,36 @@ static void rtw_pci_dma_release(struct rtw_dev *rtwdev, struct rtw_pci *rtwpci) } } +static void rtw_pci_napi_start(struct rtw_dev *rtwdev) +{ + struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; + + if (test_and_set_bit(RTW_PCI_FLAG_NAPI_RUNNING, rtwpci->flags)) + return; + + napi_enable(&rtwpci->napi); +} + +static void rtw_pci_napi_stop(struct rtw_dev *rtwdev) +{ + struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; + + if (!test_and_clear_bit(RTW_PCI_FLAG_NAPI_RUNNING, rtwpci->flags)) + return; + + napi_synchronize(&rtwpci->napi); + napi_disable(&rtwpci->napi); +} + static int rtw_pci_start(struct rtw_dev *rtwdev) { struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; + rtw_pci_napi_start(rtwdev); + spin_lock_bh(&rtwpci->irq_lock); - rtw_pci_enable_interrupt(rtwdev, rtwpci); + rtwpci->running = true; + rtw_pci_enable_interrupt(rtwdev, rtwpci, false); spin_unlock_bh(&rtwpci->irq_lock); return 0; @@ -569,9 +583,17 @@ static int rtw_pci_start(struct rtw_dev *rtwdev) static void rtw_pci_stop(struct rtw_dev *rtwdev) { struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; + struct pci_dev *pdev = rtwpci->pdev; spin_lock_bh(&rtwpci->irq_lock); + rtwpci->running = false; rtw_pci_disable_interrupt(rtwdev, rtwpci); + spin_unlock_bh(&rtwpci->irq_lock); + + synchronize_irq(pdev->irq); + rtw_pci_napi_stop(rtwdev); + + spin_lock_bh(&rtwpci->irq_lock); rtw_pci_dma_release(rtwdev, rtwpci); spin_unlock_bh(&rtwpci->irq_lock); } @@ -580,8 +602,11 @@ static void rtw_pci_deep_ps_enter(struct rtw_dev *rtwdev) { struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; struct rtw_pci_tx_ring *tx_ring; + enum rtw_tx_queue_type queue; bool tx_empty = true; - u8 queue; + + if (rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_TX_WAKE)) + goto enter_deep_ps; lockdep_assert_held(&rtwpci->irq_lock); @@ -608,7 +633,7 @@ static void rtw_pci_deep_ps_enter(struct rtw_dev *rtwdev) "TX path not empty, cannot enter deep power save state\n"); return; } - +enter_deep_ps: set_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags); rtw_power_mode_change(rtwdev, true); } @@ -638,32 +663,6 @@ static void rtw_pci_deep_ps(struct rtw_dev *rtwdev, bool enter) spin_unlock_bh(&rtwpci->irq_lock); } -static u8 ac_to_hwq[] = { - [IEEE80211_AC_VO] = RTW_TX_QUEUE_VO, - [IEEE80211_AC_VI] = RTW_TX_QUEUE_VI, - [IEEE80211_AC_BE] = RTW_TX_QUEUE_BE, - [IEEE80211_AC_BK] = RTW_TX_QUEUE_BK, -}; - -static u8 rtw_hw_queue_mapping(struct sk_buff *skb) -{ - struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; - __le16 fc = hdr->frame_control; - u8 q_mapping = skb_get_queue_mapping(skb); - u8 queue; - - if (unlikely(ieee80211_is_beacon(fc))) - queue = RTW_TX_QUEUE_BCN; - else if (unlikely(ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))) - queue = RTW_TX_QUEUE_MGMT; - else if (WARN_ON_ONCE(q_mapping >= ARRAY_SIZE(ac_to_hwq))) - queue = ac_to_hwq[IEEE80211_AC_BE]; - else - queue = ac_to_hwq[q_mapping]; - - return queue; -} - static void rtw_pci_release_rsvd_page(struct rtw_pci *rtwpci, struct rtw_pci_tx_ring *ring) { @@ -685,7 +684,7 @@ static void rtw_pci_dma_check(struct rtw_dev *rtwdev, u32 idx) { struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_pci_rx_buffer_desc *buf_desc; u32 desc_sz = chip->rx_buf_desc_sz; u16 total_pkt_size; @@ -701,7 +700,75 @@ static void rtw_pci_dma_check(struct rtw_dev *rtwdev, rtwpci->rx_tag = (rtwpci->rx_tag + 1) % RX_TAG_MAX; } -static void rtw_pci_tx_kick_off_queue(struct rtw_dev *rtwdev, u8 queue) +static u32 __pci_get_hw_tx_ring_rp(struct rtw_dev *rtwdev, u8 pci_q) +{ + u32 bd_idx_addr = rtw_pci_tx_queue_idx_addr[pci_q]; + u32 bd_idx = rtw_read16(rtwdev, bd_idx_addr + 2); + + return FIELD_GET(TRX_BD_IDX_MASK, bd_idx); +} + +static void __pci_flush_queue(struct rtw_dev *rtwdev, u8 pci_q, bool drop) +{ + struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; + struct rtw_pci_tx_ring *ring = &rtwpci->tx_rings[pci_q]; + u32 cur_rp; + u8 i; + + /* Because the time taked by the I/O in __pci_get_hw_tx_ring_rp is a + * bit dynamic, it's hard to define a reasonable fixed total timeout to + * use read_poll_timeout* helper. Instead, we can ensure a reasonable + * polling times, so we just use for loop with udelay here. + */ + for (i = 0; i < 30; i++) { + cur_rp = __pci_get_hw_tx_ring_rp(rtwdev, pci_q); + if (cur_rp == ring->r.wp) + return; + + udelay(1); + } + + if (!drop) + rtw_warn(rtwdev, "timed out to flush pci tx ring[%d]\n", pci_q); +} + +static void __rtw_pci_flush_queues(struct rtw_dev *rtwdev, u32 pci_queues, + bool drop) +{ + u8 q; + + for (q = 0; q < RTK_MAX_TX_QUEUE_NUM; q++) { + /* Unnecessary to flush BCN, H2C and HI tx queues. */ + if (q == RTW_TX_QUEUE_BCN || q == RTW_TX_QUEUE_H2C || + q == RTW_TX_QUEUE_HI0) + continue; + + if (pci_queues & BIT(q)) + __pci_flush_queue(rtwdev, q, drop); + } +} + +static void rtw_pci_flush_queues(struct rtw_dev *rtwdev, u32 queues, bool drop) +{ + u32 pci_queues = 0; + u8 i; + + /* If all of the hardware queues are requested to flush, + * flush all of the pci queues. + */ + if (queues == BIT(rtwdev->hw->queues) - 1) { + pci_queues = BIT(RTK_MAX_TX_QUEUE_NUM) - 1; + } else { + for (i = 0; i < rtwdev->hw->queues; i++) + if (queues & BIT(i)) + pci_queues |= BIT(rtw_tx_ac_to_hwq(i)); + } + + __rtw_pci_flush_queues(rtwdev, pci_queues, drop); +} + +static void rtw_pci_tx_kick_off_queue(struct rtw_dev *rtwdev, + enum rtw_tx_queue_type queue) { struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; struct rtw_pci_tx_ring *ring; @@ -711,7 +778,8 @@ static void rtw_pci_tx_kick_off_queue(struct rtw_dev *rtwdev, u8 queue) bd_idx = rtw_pci_tx_queue_idx_addr[queue]; spin_lock_bh(&rtwpci->irq_lock); - rtw_pci_deep_ps_leave(rtwdev); + if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_TX_WAKE)) + rtw_pci_deep_ps_leave(rtwdev); rtw_write16(rtwdev, bd_idx, ring->r.wp & TRX_BD_IDX_MASK); spin_unlock_bh(&rtwpci->irq_lock); } @@ -719,7 +787,7 @@ static void rtw_pci_tx_kick_off_queue(struct rtw_dev *rtwdev, u8 queue) static void rtw_pci_tx_kick_off(struct rtw_dev *rtwdev) { struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; - u8 queue; + enum rtw_tx_queue_type queue; for (queue = 0; queue < RTK_MAX_TX_QUEUE_NUM; queue++) if (test_and_clear_bit(queue, rtwpci->tx_queued)) @@ -728,10 +796,11 @@ static void rtw_pci_tx_kick_off(struct rtw_dev *rtwdev) static int rtw_pci_tx_write_data(struct rtw_dev *rtwdev, struct rtw_tx_pkt_info *pkt_info, - struct sk_buff *skb, u8 queue) + struct sk_buff *skb, + enum rtw_tx_queue_type queue) { struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_pci_tx_ring *ring; struct rtw_pci_tx_data *tx_data; dma_addr_t dma; @@ -846,9 +915,9 @@ static int rtw_pci_tx_write(struct rtw_dev *rtwdev, struct rtw_tx_pkt_info *pkt_info, struct sk_buff *skb) { + enum rtw_tx_queue_type queue = rtw_tx_queue_mapping(skb); struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; struct rtw_pci_tx_ring *ring; - u8 queue = rtw_hw_queue_mapping(skb); int ret; ret = rtw_pci_tx_write_data(rtwdev, pkt_info, skb, queue); @@ -856,10 +925,12 @@ static int rtw_pci_tx_write(struct rtw_dev *rtwdev, return ret; ring = &rtwpci->tx_rings[queue]; + spin_lock_bh(&rtwpci->irq_lock); if (avail_desc(ring->r.wp, ring->r.rp, ring->r.len) < 2) { ieee80211_stop_queue(rtwdev->hw, skb_get_queue_mapping(skb)); ring->queue_stopped = true; } + spin_unlock_bh(&rtwpci->irq_lock); return 0; } @@ -874,7 +945,7 @@ static void rtw_pci_tx_isr(struct rtw_dev *rtwdev, struct rtw_pci *rtwpci, struct sk_buff *skb; u32 count; u32 bd_idx_addr; - u32 bd_idx, cur_rp; + u32 bd_idx, cur_rp, rp_idx; u16 q_map; ring = &rtwpci->tx_rings[hw_queue]; @@ -883,6 +954,7 @@ static void rtw_pci_tx_isr(struct rtw_dev *rtwdev, struct rtw_pci *rtwpci, bd_idx = rtw_read32(rtwdev, bd_idx_addr); cur_rp = bd_idx >> 16; cur_rp &= TRX_BD_IDX_MASK; + rp_idx = ring->r.rp; if (cur_rp >= ring->r.rp) count = cur_rp - ring->r.rp; else @@ -906,12 +978,15 @@ static void rtw_pci_tx_isr(struct rtw_dev *rtwdev, struct rtw_pci *rtwpci, } if (ring->queue_stopped && - avail_desc(ring->r.wp, ring->r.rp, ring->r.len) > 4) { + avail_desc(ring->r.wp, rp_idx, ring->r.len) > 4) { q_map = skb_get_queue_mapping(skb); ieee80211_wake_queue(hw, q_map); ring->queue_stopped = false; } + if (++rp_idx >= ring->r.len) + rp_idx = 0; + skb_pull(skb, rtwdev->chip->tx_pkt_desc_sz); info = IEEE80211_SKB_CB(skb); @@ -935,16 +1010,43 @@ static void rtw_pci_tx_isr(struct rtw_dev *rtwdev, struct rtw_pci *rtwpci, ring->r.rp = cur_rp; } -static void rtw_pci_rx_isr(struct rtw_dev *rtwdev, struct rtw_pci *rtwpci, - u8 hw_queue) +static void rtw_pci_rx_isr(struct rtw_dev *rtwdev) +{ + struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; + struct napi_struct *napi = &rtwpci->napi; + + napi_schedule(napi); +} + +static int rtw_pci_get_hw_rx_ring_nr(struct rtw_dev *rtwdev, + struct rtw_pci *rtwpci) { - struct rtw_chip_info *chip = rtwdev->chip; struct rtw_pci_rx_ring *ring; + int count = 0; + u32 tmp, cur_wp; + + ring = &rtwpci->rx_rings[RTW_RX_QUEUE_MPDU]; + tmp = rtw_read32(rtwdev, RTK_PCI_RXBD_IDX_MPDUQ); + cur_wp = u32_get_bits(tmp, TRX_BD_HW_IDX_MASK); + if (cur_wp >= ring->r.wp) + count = cur_wp - ring->r.wp; + else + count = ring->r.len - (ring->r.wp - cur_wp); + + return count; +} + +static u32 rtw_pci_rx_napi(struct rtw_dev *rtwdev, struct rtw_pci *rtwpci, + u8 hw_queue, u32 limit) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + struct napi_struct *napi = &rtwpci->napi; + struct rtw_pci_rx_ring *ring = &rtwpci->rx_rings[RTW_RX_QUEUE_MPDU]; struct rtw_rx_pkt_stat pkt_stat; struct ieee80211_rx_status rx_status; struct sk_buff *skb, *new; - u32 cur_wp, cur_rp, tmp; - u32 count; + u32 cur_rp = ring->r.rp; + u32 count, rx_done = 0; u32 pkt_offset; u32 pkt_desc_sz = chip->rx_pkt_desc_sz; u32 buf_desc_sz = chip->rx_buf_desc_sz; @@ -952,17 +1054,9 @@ static void rtw_pci_rx_isr(struct rtw_dev *rtwdev, struct rtw_pci *rtwpci, u8 *rx_desc; dma_addr_t dma; - ring = &rtwpci->rx_rings[RTW_RX_QUEUE_MPDU]; - - tmp = rtw_read32(rtwdev, RTK_PCI_RXBD_IDX_MPDUQ); - cur_wp = tmp >> 16; - cur_wp &= TRX_BD_IDX_MASK; - if (cur_wp >= ring->r.wp) - count = cur_wp - ring->r.wp; - else - count = ring->r.len - (ring->r.wp - cur_wp); + count = rtw_pci_get_hw_rx_ring_nr(rtwdev, rtwpci); + count = min(count, limit); - cur_rp = ring->r.rp; while (count--) { rtw_pci_dma_check(rtwdev, ring, cur_rp); skb = ring->buf[cur_rp]; @@ -995,7 +1089,8 @@ static void rtw_pci_rx_isr(struct rtw_dev *rtwdev, struct rtw_pci *rtwpci, rtw_rx_stats(rtwdev, pkt_stat.vif, new); memcpy(new->cb, &rx_status, sizeof(rx_status)); - ieee80211_rx_irqsafe(rtwdev->hw, new); + ieee80211_rx_napi(rtwdev->hw, NULL, new, napi); + rx_done++; } next_rp: @@ -1009,8 +1104,13 @@ static void rtw_pci_rx_isr(struct rtw_dev *rtwdev, struct rtw_pci *rtwpci, } ring->r.rp = cur_rp; - ring->r.wp = cur_wp; + /* 'rp', the last position we have read, is seen as previous posistion + * of 'wp' that is used to calculate 'count' next time. + */ + ring->r.wp = cur_rp; rtw_write16(rtwdev, RTK_PCI_RXBD_IDX_MPDUQ, ring->r.rp); + + return rx_done; } static void rtw_pci_irq_recognized(struct rtw_dev *rtwdev, @@ -1060,6 +1160,7 @@ static irqreturn_t rtw_pci_interrupt_threadfn(int irq, void *dev) struct rtw_dev *rtwdev = dev; struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; u32 irq_status[4]; + bool rx = false; spin_lock_bh(&rtwpci->irq_lock); rtw_pci_irq_recognized(rtwdev, rtwpci, irq_status); @@ -1078,13 +1179,16 @@ static irqreturn_t rtw_pci_interrupt_threadfn(int irq, void *dev) rtw_pci_tx_isr(rtwdev, rtwpci, RTW_TX_QUEUE_VI); if (irq_status[3] & IMR_H2CDOK) rtw_pci_tx_isr(rtwdev, rtwpci, RTW_TX_QUEUE_H2C); - if (irq_status[0] & IMR_ROK) - rtw_pci_rx_isr(rtwdev, rtwpci, RTW_RX_QUEUE_MPDU); + if (irq_status[0] & IMR_ROK) { + rtw_pci_rx_isr(rtwdev); + rx = true; + } if (unlikely(irq_status[0] & IMR_C2HCMD)) rtw_fw_c2h_cmd_isr(rtwdev); /* all of the jobs for this interrupt have been done */ - rtw_pci_enable_interrupt(rtwdev, rtwpci); + if (rtwpci->running) + rtw_pci_enable_interrupt(rtwdev, rtwpci, rx); spin_unlock_bh(&rtwpci->irq_lock); return IRQ_HANDLED; @@ -1222,6 +1326,25 @@ static void rtw_pci_clkreq_set(struct rtw_dev *rtwdev, bool enable) rtw_dbi_write8(rtwdev, RTK_PCIE_LINK_CFG, value); } +static void rtw_pci_clkreq_pad_low(struct rtw_dev *rtwdev, bool enable) +{ + u8 value; + int ret; + + ret = rtw_dbi_read8(rtwdev, RTK_PCIE_LINK_CFG, &value); + if (ret) { + rtw_err(rtwdev, "failed to read CLKREQ_L1, ret=%d", ret); + return; + } + + if (enable) + value &= ~BIT_CLKREQ_N_PAD; + else + value |= BIT_CLKREQ_N_PAD; + + rtw_dbi_write8(rtwdev, RTK_PCIE_LINK_CFG, value); +} + static void rtw_pci_aspm_set(struct rtw_dev *rtwdev, bool enable) { u8 value; @@ -1258,13 +1381,17 @@ static void rtw_pci_link_ps(struct rtw_dev *rtwdev, bool enter) * throughput. This is probably because the ASPM behavior slightly * varies from different SOC. */ - if (rtwpci->link_ctrl & PCI_EXP_LNKCTL_ASPM_L1) + if (!(rtwpci->link_ctrl & PCI_EXP_LNKCTL_ASPM_L1)) + return; + + if ((enter && atomic_dec_if_positive(&rtwpci->link_usage) == 0) || + (!enter && atomic_inc_return(&rtwpci->link_usage) == 1)) rtw_pci_aspm_set(rtwdev, enter); } static void rtw_pci_link_cfg(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; struct pci_dev *pdev = rtwpci->pdev; u16 link_ctrl; @@ -1306,7 +1433,7 @@ static void rtw_pci_link_cfg(struct rtw_dev *rtwdev) static void rtw_pci_interface_cfg(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; switch (chip->id) { case RTW_CHIP_TYPE_8822C: @@ -1321,12 +1448,15 @@ static void rtw_pci_interface_cfg(struct rtw_dev *rtwdev) static void rtw_pci_phy_cfg(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; + const struct rtw_chip_info *chip = rtwdev->chip; + struct pci_dev *pdev = rtwpci->pdev; const struct rtw_intf_phy_para *para; u16 cut; u16 value; u16 offset; int i; + int ret; cut = BIT(0) << rtwdev->hal.cut_version; @@ -1359,15 +1489,38 @@ static void rtw_pci_phy_cfg(struct rtw_dev *rtwdev) } rtw_pci_link_cfg(rtwdev); + + /* Disable 8821ce completion timeout by default */ + if (chip->id == RTW_CHIP_TYPE_8821C) { + ret = pcie_capability_set_word(pdev, PCI_EXP_DEVCTL2, + PCI_EXP_DEVCTL2_COMP_TMOUT_DIS); + if (ret) + rtw_err(rtwdev, "failed to set PCI cap, ret = %d\n", + ret); + } } static int __maybe_unused rtw_pci_suspend(struct device *dev) { + struct ieee80211_hw *hw = dev_get_drvdata(dev); + struct rtw_dev *rtwdev = hw->priv; + const struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_efuse *efuse = &rtwdev->efuse; + + if (chip->id == RTW_CHIP_TYPE_8822C && efuse->rfe_option == 6) + rtw_pci_clkreq_pad_low(rtwdev, true); return 0; } static int __maybe_unused rtw_pci_resume(struct device *dev) { + struct ieee80211_hw *hw = dev_get_drvdata(dev); + struct rtw_dev *rtwdev = hw->priv; + const struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_efuse *efuse = &rtwdev->efuse; + + if (chip->id == RTW_CHIP_TYPE_8822C && efuse->rfe_option == 6) + rtw_pci_clkreq_pad_low(rtwdev, false); return 0; } @@ -1393,7 +1546,6 @@ static int rtw_pci_claim(struct rtw_dev *rtwdev, struct pci_dev *pdev) static void rtw_pci_declaim(struct rtw_dev *rtwdev, struct pci_dev *pdev) { - pci_clear_master(pdev); pci_disable_device(pdev); } @@ -1436,6 +1588,7 @@ static void rtw_pci_destroy(struct rtw_dev *rtwdev, struct pci_dev *pdev) static struct rtw_hci_ops rtw_pci_ops = { .tx_write = rtw_pci_tx_write, .tx_kick_off = rtw_pci_tx_kick_off, + .flush_queues = rtw_pci_flush_queues, .setup = rtw_pci_setup, .start = rtw_pci_start, .stop = rtw_pci_stop, @@ -1485,11 +1638,73 @@ static void rtw_pci_free_irq(struct rtw_dev *rtwdev, struct pci_dev *pdev) pci_free_irq_vectors(pdev); } +static int rtw_pci_napi_poll(struct napi_struct *napi, int budget) +{ + struct rtw_pci *rtwpci = container_of(napi, struct rtw_pci, napi); + struct rtw_dev *rtwdev = container_of((void *)rtwpci, struct rtw_dev, + priv); + int work_done = 0; + + if (rtwpci->rx_no_aspm) + rtw_pci_link_ps(rtwdev, false); + + while (work_done < budget) { + u32 work_done_once; + + work_done_once = rtw_pci_rx_napi(rtwdev, rtwpci, RTW_RX_QUEUE_MPDU, + budget - work_done); + if (work_done_once == 0) + break; + work_done += work_done_once; + } + if (work_done < budget) { + napi_complete_done(napi, work_done); + spin_lock_bh(&rtwpci->irq_lock); + if (rtwpci->running) + rtw_pci_enable_interrupt(rtwdev, rtwpci, false); + spin_unlock_bh(&rtwpci->irq_lock); + /* When ISR happens during polling and before napi_complete + * while no further data is received. Data on the dma_ring will + * not be processed immediately. Check whether dma ring is + * empty and perform napi_schedule accordingly. + */ + if (rtw_pci_get_hw_rx_ring_nr(rtwdev, rtwpci)) + napi_schedule(napi); + } + if (rtwpci->rx_no_aspm) + rtw_pci_link_ps(rtwdev, true); + + return work_done; +} + +static void rtw_pci_napi_init(struct rtw_dev *rtwdev) +{ + struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; + + init_dummy_netdev(&rtwpci->netdev); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0) + netif_napi_add(&rtwpci->netdev, &rtwpci->napi, rtw_pci_napi_poll); +#else + netif_napi_add(&rtwpci->netdev, &rtwpci->napi, rtw_pci_napi_poll, + NAPI_POLL_WEIGHT); +#endif +} + +static void rtw_pci_napi_deinit(struct rtw_dev *rtwdev) +{ + struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; + + rtw_pci_napi_stop(rtwdev); + netif_napi_del(&rtwpci->napi); +} + int rtw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { + struct pci_dev *bridge = pci_upstream_bridge(pdev); struct ieee80211_hw *hw; struct rtw_dev *rtwdev; + struct rtw_pci *rtwpci; int drv_data_size; int ret; @@ -1507,6 +1722,9 @@ int rtw_pci_probe(struct pci_dev *pdev, rtwdev->hci.ops = &rtw_pci_ops; rtwdev->hci.type = RTW_HCI_TYPE_PCIE; + rtwpci = (struct rtw_pci *)rtwdev->priv; + atomic_set(&rtwpci->link_usage, 1); + ret = rtw_core_init(rtwdev); if (ret) goto err_release_hw; @@ -1527,12 +1745,18 @@ int rtw_pci_probe(struct pci_dev *pdev, goto err_pci_declaim; } + rtw_pci_napi_init(rtwdev); + ret = rtw_chip_info_setup(rtwdev); if (ret) { rtw_err(rtwdev, "failed to setup chip information\n"); goto err_destroy_pci; } + /* Disable PCIe ASPM L1 while doing NAPI poll for 8821CE */ + if (rtwdev->chip->id == RTW_CHIP_TYPE_8821C && bridge->vendor == PCI_VENDOR_ID_INTEL) + rtwpci->rx_no_aspm = true; + rtw_pci_phy_cfg(rtwdev); ret = rtw_register_hw(rtwdev, hw); @@ -1550,6 +1774,7 @@ int rtw_pci_probe(struct pci_dev *pdev, return 0; err_destroy_pci: + rtw_pci_napi_deinit(rtwdev); rtw_pci_destroy(rtwdev, pdev); err_pci_declaim: @@ -1579,6 +1804,7 @@ void rtw_pci_remove(struct pci_dev *pdev) rtw_unregister_hw(rtwdev, hw); rtw_pci_disable_interrupt(rtwdev, rtwpci); + rtw_pci_napi_deinit(rtwdev); rtw_pci_destroy(rtwdev, pdev); rtw_pci_declaim(rtwdev, pdev); rtw_pci_free_irq(rtwdev, pdev); @@ -1591,7 +1817,7 @@ void rtw_pci_shutdown(struct pci_dev *pdev) { struct ieee80211_hw *hw = pci_get_drvdata(pdev); struct rtw_dev *rtwdev; - struct rtw_chip_info *chip; + const struct rtw_chip_info *chip; if (!hw) return; diff --git a/drivers/net/wireless/realtek/rtw88/pci.h b/drivers/net/wireless/realtek/rtw88/pci.h index ca17aa9cf7..0c37efd8c6 100644 --- a/drivers/net/wireless/realtek/rtw88/pci.h +++ b/drivers/net/wireless/realtek/rtw88/pci.h @@ -5,6 +5,8 @@ #ifndef __RTK_PCI_H_ #define __RTK_PCI_H_ +#include "main.h" + #define RTK_DEFAULT_TX_DESC_NUM 128 #define RTK_BEQ_TX_DESC_NUM 256 @@ -35,6 +37,7 @@ #define RTK_PCIE_LINK_CFG 0x0719 #define BIT_CLKREQ_SW_EN BIT(4) #define BIT_L1_SW_EN BIT(3) +#define BIT_CLKREQ_N_PAD BIT(0) #define RTK_PCIE_CLKDLY_CTRL 0x0725 #define BIT_PCI_BCNQ_FLAG BIT(4) @@ -49,6 +52,7 @@ #define RTK_PCI_RXBD_DESA_MPDUQ 0x338 #define TRX_BD_IDX_MASK GENMASK(11, 0) +#define TRX_BD_HW_IDX_MASK GENMASK(27, 16) /* BCNQ is specialized for rsvd page, does not need to specify a number */ #define RTK_PCI_TXBD_NUM_H2CQ 0x1328 @@ -140,6 +144,12 @@ /* IMR 3 */ #define IMR_H2CDOK BIT(16) +enum rtw_pci_flags { + RTW_PCI_FLAG_NAPI_RUNNING, + + NUM_OF_RTW_PCI_FLAGS, +}; + /* one element is reserved to know if the ring is closed */ static inline int avail_desc(u32 wp, u32 rp, u32 len) { @@ -198,20 +208,34 @@ struct rtw_pci { /* Used for PCI interrupt. */ spinlock_t hwirq_lock; - /* Used for PCI TX queueing. */ + /* Used for PCI TX ring/queueing, and enable INT. */ spinlock_t irq_lock; u32 irq_mask[4]; bool irq_enabled; + bool running; + + /* napi structure */ + struct net_device netdev; + struct napi_struct napi; u16 rx_tag; DECLARE_BITMAP(tx_queued, RTK_MAX_TX_QUEUE_NUM); struct rtw_pci_tx_ring tx_rings[RTK_MAX_TX_QUEUE_NUM]; struct rtw_pci_rx_ring rx_rings[RTK_MAX_RX_QUEUE_NUM]; u16 link_ctrl; + atomic_t link_usage; + bool rx_no_aspm; + DECLARE_BITMAP(flags, NUM_OF_RTW_PCI_FLAGS); void __iomem *mmap; }; +extern const struct dev_pm_ops rtw_pm_ops; + +int rtw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id); +void rtw_pci_remove(struct pci_dev *pdev); +void rtw_pci_shutdown(struct pci_dev *pdev); + static inline u32 max_num_of_tx_queue(u8 queue) { u32 max_num; diff --git a/drivers/net/wireless/realtek/rtw88/phy.c b/drivers/net/wireless/realtek/rtw88/phy.c index af8b703d11..57534625c8 100644 --- a/drivers/net/wireless/realtek/rtw88/phy.c +++ b/drivers/net/wireless/realtek/rtw88/phy.c @@ -9,6 +9,10 @@ #include "fw.h" #include "phy.h" #include "debug.h" +#include "regd.h" +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 11, 0) +#include "sar.h" +#endif struct phy_cfg_pair { u32 addr; @@ -119,9 +123,85 @@ static void rtw_phy_cck_pd_init(struct rtw_dev *rtwdev) dm_info->cck_fa_avg = CCK_FA_AVG_RESET; } +void rtw_phy_set_edcca_th(struct rtw_dev *rtwdev, u8 l2h, u8 h2l) +{ + struct rtw_hw_reg_offset *edcca_th = rtwdev->chip->edcca_th; + + rtw_write32_mask(rtwdev, + edcca_th[EDCCA_TH_L2H_IDX].hw_reg.addr, + edcca_th[EDCCA_TH_L2H_IDX].hw_reg.mask, + l2h + edcca_th[EDCCA_TH_L2H_IDX].offset); + rtw_write32_mask(rtwdev, + edcca_th[EDCCA_TH_H2L_IDX].hw_reg.addr, + edcca_th[EDCCA_TH_H2L_IDX].hw_reg.mask, + h2l + edcca_th[EDCCA_TH_H2L_IDX].offset); +} +EXPORT_SYMBOL(rtw_phy_set_edcca_th); + +void rtw_phy_adaptivity_set_mode(struct rtw_dev *rtwdev) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + + /* turn off in debugfs for debug usage */ + if (!rtw_edcca_enabled) { + dm_info->edcca_mode = RTW_EDCCA_NORMAL; + rtw_dbg(rtwdev, RTW_DBG_PHY, "EDCCA disabled, cannot be set\n"); + return; + } + + switch (rtwdev->regd.dfs_region) { + case NL80211_DFS_ETSI: + dm_info->edcca_mode = RTW_EDCCA_ADAPTIVITY; + dm_info->l2h_th_ini = chip->l2h_th_ini_ad; + break; + case NL80211_DFS_JP: + dm_info->edcca_mode = RTW_EDCCA_ADAPTIVITY; + dm_info->l2h_th_ini = chip->l2h_th_ini_cs; + break; + default: + dm_info->edcca_mode = RTW_EDCCA_NORMAL; + break; + } +} + +static void rtw_phy_adaptivity_init(struct rtw_dev *rtwdev) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + + rtw_phy_adaptivity_set_mode(rtwdev); + if (chip->ops->adaptivity_init) + chip->ops->adaptivity_init(rtwdev); +} + +static void rtw_phy_adaptivity(struct rtw_dev *rtwdev) +{ + if (rtwdev->chip->ops->adaptivity) + rtwdev->chip->ops->adaptivity(rtwdev); +} + +static void rtw_phy_cfo_init(struct rtw_dev *rtwdev) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + + if (chip->ops->cfo_init) + chip->ops->cfo_init(rtwdev); +} + +static void rtw_phy_tx_path_div_init(struct rtw_dev *rtwdev) +{ + struct rtw_path_div *path_div = &rtwdev->dm_path_div; + + path_div->current_tx_path = rtwdev->chip->default_1ss_tx_path; + path_div->path_a_cnt = 0; + path_div->path_a_sum = 0; + path_div->path_b_cnt = 0; + path_div->path_b_sum = 0; +} + void rtw_phy_init(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_dm_info *dm_info = &rtwdev->dm_info; u32 addr, mask; @@ -140,12 +220,15 @@ void rtw_phy_init(struct rtw_dev *rtwdev) rtw_phy_cck_pd_init(rtwdev); dm_info->iqk.done = false; + rtw_phy_adaptivity_init(rtwdev); + rtw_phy_cfo_init(rtwdev); + rtw_phy_tx_path_div_init(rtwdev); } EXPORT_SYMBOL(rtw_phy_init); void rtw_phy_dig_write(struct rtw_dev *rtwdev, u8 igi) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_hal *hal = &rtwdev->hal; u32 addr, mask; u8 path; @@ -164,7 +247,7 @@ void rtw_phy_dig_write(struct rtw_dev *rtwdev, u8 igi) static void rtw_phy_stat_false_alarm(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; chip->ops->false_alarm_statistics(rtwdev); } @@ -219,7 +302,7 @@ static void rtw_phy_stat_rssi(struct rtw_dev *rtwdev) data.rtwdev = rtwdev; data.min_rssi = U8_MAX; - rtw_iterate_stas_atomic(rtwdev, rtw_phy_stat_rssi_iter, &data); + rtw_iterate_stas(rtwdev, rtw_phy_stat_rssi_iter, &data); dm_info->pre_min_rssi = dm_info->min_rssi; dm_info->min_rssi = data.min_rssi; @@ -316,7 +399,8 @@ rtw_phy_dig_check_damping(struct rtw_dm_info *dm_info) return damping; } -static void rtw_phy_dig_get_boundary(struct rtw_dm_info *dm_info, +static void rtw_phy_dig_get_boundary(struct rtw_dev *rtwdev, + struct rtw_dm_info *dm_info, u8 *upper, u8 *lower, bool linked) { u8 dig_max, dig_min, dig_mid; @@ -325,8 +409,7 @@ static void rtw_phy_dig_get_boundary(struct rtw_dm_info *dm_info, if (linked) { dig_max = DIG_PERF_MAX; dig_mid = DIG_PERF_MID; - /* 22B=0x1c, 22C=0x20 */ - dig_min = 0x1c; + dig_min = rtwdev->chip->dig_min; min_rssi = max_t(u8, dm_info->min_rssi, dig_min); } else { dig_max = DIG_CVRG_MAX; @@ -437,7 +520,8 @@ static void rtw_phy_dig(struct rtw_dev *rtwdev) * the peers connected with us, meanwhile make sure the igi value does * not beyond the hardware limitation */ - rtw_phy_dig_get_boundary(dm_info, &upper_bound, &lower_bound, linked); + rtw_phy_dig_get_boundary(rtwdev, dm_info, &upper_bound, &lower_bound, + linked); cur_igi = clamp_t(u8, cur_igi, lower_bound, upper_bound); /* record current igi value and false alarm statistics for further @@ -454,7 +538,7 @@ static void rtw_phy_ra_info_update_iter(void *data, struct ieee80211_sta *sta) struct rtw_dev *rtwdev = data; struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; - rtw_update_sta_info(rtwdev, si); + rtw_update_sta_info(rtwdev, si, false); } static void rtw_phy_ra_info_update(struct rtw_dev *rtwdev) @@ -462,17 +546,127 @@ static void rtw_phy_ra_info_update(struct rtw_dev *rtwdev) if (rtwdev->watch_dog_cnt & 0x3) return; - rtw_iterate_stas_atomic(rtwdev, rtw_phy_ra_info_update_iter, rtwdev); + rtw_iterate_stas(rtwdev, rtw_phy_ra_info_update_iter, rtwdev); +} + +static u32 rtw_phy_get_rrsr_mask(struct rtw_dev *rtwdev, u8 rate_idx) +{ + u8 rate_order; + + rate_order = rate_idx; + + if (rate_idx >= DESC_RATEVHT4SS_MCS0) + rate_order -= DESC_RATEVHT4SS_MCS0; + else if (rate_idx >= DESC_RATEVHT3SS_MCS0) + rate_order -= DESC_RATEVHT3SS_MCS0; + else if (rate_idx >= DESC_RATEVHT2SS_MCS0) + rate_order -= DESC_RATEVHT2SS_MCS0; + else if (rate_idx >= DESC_RATEVHT1SS_MCS0) + rate_order -= DESC_RATEVHT1SS_MCS0; + else if (rate_idx >= DESC_RATEMCS24) + rate_order -= DESC_RATEMCS24; + else if (rate_idx >= DESC_RATEMCS16) + rate_order -= DESC_RATEMCS16; + else if (rate_idx >= DESC_RATEMCS8) + rate_order -= DESC_RATEMCS8; + else if (rate_idx >= DESC_RATEMCS0) + rate_order -= DESC_RATEMCS0; + else if (rate_idx >= DESC_RATE6M) + rate_order -= DESC_RATE6M; + else + rate_order -= DESC_RATE1M; + + if (rate_idx >= DESC_RATEMCS0 || rate_order == 0) + rate_order++; + + return GENMASK(rate_order + RRSR_RATE_ORDER_CCK_LEN - 1, 0); +} + +static void rtw_phy_rrsr_mask_min_iter(void *data, struct ieee80211_sta *sta) +{ + struct rtw_dev *rtwdev = (struct rtw_dev *)data; + struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + u32 mask = 0; + + mask = rtw_phy_get_rrsr_mask(rtwdev, si->ra_report.desc_rate); + if (mask < dm_info->rrsr_mask_min) + dm_info->rrsr_mask_min = mask; +} + +static void rtw_phy_rrsr_update(struct rtw_dev *rtwdev) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + + dm_info->rrsr_mask_min = RRSR_RATE_ORDER_MAX; + rtw_iterate_stas(rtwdev, rtw_phy_rrsr_mask_min_iter, rtwdev); + rtw_write32(rtwdev, REG_RRSR, dm_info->rrsr_val_init & dm_info->rrsr_mask_min); } static void rtw_phy_dpk_track(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; if (chip->ops->dpk_track) chip->ops->dpk_track(rtwdev); } +struct rtw_rx_addr_match_data { + struct rtw_dev *rtwdev; + struct ieee80211_hdr *hdr; + struct rtw_rx_pkt_stat *pkt_stat; + u8 *bssid; +}; + +static void rtw_phy_parsing_cfo_iter(void *data, u8 *mac, + struct ieee80211_vif *vif) +{ + struct rtw_rx_addr_match_data *iter_data = data; + struct rtw_dev *rtwdev = iter_data->rtwdev; + struct rtw_rx_pkt_stat *pkt_stat = iter_data->pkt_stat; + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + struct rtw_cfo_track *cfo = &dm_info->cfo_track; + u8 *bssid = iter_data->bssid; + u8 i; + + if (!ether_addr_equal(vif->bss_conf.bssid, bssid)) + return; + + for (i = 0; i < rtwdev->hal.rf_path_num; i++) { + cfo->cfo_tail[i] += pkt_stat->cfo_tail[i]; + cfo->cfo_cnt[i]++; + } + + cfo->packet_count++; +} + +void rtw_phy_parsing_cfo(struct rtw_dev *rtwdev, + struct rtw_rx_pkt_stat *pkt_stat) +{ + struct ieee80211_hdr *hdr = pkt_stat->hdr; + struct rtw_rx_addr_match_data data = {}; + + if (pkt_stat->crc_err || pkt_stat->icv_err || !pkt_stat->phy_status || + ieee80211_is_ctl(hdr->frame_control)) + return; + + data.rtwdev = rtwdev; + data.hdr = hdr; + data.pkt_stat = pkt_stat; + data.bssid = get_hdr_bssid(hdr); + + rtw_iterate_vifs_atomic(rtwdev, rtw_phy_parsing_cfo_iter, &data); +} +EXPORT_SYMBOL(rtw_phy_parsing_cfo); + +static void rtw_phy_cfo_track(struct rtw_dev *rtwdev) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + + if (chip->ops->cfo_track) + chip->ops->cfo_track(rtwdev); +} + #define CCK_PD_FA_LV1_MIN 1000 #define CCK_PD_FA_LV0_MAX 500 @@ -528,8 +722,8 @@ static u8 rtw_phy_cck_pd_lv(struct rtw_dev *rtwdev) static void rtw_phy_cck_pd(struct rtw_dev *rtwdev) { + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_dm_info *dm_info = &rtwdev->dm_info; - struct rtw_chip_info *chip = rtwdev->chip; u32 cck_fa = dm_info->cck_fa_cnt; u8 level; @@ -541,6 +735,12 @@ static void rtw_phy_cck_pd(struct rtw_dev *rtwdev) else dm_info->cck_fa_avg = (dm_info->cck_fa_avg * 3 + cck_fa) >> 2; + rtw_dbg(rtwdev, RTW_DBG_PHY, "IGI=0x%x, rssi_min=%d, cck_fa=%d\n", + dm_info->igi_history[0], dm_info->min_rssi, + dm_info->fa_history[0]); + rtw_dbg(rtwdev, RTW_DBG_PHY, "cck_fa_avg=%d, cck_pd_default=%d\n", + dm_info->cck_fa_avg, dm_info->cck_pd_default); + level = rtw_phy_cck_pd_lv(rtwdev); if (level >= CCK_PD_LV_MAX) @@ -555,15 +755,29 @@ static void rtw_phy_pwr_track(struct rtw_dev *rtwdev) rtwdev->chip->ops->pwr_track(rtwdev); } +static void rtw_phy_ra_track(struct rtw_dev *rtwdev) +{ + rtw_fw_update_wl_phy_info(rtwdev); + rtw_phy_ra_info_update(rtwdev); + rtw_phy_rrsr_update(rtwdev); +} + void rtw_phy_dynamic_mechanism(struct rtw_dev *rtwdev) { /* for further calculation */ rtw_phy_statistics(rtwdev); rtw_phy_dig(rtwdev); rtw_phy_cck_pd(rtwdev); - rtw_phy_ra_info_update(rtwdev); + rtw_phy_ra_track(rtwdev); + rtw_phy_tx_path_diversity(rtwdev); + rtw_phy_cfo_track(rtwdev); rtw_phy_dpk_track(rtwdev); rtw_phy_pwr_track(rtwdev); + + if (rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_ADAPTIVITY)) + rtw_fw_adaptivity(rtwdev); + else + rtw_phy_adaptivity(rtwdev); } #define FRAC_BITS 3 @@ -604,23 +818,18 @@ static u8 rtw_phy_linear_2_db(u64 linear) u8 j; u32 dB; - if (linear >= db_invert_table[11][7]) - return 96; /* maximum 96 dB */ - for (i = 0; i < 12; i++) { - if (i <= 2 && (linear << FRAC_BITS) <= db_invert_table[i][7]) - break; - else if (i > 2 && linear <= db_invert_table[i][7]) - break; + for (j = 0; j < 8; j++) { + if (i <= 2 && (linear << FRAC_BITS) <= db_invert_table[i][j]) + goto cnt; + else if (i > 2 && linear <= db_invert_table[i][j]) + goto cnt; + } } - for (j = 0; j < 8; j++) { - if (i <= 2 && (linear << FRAC_BITS) <= db_invert_table[i][j]) - break; - else if (i > 2 && linear <= db_invert_table[i][j]) - break; - } + return 96; /* maximum 96 dB */ +cnt: if (j == 0 && i == 0) goto end; @@ -688,7 +897,7 @@ u32 rtw_phy_read_rf(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path, u32 addr, u32 mask) { struct rtw_hal *hal = &rtwdev->hal; - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; const u32 *base_addr = chip->rf_base_addr; u32 val, direct_addr; @@ -711,7 +920,7 @@ u32 rtw_phy_read_rf_sipi(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path, u32 addr, u32 mask) { struct rtw_hal *hal = &rtwdev->hal; - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; const struct rtw_rf_sipi_addr *rf_sipi_addr; const struct rtw_rf_sipi_addr *rf_sipi_addr_a; u32 val32; @@ -760,8 +969,8 @@ bool rtw_phy_write_rf_reg_sipi(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path, u32 addr, u32 mask, u32 data) { struct rtw_hal *hal = &rtwdev->hal; - struct rtw_chip_info *chip = rtwdev->chip; - u32 *sipi_addr = chip->rf_sipi_addr; + const struct rtw_chip_info *chip = rtwdev->chip; + const u32 *sipi_addr = chip->rf_sipi_addr; u32 data_and_addr; u32 old_data = 0; u32 shift; @@ -800,7 +1009,7 @@ bool rtw_phy_write_rf_reg(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path, u32 addr, u32 mask, u32 data) { struct rtw_hal *hal = &rtwdev->hal; - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; const u32 *base_addr = chip->rf_base_addr; u32 direct_addr; @@ -1417,17 +1626,70 @@ static void rtw_xref_txpwr_lmt(struct rtw_dev *rtwdev) rtw_xref_txpwr_lmt_by_bw(rtwdev, regd); } +static void +__cfg_txpwr_lmt_by_alt(struct rtw_hal *hal, u8 regd, u8 regd_alt, u8 bw, u8 rs) +{ + u8 ch; + + for (ch = 0; ch < RTW_MAX_CHANNEL_NUM_2G; ch++) + hal->tx_pwr_limit_2g[regd][bw][rs][ch] = + hal->tx_pwr_limit_2g[regd_alt][bw][rs][ch]; + + for (ch = 0; ch < RTW_MAX_CHANNEL_NUM_5G; ch++) + hal->tx_pwr_limit_5g[regd][bw][rs][ch] = + hal->tx_pwr_limit_5g[regd_alt][bw][rs][ch]; +} + +static void +rtw_cfg_txpwr_lmt_by_alt(struct rtw_dev *rtwdev, u8 regd, u8 regd_alt) +{ + u8 bw, rs; + + for (bw = 0; bw < RTW_CHANNEL_WIDTH_MAX; bw++) + for (rs = 0; rs < RTW_RATE_SECTION_MAX; rs++) + __cfg_txpwr_lmt_by_alt(&rtwdev->hal, regd, regd_alt, + bw, rs); +} + void rtw_parse_tbl_txpwr_lmt(struct rtw_dev *rtwdev, const struct rtw_table *tbl) { const struct rtw_txpwr_lmt_cfg_pair *p = tbl->data; const struct rtw_txpwr_lmt_cfg_pair *end = p + tbl->size; + u32 regd_cfg_flag = 0; + u8 regd_alt; + u8 i; for (; p < end; p++) { + regd_cfg_flag |= BIT(p->regd); rtw_phy_set_tx_power_limit(rtwdev, p->regd, p->band, p->bw, p->rs, p->ch, p->txpwr_lmt); } + for (i = 0; i < RTW_REGD_MAX; i++) { + if (i == RTW_REGD_WW) + continue; + + if (regd_cfg_flag & BIT(i)) + continue; + + rtw_dbg(rtwdev, RTW_DBG_REGD, + "txpwr regd %d does not be configured\n", i); + + if (rtw_regd_has_alt(i, ®d_alt) && + regd_cfg_flag & BIT(regd_alt)) { + rtw_dbg(rtwdev, RTW_DBG_REGD, + "cfg txpwr regd %d by regd %d as alternative\n", + i, regd_alt); + + rtw_cfg_txpwr_lmt_by_alt(rtwdev, i, regd_alt); + continue; + } + + rtw_dbg(rtwdev, RTW_DBG_REGD, "cfg txpwr regd %d by WW\n", i); + rtw_cfg_txpwr_lmt_by_alt(rtwdev, i, RTW_REGD_WW); + } + rtw_xref_txpwr_lmt(rtwdev); } EXPORT_SYMBOL(rtw_parse_tbl_txpwr_lmt); @@ -1482,7 +1744,7 @@ EXPORT_SYMBOL(rtw_phy_cfg_rf); static void rtw_load_rfk_table(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_dpk_info *dpk_info = &rtwdev->dm_info.dpk_info; if (!chip->rfk_init_tbl) @@ -1501,7 +1763,7 @@ static void rtw_load_rfk_table(struct rtw_dev *rtwdev) void rtw_phy_load_tables(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; u8 rf_path; rtw_load_table(rtwdev, chip->mac_tbl); @@ -1610,7 +1872,7 @@ static u8 rtw_get_channel_group(u8 channel, u8 rate) static s8 rtw_phy_get_dis_dpd_by_rate_diff(struct rtw_dev *rtwdev, u16 rate) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; s8 dpd_diff = 0; if (!chip->en_dis_dpd) @@ -1644,7 +1906,7 @@ static u8 rtw_phy_get_2g_tx_power_index(struct rtw_dev *rtwdev, enum rtw_bandwidth bandwidth, u8 rate, u8 group) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; u8 tx_power; bool mcs_rate; bool above_2ss; @@ -1691,7 +1953,7 @@ static u8 rtw_phy_get_5g_tx_power_index(struct rtw_dev *rtwdev, enum rtw_bandwidth bandwidth, u8 rate, u8 group) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; u8 tx_power; u8 upper, lower; bool mcs_rate; @@ -1740,6 +2002,25 @@ static u8 rtw_phy_get_5g_tx_power_index(struct rtw_dev *rtwdev, return tx_power; } +/* return RTW_RATE_SECTION_MAX to indicate rate is invalid */ +static u8 rtw_phy_rate_to_rate_section(u8 rate) +{ + if (rate >= DESC_RATE1M && rate <= DESC_RATE11M) + return RTW_RATE_SECTION_CCK; + else if (rate >= DESC_RATE6M && rate <= DESC_RATE54M) + return RTW_RATE_SECTION_OFDM; + else if (rate >= DESC_RATEMCS0 && rate <= DESC_RATEMCS7) + return RTW_RATE_SECTION_HT_1S; + else if (rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS15) + return RTW_RATE_SECTION_HT_2S; + else if (rate >= DESC_RATEVHT1SS_MCS0 && rate <= DESC_RATEVHT1SS_MCS9) + return RTW_RATE_SECTION_VHT_1S; + else if (rate >= DESC_RATEVHT2SS_MCS0 && rate <= DESC_RATEVHT2SS_MCS9) + return RTW_RATE_SECTION_VHT_2S; + else + return RTW_RATE_SECTION_MAX; +} + static s8 rtw_phy_get_tx_power_limit(struct rtw_dev *rtwdev, u8 band, enum rtw_bandwidth bw, u8 rf_path, u8 rate, u8 channel, u8 regd) @@ -1747,7 +2028,7 @@ static s8 rtw_phy_get_tx_power_limit(struct rtw_dev *rtwdev, u8 band, struct rtw_hal *hal = &rtwdev->hal; u8 *cch_by_bw = hal->cch_by_bw; s8 power_limit = (s8)rtwdev->chip->max_power_index; - u8 rs; + u8 rs = rtw_phy_rate_to_rate_section(rate); int ch_idx; u8 cur_bw, cur_ch; s8 cur_lmt; @@ -1755,19 +2036,7 @@ static s8 rtw_phy_get_tx_power_limit(struct rtw_dev *rtwdev, u8 band, if (regd > RTW_REGD_WW) return power_limit; - if (rate >= DESC_RATE1M && rate <= DESC_RATE11M) - rs = RTW_RATE_SECTION_CCK; - else if (rate >= DESC_RATE6M && rate <= DESC_RATE54M) - rs = RTW_RATE_SECTION_OFDM; - else if (rate >= DESC_RATEMCS0 && rate <= DESC_RATEMCS7) - rs = RTW_RATE_SECTION_HT_1S; - else if (rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS15) - rs = RTW_RATE_SECTION_HT_2S; - else if (rate >= DESC_RATEVHT1SS_MCS0 && rate <= DESC_RATEVHT1SS_MCS9) - rs = RTW_RATE_SECTION_VHT_1S; - else if (rate >= DESC_RATEVHT2SS_MCS0 && rate <= DESC_RATEVHT2SS_MCS9) - rs = RTW_RATE_SECTION_VHT_2S; - else + if (rs == RTW_RATE_SECTION_MAX) goto err; /* only 20M BW with cck and ofdm */ @@ -1801,6 +2070,29 @@ static s8 rtw_phy_get_tx_power_limit(struct rtw_dev *rtwdev, u8 band, return (s8)rtwdev->chip->max_power_index; } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 11, 0) +static s8 rtw_phy_get_tx_power_sar(struct rtw_dev *rtwdev, u8 sar_band, + u8 rf_path, u8 rate) +{ + u8 rs = rtw_phy_rate_to_rate_section(rate); + struct rtw_sar_arg arg = { + .sar_band = sar_band, + .path = rf_path, + .rs = rs, + }; + + if (rs == RTW_RATE_SECTION_MAX) + goto err; + + return rtw_query_sar(rtwdev, &arg); + +err: + WARN(1, "invalid arguments, sar_band=%d, path=%d, rate=%d\n", + sar_band, rf_path, rate); + return (s8)rtwdev->chip->max_power_index; +} +#endif + void rtw_get_tx_power_params(struct rtw_dev *rtwdev, u8 path, u8 rate, u8 bw, u8 ch, u8 regd, struct rtw_power_params *pwr_param) { @@ -1812,6 +2104,9 @@ void rtw_get_tx_power_params(struct rtw_dev *rtwdev, u8 path, u8 rate, u8 bw, s8 *offset = &pwr_param->pwr_offset; s8 *limit = &pwr_param->pwr_limit; s8 *remnant = &pwr_param->pwr_remnant; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 11, 0) + s8 *sar = &pwr_param->pwr_sar; +#endif pwr_idx = &rtwdev->efuse.txpwr_idx_table[path]; group = rtw_get_channel_group(ch, rate); @@ -1835,6 +2130,9 @@ void rtw_get_tx_power_params(struct rtw_dev *rtwdev, u8 path, u8 rate, u8 bw, rate, ch, regd); *remnant = (rate <= DESC_RATE11M ? dm_info->txagc_remnant_cck : dm_info->txagc_remnant_ofdm); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 11, 0) + *sar = rtw_phy_get_tx_power_sar(rtwdev, hal->sar_band, path, rate); +#endif } u8 @@ -1849,7 +2147,9 @@ rtw_phy_get_tx_power_index(struct rtw_dev *rtwdev, u8 rf_path, u8 rate, channel, regd, &pwr_param); tx_power = pwr_param.pwr_base; - offset = min_t(s8, pwr_param.pwr_offset, pwr_param.pwr_limit); + offset = min3(pwr_param.pwr_offset, + pwr_param.pwr_limit, + pwr_param.pwr_sar); if (rtwdev->chip->en_dis_dpd) offset += rtw_phy_get_dis_dpd_by_rate_diff(rtwdev, rate); @@ -1867,7 +2167,7 @@ static void rtw_phy_set_tx_power_index_by_rs(struct rtw_dev *rtwdev, u8 ch, u8 path, u8 rs) { struct rtw_hal *hal = &rtwdev->hal; - u8 regd = rtwdev->regd.txpwr_regd; + u8 regd = rtw_regd_get(rtwdev); u8 *rates; u8 size; u8 rate; @@ -1912,7 +2212,7 @@ static void rtw_phy_set_tx_power_level_by_path(struct rtw_dev *rtwdev, void rtw_phy_set_tx_power_level(struct rtw_dev *rtwdev, u8 channel) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_hal *hal = &rtwdev->hal; u8 path; @@ -2181,3 +2481,71 @@ bool rtw_phy_pwrtrack_need_iqk(struct rtw_dev *rtwdev) return false; } EXPORT_SYMBOL(rtw_phy_pwrtrack_need_iqk); + +static void rtw_phy_set_tx_path_by_reg(struct rtw_dev *rtwdev, + enum rtw_bb_path tx_path_sel_1ss) +{ + struct rtw_path_div *path_div = &rtwdev->dm_path_div; + enum rtw_bb_path tx_path_sel_cck = tx_path_sel_1ss; + const struct rtw_chip_info *chip = rtwdev->chip; + + if (tx_path_sel_1ss == path_div->current_tx_path) + return; + + path_div->current_tx_path = tx_path_sel_1ss; + rtw_dbg(rtwdev, RTW_DBG_PATH_DIV, "Switch TX path=%s\n", + tx_path_sel_1ss == BB_PATH_A ? "A" : "B"); + chip->ops->config_tx_path(rtwdev, rtwdev->hal.antenna_tx, + tx_path_sel_1ss, tx_path_sel_cck, false); +} + +static void rtw_phy_tx_path_div_select(struct rtw_dev *rtwdev) +{ + struct rtw_path_div *path_div = &rtwdev->dm_path_div; + enum rtw_bb_path path = path_div->current_tx_path; + s32 rssi_a = 0, rssi_b = 0; + + if (path_div->path_a_cnt) + rssi_a = path_div->path_a_sum / path_div->path_a_cnt; + else + rssi_a = 0; + if (path_div->path_b_cnt) + rssi_b = path_div->path_b_sum / path_div->path_b_cnt; + else + rssi_b = 0; + + if (rssi_a != rssi_b) + path = (rssi_a > rssi_b) ? BB_PATH_A : BB_PATH_B; + + path_div->path_a_cnt = 0; + path_div->path_a_sum = 0; + path_div->path_b_cnt = 0; + path_div->path_b_sum = 0; + rtw_phy_set_tx_path_by_reg(rtwdev, path); +} + +static void rtw_phy_tx_path_diversity_2ss(struct rtw_dev *rtwdev) +{ + if (rtwdev->hal.antenna_rx != BB_PATH_AB) { + rtw_dbg(rtwdev, RTW_DBG_PATH_DIV, + "[Return] tx_Path_en=%d, rx_Path_en=%d\n", + rtwdev->hal.antenna_tx, rtwdev->hal.antenna_rx); + return; + } + if (rtwdev->sta_cnt == 0) { + rtw_dbg(rtwdev, RTW_DBG_PATH_DIV, "No Link\n"); + return; + } + + rtw_phy_tx_path_div_select(rtwdev); +} + +void rtw_phy_tx_path_diversity(struct rtw_dev *rtwdev) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + + if (!chip->path_div_supported) + return; + + rtw_phy_tx_path_diversity_2ss(rtwdev); +} diff --git a/drivers/net/wireless/realtek/rtw88/phy.h b/drivers/net/wireless/realtek/rtw88/phy.h index 9623248c94..ccfcbd3ced 100644 --- a/drivers/net/wireless/realtek/rtw88/phy.h +++ b/drivers/net/wireless/realtek/rtw88/phy.h @@ -59,6 +59,11 @@ bool rtw_phy_pwrtrack_need_lck(struct rtw_dev *rtwdev); bool rtw_phy_pwrtrack_need_iqk(struct rtw_dev *rtwdev); void rtw_phy_config_swing_table(struct rtw_dev *rtwdev, struct rtw_swing_table *swing_table); +void rtw_phy_set_edcca_th(struct rtw_dev *rtwdev, u8 l2h, u8 h2l); +void rtw_phy_adaptivity_set_mode(struct rtw_dev *rtwdev); +void rtw_phy_parsing_cfo(struct rtw_dev *rtwdev, + struct rtw_rx_pkt_stat *pkt_stat); +void rtw_phy_tx_path_diversity(struct rtw_dev *rtwdev); struct rtw_txpwr_lmt_cfg_pair { u8 regd; @@ -109,7 +114,7 @@ const struct rtw_table name ## _tbl = { \ static inline const struct rtw_rfe_def *rtw_get_rfe_def(struct rtw_dev *rtwdev) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct rtw_efuse *efuse = &rtwdev->efuse; const struct rtw_rfe_def *rfe_def = NULL; @@ -143,6 +148,7 @@ struct rtw_power_params { s8 pwr_offset; s8 pwr_limit; s8 pwr_remnant; + s8 pwr_sar; }; void @@ -186,4 +192,7 @@ enum rtw_phy_cck_pd_lv { #define LSSI_READ_EDGE_MASK 0x80000000 #define LSSI_READ_DATA_MASK 0xfffff +#define RRSR_RATE_ORDER_MAX 0xfffff +#define RRSR_RATE_ORDER_CCK_LEN 4 + #endif diff --git a/drivers/net/wireless/realtek/rtw88/ps.c b/drivers/net/wireless/realtek/rtw88/ps.c index 7a189a9926..15454dd27f 100644 --- a/drivers/net/wireless/realtek/rtw88/ps.c +++ b/drivers/net/wireless/realtek/rtw88/ps.c @@ -18,15 +18,16 @@ static int rtw_ips_pwr_up(struct rtw_dev *rtwdev) if (ret) rtw_err(rtwdev, "leave idle state failed\n"); + rtw_coex_ips_notify(rtwdev, COEX_IPS_LEAVE); rtw_set_channel(rtwdev); - clear_bit(RTW_FLAG_INACTIVE_PS, rtwdev->flags); return ret; } int rtw_enter_ips(struct rtw_dev *rtwdev) { - set_bit(RTW_FLAG_INACTIVE_PS, rtwdev->flags); + if (!test_bit(RTW_FLAG_POWERON, rtwdev->flags)) + return 0; rtw_coex_ips_notify(rtwdev, COEX_IPS_ENTER); @@ -36,8 +37,7 @@ int rtw_enter_ips(struct rtw_dev *rtwdev) return 0; } -static void rtw_restore_port_cfg_iter(void *data, u8 *mac, - struct ieee80211_vif *vif) +static void rtw_restore_port_cfg_iter(void *data, struct ieee80211_vif *vif) { struct rtw_dev *rtwdev = data; struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; @@ -50,6 +50,9 @@ int rtw_leave_ips(struct rtw_dev *rtwdev) { int ret; + if (test_bit(RTW_FLAG_POWERON, rtwdev->flags)) + return 0; + rtw_hci_link_ps(rtwdev, false); ret = rtw_ips_pwr_up(rtwdev); @@ -58,9 +61,7 @@ int rtw_leave_ips(struct rtw_dev *rtwdev) return ret; } - rtw_iterate_vifs_atomic(rtwdev, rtw_restore_port_cfg_iter, rtwdev); - - rtw_coex_ips_notify(rtwdev, COEX_IPS_LEAVE); + rtw_iterate_vifs(rtwdev, rtw_restore_port_cfg_iter, rtwdev); return 0; } @@ -68,48 +69,42 @@ int rtw_leave_ips(struct rtw_dev *rtwdev) void rtw_power_mode_change(struct rtw_dev *rtwdev, bool enter) { u8 request, confirm, polling; - u8 polling_cnt; - u8 retry_cnt = 0; - - for (retry_cnt = 0; retry_cnt < 3; retry_cnt++) { - request = rtw_read8(rtwdev, rtwdev->hci.rpwm_addr); - confirm = rtw_read8(rtwdev, rtwdev->hci.cpwm_addr); - - /* toggle to request power mode, others remain 0 */ - request ^= request | BIT_RPWM_TOGGLE; - if (!enter) { - request |= POWER_MODE_ACK; - } else { - request |= POWER_MODE_LCLK; - if (rtw_fw_lps_deep_mode == LPS_DEEP_MODE_PG) - request |= POWER_MODE_PG; - } - - rtw_write8(rtwdev, rtwdev->hci.rpwm_addr, request); - - if (enter) - return; - - /* check confirm power mode has left power save state */ - for (polling_cnt = 0; polling_cnt < 50; polling_cnt++) { - polling = rtw_read8(rtwdev, rtwdev->hci.cpwm_addr); - if ((polling ^ confirm) & BIT_RPWM_TOGGLE) - return; - udelay(100); - } - - /* in case of fw/hw missed the request, retry */ - rtw_warn(rtwdev, "failed to leave deep PS, retry=%d\n", - retry_cnt); + int ret; + + request = rtw_read8(rtwdev, rtwdev->hci.rpwm_addr); + confirm = rtw_read8(rtwdev, rtwdev->hci.cpwm_addr); + + /* toggle to request power mode, others remain 0 */ + request ^= request | BIT_RPWM_TOGGLE; + if (enter) { + request |= POWER_MODE_LCLK; + if (rtw_get_lps_deep_mode(rtwdev) == LPS_DEEP_MODE_PG) + request |= POWER_MODE_PG; } + /* Each request require an ack from firmware */ + request |= POWER_MODE_ACK; - /* Hit here means that driver failed to change hardware power mode to - * active state after retry 3 times. If the power state is locked at - * Deep sleep, most of the hardware circuits is not working, even - * register read/write. It should be treated as fatal error and - * requires an entire analysis about the firmware/hardware - */ - WARN(1, "Hardware power state locked\n"); + if (rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_TX_WAKE)) + request |= POWER_TX_WAKE; + + rtw_write8(rtwdev, rtwdev->hci.rpwm_addr, request); + + /* Check firmware get the power requset and ack via cpwm register */ + ret = read_poll_timeout_atomic(rtw_read8, polling, + (polling ^ confirm) & BIT_RPWM_TOGGLE, + 100, 15000, true, rtwdev, + rtwdev->hci.cpwm_addr); + if (ret) { + /* Hit here means that driver failed to get an ack from firmware. + * The reason could be that hardware is locked at Deep sleep, + * so most of the hardware circuits are not working, even + * register read/write; or firmware is locked in some state and + * cannot get the request. It should be treated as fatal error + * and requires an entire analysis about the firmware/hardware. + */ + WARN(1, "firmware failed to ack driver for %s Deep Power mode\n", + enter ? "entering" : "leaving"); + } } EXPORT_SYMBOL(rtw_power_mode_change); @@ -118,7 +113,7 @@ static void __rtw_leave_lps_deep(struct rtw_dev *rtwdev) rtw_hci_deep_ps(rtwdev, false); } -static void rtw_fw_leave_lps_state_check(struct rtw_dev *rtwdev) +static int __rtw_fw_leave_lps_check_reg(struct rtw_dev *rtwdev) { int i; @@ -136,12 +131,53 @@ static void rtw_fw_leave_lps_state_check(struct rtw_dev *rtwdev) */ for (i = 0 ; i < LEAVE_LPS_TRY_CNT; i++) { if (rtw_read32_mask(rtwdev, REG_TCR, BIT_PWRMGT_HWDATA_EN) == 0) - return; + return 0; msleep(20); } - rtw_write32_mask(rtwdev, REG_TCR, BIT_PWRMGT_HWDATA_EN, 0); - rtw_warn(rtwdev, "firmware failed to restore hardware setting\n"); + return -EBUSY; +} + +static int __rtw_fw_leave_lps_check_c2h(struct rtw_dev *rtwdev) +{ + if (wait_for_completion_timeout(&rtwdev->lps_leave_check, + LEAVE_LPS_TIMEOUT)) + return 0; + return -EBUSY; +} + +static void rtw_fw_leave_lps_check(struct rtw_dev *rtwdev) +{ + bool ret = false; + struct rtw_fw_state *fw; + + if (test_bit(RTW_FLAG_WOWLAN, rtwdev->flags)) + fw = &rtwdev->wow_fw; + else + fw = &rtwdev->fw; + + if (rtw_fw_feature_check(fw, FW_FEATURE_LPS_C2H)) + ret = __rtw_fw_leave_lps_check_c2h(rtwdev); + else + ret = __rtw_fw_leave_lps_check_reg(rtwdev); + + if (ret) { + rtw_write32_clr(rtwdev, REG_TCR, BIT_PWRMGT_HWDATA_EN); + rtw_warn(rtwdev, "firmware failed to leave lps state\n"); + } +} + +static void rtw_fw_leave_lps_check_prepare(struct rtw_dev *rtwdev) +{ + struct rtw_fw_state *fw; + + if (test_bit(RTW_FLAG_WOWLAN, rtwdev->flags)) + fw = &rtwdev->wow_fw; + else + fw = &rtwdev->fw; + + if (rtw_fw_feature_check(fw, FW_FEATURE_LPS_C2H)) + reinit_completion(&rtwdev->lps_leave_check); } static void rtw_leave_lps_core(struct rtw_dev *rtwdev) @@ -154,17 +190,26 @@ static void rtw_leave_lps_core(struct rtw_dev *rtwdev) conf->smart_ps = 0; rtw_hci_link_ps(rtwdev, false); + rtw_fw_leave_lps_check_prepare(rtwdev); rtw_fw_set_pwr_mode(rtwdev); - rtw_fw_leave_lps_state_check(rtwdev); + rtw_fw_leave_lps_check(rtwdev); clear_bit(RTW_FLAG_LEISURE_PS, rtwdev->flags); rtw_coex_lps_notify(rtwdev, COEX_LPS_DISABLE); } +enum rtw_lps_deep_mode rtw_get_lps_deep_mode(struct rtw_dev *rtwdev) +{ + if (test_bit(RTW_FLAG_WOWLAN, rtwdev->flags)) + return rtwdev->lps_conf.wow_deep_mode; + else + return rtwdev->lps_conf.deep_mode; +} + static void __rtw_enter_lps_deep(struct rtw_dev *rtwdev) { - if (rtwdev->lps_conf.deep_mode == LPS_DEEP_MODE_NONE) + if (rtw_get_lps_deep_mode(rtwdev) == LPS_DEEP_MODE_NONE) return; if (!test_bit(RTW_FLAG_LEISURE_PS, rtwdev->flags)) { @@ -173,7 +218,7 @@ static void __rtw_enter_lps_deep(struct rtw_dev *rtwdev) return; } - if (rtw_fw_lps_deep_mode == LPS_DEEP_MODE_PG) + if (rtw_get_lps_deep_mode(rtwdev) == LPS_DEEP_MODE_PG) rtw_fw_set_pg_info(rtwdev); rtw_hci_deep_ps(rtwdev, true); @@ -252,3 +297,47 @@ void rtw_leave_lps_deep(struct rtw_dev *rtwdev) __rtw_leave_lps_deep(rtwdev); } + +struct rtw_vif_recalc_lps_iter_data { + struct rtw_dev *rtwdev; + struct ieee80211_vif *found_vif; + int count; +}; + +static void __rtw_vif_recalc_lps(struct rtw_vif_recalc_lps_iter_data *data, + struct ieee80211_vif *vif) +{ + if (data->count < 0) + return; + + if (vif->type != NL80211_IFTYPE_STATION) { + data->count = -1; + return; + } + + data->count++; + data->found_vif = vif; +} + +static void rtw_vif_recalc_lps_iter(void *data, struct ieee80211_vif *vif) +{ + __rtw_vif_recalc_lps(data, vif); +} + +void rtw_recalc_lps(struct rtw_dev *rtwdev, struct ieee80211_vif *new_vif) +{ + struct rtw_vif_recalc_lps_iter_data data = { .rtwdev = rtwdev }; + + if (new_vif) + __rtw_vif_recalc_lps(&data, new_vif); + rtw_iterate_vifs(rtwdev, rtw_vif_recalc_lps_iter, &data); + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) + if (data.count == 1 && data.found_vif->cfg.ps) { + rtwdev->ps_enabled = true; + } else { + rtwdev->ps_enabled = false; + rtw_leave_lps(rtwdev); + } +#endif +} diff --git a/drivers/net/wireless/realtek/rtw88/ps.h b/drivers/net/wireless/realtek/rtw88/ps.h index 19afceca7d..5ae83d2526 100644 --- a/drivers/net/wireless/realtek/rtw88/ps.h +++ b/drivers/net/wireless/realtek/rtw88/ps.h @@ -9,9 +9,11 @@ #define POWER_MODE_ACK BIT(6) #define POWER_MODE_PG BIT(4) +#define POWER_TX_WAKE BIT(1) #define POWER_MODE_LCLK BIT(0) #define LEAVE_LPS_TRY_CNT 5 +#define LEAVE_LPS_TIMEOUT msecs_to_jiffies(100) int rtw_enter_ips(struct rtw_dev *rtwdev); int rtw_leave_ips(struct rtw_dev *rtwdev); @@ -20,5 +22,7 @@ void rtw_power_mode_change(struct rtw_dev *rtwdev, bool enter); void rtw_enter_lps(struct rtw_dev *rtwdev, u8 port_id); void rtw_leave_lps(struct rtw_dev *rtwdev); void rtw_leave_lps_deep(struct rtw_dev *rtwdev); +enum rtw_lps_deep_mode rtw_get_lps_deep_mode(struct rtw_dev *rtwdev); +void rtw_recalc_lps(struct rtw_dev *rtwdev, struct ieee80211_vif *new_vif); #endif diff --git a/drivers/net/wireless/realtek/rtw88/reg.h b/drivers/net/wireless/realtek/rtw88/reg.h index 9088bfb2a3..7c6c11d50f 100644 --- a/drivers/net/wireless/realtek/rtw88/reg.h +++ b/drivers/net/wireless/realtek/rtw88/reg.h @@ -60,7 +60,7 @@ #define REG_GPIO_MUXCFG 0x0040 #define BIT_FSPI_EN BIT(19) #define BIT_EN_SIC BIT(12) -#define BIT_BT_AOD_GPIO3 BIT(9) + #define BIT_PO_BT_PTA_PINS BIT(9) #define BIT_BT_PTA_EN BIT(5) #define BIT_WLRFE_4_5_EN BIT(2) @@ -87,6 +87,7 @@ #define BIT_LTE_MUX_CTRL_PATH BIT(26) #define REG_HCI_OPT_CTRL 0x0074 #define BIT_USB_SUS_DIS BIT(8) +#define BIT_SDIO_PAD_E5 BIT(18) #define REG_AFE_CTRL_4 0x0078 #define BIT_CK320M_AFE_EN BIT(4) @@ -129,6 +130,9 @@ #define REG_MCU_TST_CFG 0x84 #define VAL_FW_TRIGGER 0x1 +#define REG_PMC_DBG_CTRL1 0xa8 +#define BITS_PMC_BT_IQK_STS GENMASK(22, 21) + #define REG_EFUSE_ACCESS 0x00CF #define EFUSE_ACCESS_ON 0x69 #define EFUSE_ACCESS_OFF 0x00 @@ -181,6 +185,10 @@ #define BIT_TXDMA_VIQ_MAP(x) \ (((x) & BIT_MASK_TXDMA_VIQ_MAP) << BIT_SHIFT_TXDMA_VIQ_MAP) #define REG_TXDMA_PQ_MAP 0x010C +#define BIT_RXDMA_ARBBW_EN BIT(0) +#define BIT_RXSHFT_EN BIT(1) +#define BIT_RXDMA_AGG_EN BIT(2) +#define BIT_TXDMA_BW_EN BIT(3) #define BIT_SHIFT_TXDMA_BEQ_MAP 8 #define BIT_MASK_TXDMA_BEQ_MAP 0x3 #define BIT_TXDMA_BEQ_MAP(x) \ @@ -279,10 +287,18 @@ #define REG_H2C_TAIL 0x0248 #define REG_H2C_READ_ADDR 0x024C #define REG_H2C_INFO 0x0254 +#define REG_RXDMA_AGG_PG_TH 0x0280 +#define BIT_RXDMA_AGG_PG_TH GENMASK(7, 0) +#define BIT_DMA_AGG_TO_V1 GENMASK(15, 8) +#define BIT_EN_PRE_CALC BIT(29) #define REG_RXPKT_NUM 0x0284 #define BIT_RXDMA_REQ BIT(19) #define BIT_RW_RELEASE BIT(18) #define BIT_RXDMA_IDLE BIT(17) +#define REG_RXDMA_STATUS 0x0288 +#define REG_RXDMA_DPR 0x028C +#define REG_RXDMA_MODE 0x0290 +#define BIT_DMA_MODE BIT(1) #define REG_RXPKTNUM 0x02B0 #define REG_INT_MIG 0x0304 @@ -306,6 +322,8 @@ #define REG_DARFRC 0x0430 #define REG_DARFRCH 0x0434 #define REG_RARFRCH 0x043C +#define REG_RRSR 0x0440 +#define BITS_RRSR_RSC GENMASK(22, 21) #define REG_ARFR0 0x0444 #define REG_ARFRH0 0x0448 #define REG_ARFR1_V1 0x044C @@ -356,9 +374,13 @@ #define REG_AGGR_BREAK_TIME 0x051A #define REG_SLOT 0x051B #define REG_TX_PTCL_CTRL 0x0520 +#define BIT_DIS_EDCCA BIT(15) #define BIT_SIFS_BK_EN BIT(12) #define REG_TXPAUSE 0x0522 +#define BIT_AC_QUEUE GENMASK(7, 0) +#define BIT_HIGH_QUEUE BIT(5) #define REG_RD_CTRL 0x0524 +#define BIT_EDCCA_MSK_CNTDOWN_EN BIT(11) #define BIT_DIS_TXOP_CFE BIT(10) #define BIT_DIS_LSIG_CFE BIT(9) #define BIT_DIS_STBC_CFE BIT(8) @@ -381,12 +403,15 @@ #define BIT_EN_FREE_CNT BIT(3) #define BIT_DIS_SECOND_CCA (BIT(0) | BIT(1)) #define REG_HIQ_NO_LMT_EN 0x5A7 +#define REG_DTIM_COUNTER_ROOT 0x5A8 #define BIT_HIQ_NO_LMT_EN_ROOT BIT(0) #define REG_TIMER0_SRC_SEL 0x05B4 #define BIT_TSFT_SEL_TIMER0 (BIT(4) | BIT(5) | BIT(6)) #define REG_TCR 0x0604 #define BIT_PWRMGT_HWDATA_EN BIT(7) +#define BIT_TCR_UPDATE_TIMIE BIT(5) +#define BIT_TCR_UPDATE_HGQMD BIT(4) #define REG_RCR 0x0608 #define BIT_APP_FCS BIT(31) #define BIT_APP_MIC BIT(30) @@ -464,11 +489,17 @@ #define REG_BT_COEX_TABLE_H3 0x06CF #define REG_BBPSF_CTRL 0x06DC -#define REG_BT_COEX_V2 0x0763 -#define BIT_GNT_BT_POLARITY BIT(4) +#define REG_BT_COEX_V2 0x0762 +#define BIT_GNT_BT_POLARITY BIT(12) #define BIT_LTE_COEX_EN BIT(7) +#define REG_BT_COEX_ENH_INTR_CTRL 0x76E +#define BIT_R_GRANTALL_WLMASK BIT(3) +#define BIT_STATIS_BT_EN BIT(2) +#define REG_BT_ACT_STATISTICS 0x0770 +#define REG_BT_ACT_STATISTICS_1 0x0774 #define REG_BT_STAT_CTRL 0x0778 #define REG_BT_TDMA_TIME 0x0790 +#define BIT_MASK_SAMPLE_RATE GENMASK(5, 0) #define REG_LTR_IDLE_LATENCY 0x0798 #define REG_LTR_ACTIVE_LATENCY 0x079C #define REG_LTR_CTRL_BASIC 0x07A4 @@ -484,6 +515,8 @@ #define REG_2ND_CCA_CTRL 0x0976 #define REG_CCK0_FAREPORT 0xa2c +#define BIT_CCK0_2RX BIT(18) +#define BIT_CCK0_MRC BIT(22) #define REG_DIS_DPD 0x0a70 #define DIS_DPD_MASK GENMASK(9, 0) @@ -507,6 +540,7 @@ #define BIT_RFE_BUF_EN BIT(3) #define REG_ANAPAR_XTAL_0 0x1040 +#define BIT_XCAP_0 GENMASK(23, 10) #define REG_CPU_DMEM_CON 0x1080 #define BIT_WL_PLATFORM_RST BIT(16) #define BIT_WL_SECURITY_CLK BIT(15) @@ -525,6 +559,7 @@ #define BIT_DDMACH0_OWN BIT(31) #define BIT_DDMACH0_CHKSUM_EN BIT(29) #define BIT_DDMACH0_CHKSUM_STS BIT(27) +#define BIT_DDMACH0_DDMA_MODE BIT(26) #define BIT_DDMACH0_RESET_CHKSUM_STS BIT(25) #define BIT_DDMACH0_CHKSUM_CONT BIT(24) #define BIT_MASK_DDMACH0_DLEN 0x3ffff @@ -619,9 +654,15 @@ #define REG_ANAPAR 0x1c30 #define BIT_ANAPAR_BTPS BIT(22) #define REG_RSTB_SEL 0x1c38 +#define BIT_DAC_OFF_ENABLE BIT(4) +#define BIT_PI_IGNORE_GNT_BT BIT(3) +#define BIT_NOMASK_TXBT_ENABLE BIT(3) #define REG_HRCV_MSG 0x1cf +#define REG_EDCCA_REPORT 0x2d38 +#define BIT_EDCCA_FLAG BIT(24) + #define REG_IGN_GNTBT4 0x4160 #define RF_MODE 0x00 @@ -630,10 +671,13 @@ #define RF_WLSEL 0x02 #define RF_DTXLOK 0x08 #define RF_CFGCH 0x18 +#define BIT_BAND GENMASK(18, 16) #define RF_RCK 0x1d #define RF_LUTWA 0x33 #define RF_LUTWD1 0x3e #define RF_LUTWD0 0x3f +#define BIT_GAIN_EXT BIT(12) +#define BIT_DATA_L GENMASK(11, 0) #define RF_T_METER 0x42 #define RF_BSPAD 0x54 #define RF_GAINTX 0x56 @@ -650,6 +694,7 @@ #define RF_RCKD 0xde #define RF_TXADBG 0xde #define RF_LUTDBG 0xdf +#define BIT_TXA_TANK BIT(4) #define RF_LUTWE2 0xee #define RF_LUTWE 0xef diff --git a/drivers/net/wireless/realtek/rtw88/regd.c b/drivers/net/wireless/realtek/rtw88/regd.c index 69744dd659..2f547cbcf6 100644 --- a/drivers/net/wireless/realtek/rtw88/regd.c +++ b/drivers/net/wireless/realtek/rtw88/regd.c @@ -7,288 +7,274 @@ #include "debug.h" #include "phy.h" -#define COUNTRY_CHPLAN_ENT(_alpha2, _chplan, _txpwr_regd) \ +#define COUNTRY_REGD_ENT(_alpha2, _regd_2g, _regd_5g) \ {.alpha2 = (_alpha2), \ - .chplan = (_chplan), \ - .txpwr_regd = (_txpwr_regd) \ + .txpwr_regd_2g = (_regd_2g), \ + .txpwr_regd_5g = (_regd_5g), \ } +#define rtw_dbg_regd_dump(_dev, _msg, _args...) \ +do { \ + struct rtw_dev *__d = (_dev); \ + const struct rtw_regd *__r = &__d->regd; \ + rtw_dbg(__d, RTW_DBG_REGD, _msg \ + "apply alpha2 %c%c, regd {%d, %d}, dfs_region %d\n",\ + ##_args, \ + __r->regulatory->alpha2[0], \ + __r->regulatory->alpha2[1], \ + __r->regulatory->txpwr_regd_2g, \ + __r->regulatory->txpwr_regd_5g, \ + __r->dfs_region); \ +} while (0) + /* If country code is not correctly defined in efuse, * use worldwide country code and txpwr regd. */ -static const struct rtw_regulatory rtw_defined_chplan = - COUNTRY_CHPLAN_ENT("00", RTW_CHPLAN_REALTEK_DEFINE, RTW_REGD_WW); - -static const struct rtw_regulatory all_chplan_map[] = { - COUNTRY_CHPLAN_ENT("AD", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("AE", RTW_CHPLAN_WORLD_ETSI2, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("AF", RTW_CHPLAN_ETSI1_ETSI4, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("AG", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("AI", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("AL", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("AM", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("AN", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("AO", RTW_CHPLAN_WORLD_ETSI6, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("AQ", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("AR", RTW_CHPLAN_FCC2_FCC7, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("AS", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("AT", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("AU", RTW_CHPLAN_WORLD_ACMA1, RTW_REGD_ACMA), - COUNTRY_CHPLAN_ENT("AW", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("AZ", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("BA", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("BB", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("BD", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("BE", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("BF", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("BG", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("BH", RTW_CHPLAN_WORLD_ETSI7, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("BI", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("BJ", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("BM", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("BN", RTW_CHPLAN_WORLD_ETSI6, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("BO", RTW_CHPLAN_WORLD_FCC7, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("BR", RTW_CHPLAN_FCC2_FCC1, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("BS", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("BT", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("BV", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("BW", RTW_CHPLAN_WORLD_ETSI2, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("BY", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("BZ", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("CA", RTW_CHPLAN_IC1_IC2, RTW_REGD_IC), - COUNTRY_CHPLAN_ENT("CC", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("CD", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("CF", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("CG", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("CH", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("CI", RTW_CHPLAN_ETSI1_ETSI4, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("CK", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("CL", RTW_CHPLAN_WORLD_CHILE1, RTW_REGD_CHILE), - COUNTRY_CHPLAN_ENT("CM", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("CN", RTW_CHPLAN_WORLD_ETSI7, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("CO", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("CR", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("CV", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("CX", RTW_CHPLAN_WORLD_ACMA1, RTW_REGD_ACMA), - COUNTRY_CHPLAN_ENT("CY", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("CZ", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("DE", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("DJ", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("DK", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("DM", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("DO", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("DZ", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("EC", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("EE", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("EG", RTW_CHPLAN_WORLD_ETSI6, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("EH", RTW_CHPLAN_WORLD_ETSI6, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("ER", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("ES", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("ET", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("FI", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("FJ", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("FK", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("FM", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("FO", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("FR", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("GA", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("GB", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("GD", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("GE", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("GF", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("GG", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("GH", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("GI", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("GL", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("GM", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("GN", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("GP", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("GQ", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("GR", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("GS", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("GT", RTW_CHPLAN_FCC2_FCC7, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("GU", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("GW", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("GY", RTW_CHPLAN_FCC1_NCC3, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("HK", RTW_CHPLAN_WORLD_ETSI2, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("HM", RTW_CHPLAN_WORLD_ACMA1, RTW_REGD_ACMA), - COUNTRY_CHPLAN_ENT("HN", RTW_CHPLAN_WORLD_FCC5, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("HR", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("HT", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("HU", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("ID", RTW_CHPLAN_ETSI1_ETSI12, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("IE", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("IL", RTW_CHPLAN_WORLD_ETSI6, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("IM", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("IN", RTW_CHPLAN_WORLD_ETSI7, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("IO", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("IQ", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("IR", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("IS", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("IT", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("JE", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("JM", RTW_CHPLAN_WORLD_FCC5, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("JO", RTW_CHPLAN_WORLD_ETSI8, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("JP", RTW_CHPLAN_MKK1_MKK1, RTW_REGD_MKK), - COUNTRY_CHPLAN_ENT("KE", RTW_CHPLAN_WORLD_ETSI6, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("KG", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("KH", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("KI", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("KM", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("KN", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("KR", RTW_CHPLAN_KCC1_KCC3, RTW_REGD_KCC), - COUNTRY_CHPLAN_ENT("KW", RTW_CHPLAN_WORLD_ETSI6, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("KY", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("KZ", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("LA", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("LB", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("LC", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("LI", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("LK", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("LR", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("LS", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("LT", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("LU", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("LV", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("LY", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("MA", RTW_CHPLAN_WORLD_ETSI6, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("MC", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("MD", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("ME", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("MF", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("MG", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("MH", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("MK", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("ML", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("MM", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("MN", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("MO", RTW_CHPLAN_WORLD_ETSI2, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("MP", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("MQ", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("MR", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("MS", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("MT", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("MU", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("MV", RTW_CHPLAN_WORLD_ETSI6, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("MW", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("MX", RTW_CHPLAN_FCC2_FCC7, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("MY", RTW_CHPLAN_WORLD_ETSI15, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("MZ", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("NA", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("NC", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("NE", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("NF", RTW_CHPLAN_WORLD_ACMA1, RTW_REGD_ACMA), - COUNTRY_CHPLAN_ENT("NG", RTW_CHPLAN_WORLD_ETSI20, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("NI", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("NL", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("NO", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("NP", RTW_CHPLAN_WORLD_ETSI7, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("NR", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("NU", RTW_CHPLAN_WORLD_ACMA1, RTW_REGD_ACMA), - COUNTRY_CHPLAN_ENT("NZ", RTW_CHPLAN_WORLD_ACMA1, RTW_REGD_ACMA), - COUNTRY_CHPLAN_ENT("OM", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("PA", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("PE", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("PF", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("PG", RTW_CHPLAN_WORLD_ETSI2, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("PH", RTW_CHPLAN_WORLD_ETSI2, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("PK", RTW_CHPLAN_WORLD_ETSI10, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("PL", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("PM", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("PR", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("PT", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("PW", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("PY", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("QA", RTW_CHPLAN_WORLD_ETSI2, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("RE", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("RO", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("RS", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("RU", RTW_CHPLAN_WORLD_ETSI14, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("RW", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("SA", RTW_CHPLAN_WORLD_ETSI2, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("SB", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("SC", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("SE", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("SG", RTW_CHPLAN_WORLD_ETSI2, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("SH", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("SI", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("SJ", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("SK", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("SL", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("SM", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("SN", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("SO", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("SR", RTW_CHPLAN_FCC2_FCC17, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("ST", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("SV", RTW_CHPLAN_WORLD_FCC3, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("SX", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("SZ", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("TC", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("TD", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("TF", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("TG", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("TH", RTW_CHPLAN_WORLD_ETSI2, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("TJ", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("TK", RTW_CHPLAN_WORLD_ACMA1, RTW_REGD_ACMA), - COUNTRY_CHPLAN_ENT("TM", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("TN", RTW_CHPLAN_WORLD_ETSI6, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("TO", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("TR", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("TT", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("TV", RTW_CHPLAN_ETSI1_NULL, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("TW", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("TZ", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("UA", RTW_CHPLAN_WORLD_ETSI3, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("UG", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("US", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("UY", RTW_CHPLAN_WORLD_FCC3, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("UZ", RTW_CHPLAN_WORLD_ETSI6, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("VA", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("VC", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("VE", RTW_CHPLAN_WORLD_FCC3, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("VG", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("VI", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("VN", RTW_CHPLAN_WORLD_ETSI2, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("VU", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("WF", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("WS", RTW_CHPLAN_FCC2_FCC11, RTW_REGD_FCC), - COUNTRY_CHPLAN_ENT("YE", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("YT", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("ZA", RTW_CHPLAN_WORLD_ETSI2, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("ZM", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), - COUNTRY_CHPLAN_ENT("ZW", RTW_CHPLAN_WORLD_ETSI1, RTW_REGD_ETSI), +static const struct rtw_regulatory rtw_reg_ww = + COUNTRY_REGD_ENT("00", RTW_REGD_WW, RTW_REGD_WW); + +static const struct rtw_regulatory rtw_reg_map[] = { + COUNTRY_REGD_ENT("AD", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("AE", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("AF", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("AG", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("AI", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("AL", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("AM", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("AN", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("AO", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("AQ", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("AR", RTW_REGD_MEXICO, RTW_REGD_MEXICO), + COUNTRY_REGD_ENT("AS", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("AT", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("AU", RTW_REGD_ACMA, RTW_REGD_ACMA), + COUNTRY_REGD_ENT("AW", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("AZ", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("BA", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("BB", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("BD", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("BE", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("BF", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("BG", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("BH", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("BI", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("BJ", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("BM", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("BN", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("BO", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("BR", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("BS", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("BT", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("BV", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("BW", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("BY", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("BZ", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("CA", RTW_REGD_IC, RTW_REGD_IC), + COUNTRY_REGD_ENT("CC", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("CD", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("CF", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("CG", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("CH", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("CI", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("CK", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("CL", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("CM", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("CN", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("CO", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("CR", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("CV", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("CX", RTW_REGD_ACMA, RTW_REGD_ACMA), + COUNTRY_REGD_ENT("CY", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("CZ", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("DE", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("DJ", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("DK", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("DM", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("DO", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("DZ", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("EC", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("EE", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("EG", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("EH", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("ER", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("ES", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("ET", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("FI", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("FJ", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("FK", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("FM", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("FO", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("FR", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("GA", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("GB", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("GD", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("GE", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("GF", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("GG", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("GH", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("GI", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("GL", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("GM", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("GN", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("GP", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("GQ", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("GR", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("GS", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("GT", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("GU", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("GW", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("GY", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("HK", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("HM", RTW_REGD_ACMA, RTW_REGD_ACMA), + COUNTRY_REGD_ENT("HN", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("HR", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("HT", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("HU", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("ID", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("IE", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("IL", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("IM", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("IN", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("IO", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("IQ", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("IR", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("IS", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("IT", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("JE", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("JM", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("JO", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("JP", RTW_REGD_MKK, RTW_REGD_MKK), + COUNTRY_REGD_ENT("KE", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("KG", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("KH", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("KI", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("KM", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("KN", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("KR", RTW_REGD_KCC, RTW_REGD_KCC), + COUNTRY_REGD_ENT("KW", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("KY", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("KZ", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("LA", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("LB", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("LC", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("LI", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("LK", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("LR", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("LS", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("LT", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("LU", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("LV", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("LY", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("MA", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("MC", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("MD", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("ME", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("MF", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("MG", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("MH", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("MK", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("ML", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("MM", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("MN", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("MO", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("MP", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("MQ", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("MR", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("MS", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("MT", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("MU", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("MV", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("MW", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("MX", RTW_REGD_MEXICO, RTW_REGD_MEXICO), + COUNTRY_REGD_ENT("MY", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("MZ", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("NA", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("NC", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("NE", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("NF", RTW_REGD_ACMA, RTW_REGD_ACMA), + COUNTRY_REGD_ENT("NG", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("NI", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("NL", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("NO", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("NP", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("NR", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("NU", RTW_REGD_ACMA, RTW_REGD_ACMA), + COUNTRY_REGD_ENT("NZ", RTW_REGD_ACMA, RTW_REGD_ACMA), + COUNTRY_REGD_ENT("OM", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("PA", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("PE", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("PF", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("PG", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("PH", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("PK", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("PL", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("PM", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("PR", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("PS", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("PT", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("PW", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("PY", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("QA", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("RE", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("RO", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("RS", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("RU", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("RW", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("SA", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("SB", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("SC", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("SE", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("SG", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("SH", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("SI", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("SJ", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("SK", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("SL", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("SM", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("SN", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("SO", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("SR", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("ST", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("SV", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("SX", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("SZ", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("TC", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("TD", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("TF", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("TG", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("TH", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("TJ", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("TK", RTW_REGD_ACMA, RTW_REGD_ACMA), + COUNTRY_REGD_ENT("TM", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("TN", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("TO", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("TR", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("TT", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("TV", RTW_REGD_ETSI, RTW_REGD_WW), + COUNTRY_REGD_ENT("TW", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("TZ", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("UA", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("UG", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("US", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("UY", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("UZ", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("VA", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("VC", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("VE", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("VG", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("VI", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("VN", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("VU", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("WF", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("WS", RTW_REGD_FCC, RTW_REGD_FCC), + COUNTRY_REGD_ENT("XK", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("YE", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("YT", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("ZA", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("ZM", RTW_REGD_ETSI, RTW_REGD_ETSI), + COUNTRY_REGD_ENT("ZW", RTW_REGD_ETSI, RTW_REGD_ETSI), }; -static void rtw_regd_apply_beaconing_flags(struct wiphy *wiphy, - enum nl80211_reg_initiator initiator) -{ - enum nl80211_band band; - struct ieee80211_supported_band *sband; - const struct ieee80211_reg_rule *reg_rule; - struct ieee80211_channel *ch; - unsigned int i; - - for (band = 0; band < NUM_NL80211_BANDS; band++) { - if (!wiphy->bands[band]) - continue; - - sband = wiphy->bands[band]; - for (i = 0; i < sband->n_channels; i++) { - ch = &sband->channels[i]; - - reg_rule = freq_reg_info(wiphy, - MHZ_TO_KHZ(ch->center_freq)); - if (IS_ERR(reg_rule)) - continue; - - ch->flags &= ~IEEE80211_CHAN_DISABLED; - - if (!(reg_rule->flags & NL80211_RRF_NO_IR)) - ch->flags &= ~IEEE80211_CHAN_NO_IR; - } - } -} - static void rtw_regd_apply_hw_cap_flags(struct wiphy *wiphy) { struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); @@ -321,78 +307,225 @@ static void rtw_regd_apply_hw_cap_flags(struct wiphy *wiphy) } } -static void rtw_regd_apply_world_flags(struct wiphy *wiphy, - enum nl80211_reg_initiator initiator) +static bool rtw_reg_is_ww(const struct rtw_regulatory *reg) { - rtw_regd_apply_beaconing_flags(wiphy, initiator); + return reg == &rtw_reg_ww; } -static struct rtw_regulatory rtw_regd_find_reg_by_name(char *alpha2) +static bool rtw_reg_match(const struct rtw_regulatory *reg, const char *alpha2) +{ + return memcmp(reg->alpha2, alpha2, 2) == 0; +} + +static const struct rtw_regulatory *rtw_reg_find_by_name(const char *alpha2) { unsigned int i; - for (i = 0; i < ARRAY_SIZE(all_chplan_map); i++) { - if (!memcmp(all_chplan_map[i].alpha2, alpha2, 2)) - return all_chplan_map[i]; + for (i = 0; i < ARRAY_SIZE(rtw_reg_map); i++) { + if (rtw_reg_match(&rtw_reg_map[i], alpha2)) + return &rtw_reg_map[i]; } - return rtw_defined_chplan; + return &rtw_reg_ww; } -static int rtw_regd_notifier_apply(struct rtw_dev *rtwdev, - struct wiphy *wiphy, - struct regulatory_request *request) +static +void rtw_regd_notifier(struct wiphy *wiphy, struct regulatory_request *request); + +/* call this before ieee80211_register_hw() */ +int rtw_regd_init(struct rtw_dev *rtwdev) { - if (request->initiator == NL80211_REGDOM_SET_BY_USER) - return 0; - rtwdev->regd = rtw_regd_find_reg_by_name(request->alpha2); - rtw_regd_apply_world_flags(wiphy, request->initiator); + struct wiphy *wiphy = rtwdev->hw->wiphy; + const struct rtw_regulatory *chip_reg; - return 0; -} + if (!wiphy) + return -EINVAL; -static int -rtw_regd_init_wiphy(struct rtw_regulatory *reg, struct wiphy *wiphy, - void (*reg_notifier)(struct wiphy *wiphy, - struct regulatory_request *request)) -{ - wiphy->reg_notifier = reg_notifier; + wiphy->reg_notifier = rtw_regd_notifier; - wiphy->regulatory_flags &= ~REGULATORY_CUSTOM_REG; - wiphy->regulatory_flags &= ~REGULATORY_STRICT_REG; - wiphy->regulatory_flags &= ~REGULATORY_DISABLE_BEACON_HINTS; + chip_reg = rtw_reg_find_by_name(rtwdev->efuse.country_code); + if (!rtw_reg_is_ww(chip_reg)) { + rtwdev->regd.state = RTW_REGD_STATE_PROGRAMMED; - rtw_regd_apply_hw_cap_flags(wiphy); + /* Set REGULATORY_STRICT_REG before ieee80211_register_hw(), + * stack will wait for regulatory_hint() and consider it + * as the superset for our regulatory rule. + */ + wiphy->regulatory_flags |= REGULATORY_STRICT_REG; + wiphy->regulatory_flags |= REGULATORY_COUNTRY_IE_IGNORE; + } else { + rtwdev->regd.state = RTW_REGD_STATE_WORLDWIDE; + } + rtwdev->regd.regulatory = &rtw_reg_ww; + rtwdev->regd.dfs_region = NL80211_DFS_UNSET; + rtw_dbg_regd_dump(rtwdev, "regd init state %d: ", rtwdev->regd.state); + + rtw_regd_apply_hw_cap_flags(wiphy); return 0; } -int rtw_regd_init(struct rtw_dev *rtwdev, - void (*reg_notifier)(struct wiphy *wiphy, - struct regulatory_request *request)) +/* call this after ieee80211_register_hw() */ +int rtw_regd_hint(struct rtw_dev *rtwdev) { struct wiphy *wiphy = rtwdev->hw->wiphy; + int ret; if (!wiphy) return -EINVAL; - rtwdev->regd = rtw_regd_find_reg_by_name(rtwdev->efuse.country_code); - rtw_regd_init_wiphy(&rtwdev->regd, wiphy, reg_notifier); + if (rtwdev->regd.state == RTW_REGD_STATE_PROGRAMMED) { + rtw_dbg(rtwdev, RTW_DBG_REGD, + "country domain %c%c is PGed on efuse", + rtwdev->efuse.country_code[0], + rtwdev->efuse.country_code[1]); + + ret = regulatory_hint(wiphy, rtwdev->efuse.country_code); + if (ret) { + rtw_warn(rtwdev, + "failed to hint regulatory: %d\n", ret); + return ret; + } + } return 0; } +static bool rtw_regd_mgmt_worldwide(struct rtw_dev *rtwdev, + struct rtw_regd *next_regd, + struct regulatory_request *request) +{ + struct wiphy *wiphy = rtwdev->hw->wiphy; + + next_regd->state = RTW_REGD_STATE_WORLDWIDE; + + if (request->initiator == NL80211_REGDOM_SET_BY_USER && + !rtw_reg_is_ww(next_regd->regulatory)) { + next_regd->state = RTW_REGD_STATE_SETTING; + wiphy->regulatory_flags |= REGULATORY_COUNTRY_IE_IGNORE; + } + + return true; +} + +static bool rtw_regd_mgmt_programmed(struct rtw_dev *rtwdev, + struct rtw_regd *next_regd, + struct regulatory_request *request) +{ + if (request->initiator == NL80211_REGDOM_SET_BY_DRIVER && + rtw_reg_match(next_regd->regulatory, rtwdev->efuse.country_code)) { + next_regd->state = RTW_REGD_STATE_PROGRAMMED; + return true; + } + + return false; +} + +static bool rtw_regd_mgmt_setting(struct rtw_dev *rtwdev, + struct rtw_regd *next_regd, + struct regulatory_request *request) +{ + struct wiphy *wiphy = rtwdev->hw->wiphy; + + if (request->initiator != NL80211_REGDOM_SET_BY_USER) + return false; + + next_regd->state = RTW_REGD_STATE_SETTING; + + if (rtw_reg_is_ww(next_regd->regulatory)) { + next_regd->state = RTW_REGD_STATE_WORLDWIDE; + wiphy->regulatory_flags &= ~REGULATORY_COUNTRY_IE_IGNORE; + } + + return true; +} + +static bool (*const rtw_regd_handler[RTW_REGD_STATE_NR]) + (struct rtw_dev *, struct rtw_regd *, struct regulatory_request *) = { + [RTW_REGD_STATE_WORLDWIDE] = rtw_regd_mgmt_worldwide, + [RTW_REGD_STATE_PROGRAMMED] = rtw_regd_mgmt_programmed, + [RTW_REGD_STATE_SETTING] = rtw_regd_mgmt_setting, +}; + +static bool rtw_regd_state_hdl(struct rtw_dev *rtwdev, + struct rtw_regd *next_regd, + struct regulatory_request *request) +{ + next_regd->regulatory = rtw_reg_find_by_name(request->alpha2); + next_regd->dfs_region = request->dfs_region; + return rtw_regd_handler[rtwdev->regd.state](rtwdev, next_regd, request); +} + +static void rtw_regd_notifier(struct wiphy *wiphy, struct regulatory_request *request) { struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); struct rtw_dev *rtwdev = hw->priv; struct rtw_hal *hal = &rtwdev->hal; + struct rtw_regd next_regd = {0}; + bool hdl; + + hdl = rtw_regd_state_hdl(rtwdev, &next_regd, request); + if (!hdl) { + rtw_dbg(rtwdev, RTW_DBG_REGD, + "regd state %d: ignore request %c%c of initiator %d\n", + rtwdev->regd.state, + request->alpha2[0], + request->alpha2[1], + request->initiator); + return; + } + + rtw_dbg(rtwdev, RTW_DBG_REGD, "regd state: %d -> %d\n", + rtwdev->regd.state, next_regd.state); - rtw_regd_notifier_apply(rtwdev, wiphy, request); - rtw_dbg(rtwdev, RTW_DBG_REGD, - "get alpha2 %c%c from initiator %d, mapping to chplan 0x%x, txregd %d\n", - request->alpha2[0], request->alpha2[1], request->initiator, - rtwdev->regd.chplan, rtwdev->regd.txpwr_regd); + mutex_lock(&rtwdev->mutex); + rtwdev->regd = next_regd; + rtw_dbg_regd_dump(rtwdev, "get alpha2 %c%c from initiator %d: ", + request->alpha2[0], + request->alpha2[1], + request->initiator); + rtw_phy_adaptivity_set_mode(rtwdev); rtw_phy_set_tx_power_level(rtwdev, hal->current_channel); + mutex_unlock(&rtwdev->mutex); +} + +u8 rtw_regd_get(struct rtw_dev *rtwdev) +{ + struct rtw_hal *hal = &rtwdev->hal; + u8 band = hal->current_band_type; + + return band == RTW_BAND_2G ? + rtwdev->regd.regulatory->txpwr_regd_2g : + rtwdev->regd.regulatory->txpwr_regd_5g; +} +EXPORT_SYMBOL(rtw_regd_get); + +struct rtw_regd_alternative_t { + bool set; + u8 alt; +}; + +#define DECL_REGD_ALT(_regd, _regd_alt) \ + [(_regd)] = {.set = true, .alt = (_regd_alt)} + +static const struct rtw_regd_alternative_t +rtw_regd_alt[RTW_REGD_MAX] = { + DECL_REGD_ALT(RTW_REGD_IC, RTW_REGD_FCC), + DECL_REGD_ALT(RTW_REGD_KCC, RTW_REGD_ETSI), + DECL_REGD_ALT(RTW_REGD_ACMA, RTW_REGD_ETSI), + DECL_REGD_ALT(RTW_REGD_CHILE, RTW_REGD_FCC), + DECL_REGD_ALT(RTW_REGD_UKRAINE, RTW_REGD_ETSI), + DECL_REGD_ALT(RTW_REGD_MEXICO, RTW_REGD_FCC), + DECL_REGD_ALT(RTW_REGD_CN, RTW_REGD_ETSI), +}; + +bool rtw_regd_has_alt(u8 regd, u8 *regd_alt) +{ + if (!rtw_regd_alt[regd].set) + return false; + + *regd_alt = rtw_regd_alt[regd].alt; + return true; } diff --git a/drivers/net/wireless/realtek/rtw88/regd.h b/drivers/net/wireless/realtek/rtw88/regd.h index 5d45783317..34cb13d0cd 100644 --- a/drivers/net/wireless/realtek/rtw88/regd.h +++ b/drivers/net/wireless/realtek/rtw88/regd.h @@ -64,8 +64,8 @@ enum country_code_type { COUNTRY_CODE_MAX }; -int rtw_regd_init(struct rtw_dev *rtwdev, - void (*reg_notifier)(struct wiphy *wiphy, - struct regulatory_request *request)); -void rtw_regd_notifier(struct wiphy *wiphy, struct regulatory_request *request); +int rtw_regd_init(struct rtw_dev *rtwdev); +int rtw_regd_hint(struct rtw_dev *rtwdev); +u8 rtw_regd_get(struct rtw_dev *rtwdev); +bool rtw_regd_has_alt(u8 regd, u8 *regd_alt); #endif diff --git a/drivers/net/wireless/realtek/rtw88/rtw8723d.c b/drivers/net/wireless/realtek/rtw88/rtw8723d.c index 3ddd170f16..c575476a00 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8723d.c +++ b/drivers/net/wireless/realtek/rtw88/rtw8723d.c @@ -60,8 +60,8 @@ static const struct rtw_hw_reg rtw8723d_txagc[] = { #define WLAN_MAX_AGG_NR 0x0A #define WLAN_AMPDU_MAX_TIME 0x1C #define WLAN_ANT_SEL 0x82 -#define WLAN_LTR_IDLE_LAT 0x883C883C -#define WLAN_LTR_ACT_LAT 0x880B880B +#define WLAN_LTR_IDLE_LAT 0x90039003 +#define WLAN_LTR_ACT_LAT 0x883c883c #define WLAN_LTR_CTRL1 0xCB004010 #define WLAN_LTR_CTRL2 0x01233425 @@ -192,6 +192,7 @@ static void rtw8723d_phy_set_param(struct rtw_dev *rtwdev) rtw_write32(rtwdev, REG_LTR_CTRL_BASIC + 4, WLAN_LTR_CTRL2); rtw_phy_init(rtwdev); + rtwdev->dm_info.cck_pd_default = rtw_read8(rtwdev, REG_CSRATIO) & 0x1f; rtw_write16_set(rtwdev, REG_TXDMA_OFFSET_CHK, BIT_DROP_DATA_EN); @@ -209,6 +210,18 @@ static void rtw8723de_efuse_parsing(struct rtw_efuse *efuse, ether_addr_copy(efuse->addr, map->e.mac_addr); } +static void rtw8723du_efuse_parsing(struct rtw_efuse *efuse, + struct rtw8723d_efuse *map) +{ + ether_addr_copy(efuse->addr, map->u.mac_addr); +} + +static void rtw8723ds_efuse_parsing(struct rtw_efuse *efuse, + struct rtw8723d_efuse *map) +{ + ether_addr_copy(efuse->addr, map->s.mac_addr); +} + static int rtw8723d_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) { struct rtw_efuse *efuse = &rtwdev->efuse; @@ -238,6 +251,12 @@ static int rtw8723d_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) case RTW_HCI_TYPE_PCIE: rtw8723de_efuse_parsing(efuse, map); break; + case RTW_HCI_TYPE_USB: + rtw8723du_efuse_parsing(efuse, map); + break; + case RTW_HCI_TYPE_SDIO: + rtw8723ds_efuse_parsing(efuse, map); + break; default: /* unsupported now */ return -ENOTSUPP; @@ -1498,6 +1517,34 @@ static void rtw8723d_phy_calibration(struct rtw_dev *rtwdev) rtw_dbg(rtwdev, RTW_DBG_RFK, "[IQK] finished\n"); } +static void rtw8723d_phy_cck_pd_set(struct rtw_dev *rtwdev, u8 new_lvl) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + u8 pd[CCK_PD_LV_MAX] = {3, 7, 13, 13, 13}; + u8 cck_n_rx; + + rtw_dbg(rtwdev, RTW_DBG_PHY, "lv: (%d) -> (%d)\n", + dm_info->cck_pd_lv[RTW_CHANNEL_WIDTH_20][RF_PATH_A], new_lvl); + + if (dm_info->cck_pd_lv[RTW_CHANNEL_WIDTH_20][RF_PATH_A] == new_lvl) + return; + + cck_n_rx = (rtw_read8_mask(rtwdev, REG_CCK0_FAREPORT, BIT_CCK0_2RX) && + rtw_read8_mask(rtwdev, REG_CCK0_FAREPORT, BIT_CCK0_MRC)) ? 2 : 1; + rtw_dbg(rtwdev, RTW_DBG_PHY, + "is_linked=%d, lv=%d, n_rx=%d, cs_ratio=0x%x, pd_th=0x%x, cck_fa_avg=%d\n", + rtw_is_assoc(rtwdev), new_lvl, cck_n_rx, + dm_info->cck_pd_default + new_lvl * 2, + pd[new_lvl], dm_info->cck_fa_avg); + + dm_info->cck_fa_avg = CCK_FA_AVG_RESET; + + dm_info->cck_pd_lv[RTW_CHANNEL_WIDTH_20][RF_PATH_A] = new_lvl; + rtw_write32_mask(rtwdev, REG_PWRTH, 0x3f0000, pd[new_lvl]); + rtw_write32_mask(rtwdev, REG_PWRTH2, 0x1f0000, + dm_info->cck_pd_default + new_lvl * 2); +} + /* for coex */ static void rtw8723d_coex_cfg_init(struct rtw_dev *rtwdev) { @@ -1506,14 +1553,14 @@ static void rtw8723d_coex_cfg_init(struct rtw_dev *rtwdev) /* BT report packet sample rate */ /* 0x790[5:0]=0x5 */ - rtw_write8_set(rtwdev, REG_BT_TDMA_TIME, 0x05); + rtw_write8_mask(rtwdev, REG_BT_TDMA_TIME, BIT_MASK_SAMPLE_RATE, 0x5); /* enable BT counter statistics */ rtw_write8(rtwdev, REG_BT_STAT_CTRL, 0x1); /* enable PTA (3-wire function form BT side) */ rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_BT_PTA_EN); - rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_BT_AOD_GPIO3); + rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_PO_BT_PTA_PINS); /* enable PTA (tx/rx signal form WiFi side) */ rtw_write8_set(rtwdev, REG_QUEUE_CTRL, BIT_PTA_WL_TX_EN); @@ -1916,6 +1963,26 @@ static void rtw8723d_pwr_track(struct rtw_dev *rtwdev) dm_info->pwr_trk_triggered = false; } +static void rtw8723d_fill_txdesc_checksum(struct rtw_dev *rtwdev, + struct rtw_tx_pkt_info *pkt_info, + u8 *txdesc) +{ + size_t words = 32 / 2; /* calculate the first 32 bytes (16 words) */ + __le16 chksum = 0; + __le16 *data = (__le16 *)(txdesc); + struct rtw_tx_desc *tx_desc = (struct rtw_tx_desc *)txdesc; + + le32p_replace_bits(&tx_desc->w7, 0, RTW_TX_DESC_W7_TXDESC_CHECKSUM); + + while (words--) + chksum ^= *data++; + + chksum = ~chksum; + + le32p_replace_bits(&tx_desc->w7, __le16_to_cpu(chksum), + RTW_TX_DESC_W7_TXDESC_CHECKSUM); +} + static struct rtw_chip_ops rtw8723d_ops = { .phy_set_param = rtw8723d_phy_set_param, .read_efuse = rtw8723d_read_efuse, @@ -1931,10 +1998,12 @@ static struct rtw_chip_ops rtw8723d_ops = { .efuse_grant = rtw8723d_efuse_grant, .false_alarm_statistics = rtw8723d_false_alarm_statistics, .phy_calibration = rtw8723d_phy_calibration, + .cck_pd_set = rtw8723d_phy_cck_pd_set, .pwr_track = rtw8723d_pwr_track, .config_bfee = NULL, .set_gid_table = NULL, .cfg_csi_rate = NULL, + .fill_txdesc_checksum = rtw8723d_fill_txdesc_checksum, .coex_set_init = rtw8723d_coex_cfg_init, .coex_set_ant_switch = NULL, @@ -1949,19 +2018,19 @@ static struct rtw_chip_ops rtw8723d_ops = { static const struct coex_table_para table_sant_8723d[] = { {0xffffffff, 0xffffffff}, /* case-0 */ {0x55555555, 0x55555555}, - {0x65555555, 0x65555555}, + {0x66555555, 0x66555555}, {0xaaaaaaaa, 0xaaaaaaaa}, {0x5a5a5a5a, 0x5a5a5a5a}, {0xfafafafa, 0xfafafafa}, /* case-5 */ - {0xa5555555, 0xaaaa5aaa}, - {0x6a5a5a5a, 0x5a5a5a5a}, + {0x6a5a5555, 0xaaaaaaaa}, + {0x6a5a56aa, 0x6a5a56aa}, {0x6a5a5a5a, 0x6a5a5a5a}, {0x66555555, 0x5a5a5a5a}, - {0x65555555, 0x6a5a5a5a}, /* case-10 */ - {0x65555555, 0xfafafafa}, + {0x66555555, 0x6a5a5a5a}, /* case-10 */ + {0x66555555, 0x6a5a5aaa}, {0x66555555, 0x5a5a5aaa}, - {0x65555555, 0x5aaa5aaa}, - {0x65555555, 0xaaaa5aaa}, + {0x66555555, 0x6aaa5aaa}, + {0x66555555, 0xaaaa5aaa}, {0x66555555, 0xaaaaaaaa}, /* case-15 */ {0xffff55ff, 0xfafafafa}, {0xffff55ff, 0x6afa5afa}, @@ -1970,38 +2039,41 @@ static const struct coex_table_para table_sant_8723d[] = { {0xaa5555aa, 0x6a5a5a5a}, /* case-20 */ {0xaa5555aa, 0xaaaaaaaa}, {0xffffffff, 0x5a5a5a5a}, - {0xffffffff, 0x6a5a5a5a}, + {0xffffffff, 0x5a5a5a5a}, {0xffffffff, 0x55555555}, - {0xffffffff, 0x6a5a5aaa}, /* case-25 */ + {0xffffffff, 0x5a5a5aaa}, /* case-25 */ {0x55555555, 0x5a5a5a5a}, {0x55555555, 0xaaaaaaaa}, - {0x55555555, 0x6a6a6a6a}, - {0x656a656a, 0x656a656a} + {0x55555555, 0x6a5a6a5a}, + {0x66556655, 0x66556655}, + {0x66556aaa, 0x6a5a6aaa}, /* case-30 */ + {0xffffffff, 0x5aaa5aaa}, + {0x56555555, 0x5a5a5aaa}, }; /* Non-Shared-Antenna Coex Table */ static const struct coex_table_para table_nsant_8723d[] = { {0xffffffff, 0xffffffff}, /* case-100 */ {0x55555555, 0x55555555}, - {0x65555555, 0x65555555}, + {0x66555555, 0x66555555}, {0xaaaaaaaa, 0xaaaaaaaa}, {0x5a5a5a5a, 0x5a5a5a5a}, {0xfafafafa, 0xfafafafa}, /* case-105 */ {0x5afa5afa, 0x5afa5afa}, {0x55555555, 0xfafafafa}, - {0x65555555, 0xfafafafa}, - {0x65555555, 0x5a5a5a5a}, - {0x65555555, 0x6a5a5a5a}, /* case-110 */ - {0x65555555, 0xaaaaaaaa}, + {0x66555555, 0xfafafafa}, + {0x66555555, 0x5a5a5a5a}, + {0x66555555, 0x6a5a5a5a}, /* case-110 */ + {0x66555555, 0xaaaaaaaa}, {0xffff55ff, 0xfafafafa}, {0xffff55ff, 0x5afa5afa}, {0xffff55ff, 0xaaaaaaaa}, - {0xaaffffaa, 0xfafafafa}, /* case-115 */ + {0xffff55ff, 0xffff55ff}, /* case-115 */ {0xaaffffaa, 0x5afa5afa}, {0xaaffffaa, 0xaaaaaaaa}, {0xffffffff, 0xfafafafa}, {0xffffffff, 0x5afa5afa}, - {0xffffffff, 0xaaaaaaaa},/* case-120 */ + {0xffffffff, 0xaaaaaaaa}, /* case-120 */ {0x55ff55ff, 0x5afa5afa}, {0x55ff55ff, 0xaaaaaaaa}, {0x55ff55ff, 0x55ff55ff} @@ -2009,31 +2081,31 @@ static const struct coex_table_para table_nsant_8723d[] = { /* Shared-Antenna TDMA */ static const struct coex_tdma_para tdma_sant_8723d[] = { - { {0x08, 0x00, 0x00, 0x00, 0x00} }, /* case-0 */ + { {0x00, 0x00, 0x00, 0x00, 0x00} }, /* case-0 */ { {0x61, 0x45, 0x03, 0x11, 0x11} }, /* case-1 */ { {0x61, 0x3a, 0x03, 0x11, 0x11} }, - { {0x61, 0x20, 0x03, 0x11, 0x11} }, { {0x61, 0x30, 0x03, 0x11, 0x11} }, + { {0x61, 0x20, 0x03, 0x11, 0x11} }, { {0x61, 0x10, 0x03, 0x11, 0x11} }, /* case-5 */ - { {0x61, 0x48, 0x03, 0x11, 0x10} }, + { {0x61, 0x45, 0x03, 0x11, 0x10} }, { {0x61, 0x3a, 0x03, 0x11, 0x10} }, { {0x61, 0x30, 0x03, 0x11, 0x10} }, { {0x61, 0x20, 0x03, 0x11, 0x10} }, { {0x61, 0x10, 0x03, 0x11, 0x10} }, /* case-10 */ - { {0x61, 0x10, 0x03, 0x11, 0x14} }, + { {0x61, 0x08, 0x03, 0x11, 0x14} }, { {0x61, 0x08, 0x03, 0x10, 0x14} }, - { {0x51, 0x10, 0x03, 0x10, 0x54} }, - { {0x51, 0x10, 0x03, 0x10, 0x55} }, - { {0x51, 0x10, 0x07, 0x10, 0x54} }, /* case-15 */ + { {0x51, 0x08, 0x03, 0x10, 0x54} }, + { {0x51, 0x08, 0x03, 0x10, 0x55} }, + { {0x51, 0x08, 0x07, 0x10, 0x54} }, /* case-15 */ { {0x51, 0x45, 0x03, 0x10, 0x50} }, { {0x51, 0x3a, 0x03, 0x10, 0x50} }, { {0x51, 0x30, 0x03, 0x10, 0x50} }, { {0x51, 0x20, 0x03, 0x10, 0x50} }, - { {0x51, 0x15, 0x03, 0x10, 0x50} }, /* case-20 */ + { {0x51, 0x10, 0x03, 0x10, 0x50} }, /* case-20 */ { {0x51, 0x4a, 0x03, 0x10, 0x50} }, { {0x51, 0x0c, 0x03, 0x10, 0x54} }, { {0x55, 0x08, 0x03, 0x10, 0x54} }, - { {0x65, 0x10, 0x03, 0x11, 0x11} }, + { {0x65, 0x10, 0x03, 0x11, 0x10} }, { {0x51, 0x10, 0x03, 0x10, 0x51} }, /* case-25 */ { {0x51, 0x08, 0x03, 0x10, 0x50} }, { {0x61, 0x08, 0x03, 0x11, 0x11} } @@ -2041,7 +2113,7 @@ static const struct coex_tdma_para tdma_sant_8723d[] = { /* Non-Shared-Antenna TDMA */ static const struct coex_tdma_para tdma_nsant_8723d[] = { - { {0x00, 0x00, 0x00, 0x40, 0x01} }, /* case-100 */ + { {0x00, 0x00, 0x00, 0x00, 0x01} }, /* case-100 */ { {0x61, 0x45, 0x03, 0x11, 0x11} }, /* case-101 */ { {0x61, 0x3a, 0x03, 0x11, 0x11} }, { {0x61, 0x30, 0x03, 0x11, 0x11} }, @@ -2062,7 +2134,7 @@ static const struct coex_tdma_para tdma_nsant_8723d[] = { { {0x51, 0x30, 0x03, 0x10, 0x50} }, { {0x51, 0x20, 0x03, 0x10, 0x50} }, { {0x51, 0x10, 0x03, 0x10, 0x50} }, /* case-120 */ - { {0x51, 0x08, 0x03, 0x10, 0x50} }, + { {0x51, 0x08, 0x03, 0x10, 0x50} } }; /* rssi in percentage % (dbm = % - 100) */ @@ -2668,7 +2740,7 @@ static const struct rtw_reg_domain coex_info_hw_regs_8723d[] = { {0x953, BIT(1), RTW_REG_DOMAIN_MAC8}, }; -struct rtw_chip_info rtw8723d_hw_spec = { +const struct rtw_chip_info rtw8723d_hw_spec = { .ops = &rtw8723d_ops, .id = RTW_CHIP_TYPE_8723D, .fw_name = "rtw88/rtw8723d_fw.bin", @@ -2682,12 +2754,13 @@ struct rtw_chip_info rtw8723d_hw_spec = { .ptct_efuse_size = 96 + 1, .txff_size = 32768, .rxff_size = 16384, + .rsvd_drv_pg_num = 8, .txgi_factor = 1, .is_pwr_by_rate_dec = true, .max_power_index = 0x3f, .csi_buf_pg_num = 0, .band = RTW_BAND_2G, - .page_size = 128, + .page_size = TX_PAGE_SIZE, .dig_min = 0x20, .ht_supported = true, .vht_supported = false, @@ -2714,11 +2787,15 @@ struct rtw_chip_info rtw8723d_hw_spec = { .rx_ldpc = false, .pwr_track_tbl = &rtw8723d_rtw_pwr_track_tbl, .iqk_threshold = 8, + .ampdu_density = IEEE80211_HT_MPDU_DENSITY_16, + .max_scan_ie_len = IEEE80211_MAX_DATA_LEN, .coex_para_ver = 0x2007022f, .bt_desired_ver = 0x2f, .scbd_support = true, .new_scbd10_def = true, + .ble_hid_profile_support = false, + .wl_mimo_ps_support = false, .pstdma_type = COEX_PSTDMA_FORCE_LPSOFF, .bt_rssi_type = COEX_BTRSSI_RATIO, .ant_isolation = 15, diff --git a/drivers/net/wireless/realtek/rtw88/rtw8723d.h b/drivers/net/wireless/realtek/rtw88/rtw8723d.h index 7894d321cd..3642a2c7f8 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8723d.h +++ b/drivers/net/wireless/realtek/rtw88/rtw8723d.h @@ -41,6 +41,19 @@ struct rtw8723de_efuse { u8 sub_device_id[2]; }; +struct rtw8723du_efuse { + u8 res4[48]; /* 0xd0 */ + u8 vender_id[2]; /* 0x100 */ + u8 product_id[2]; /* 0x102 */ + u8 usb_option; /* 0x104 */ + u8 mac_addr[ETH_ALEN]; /* 0x107 */ +}; + +struct rtw8723ds_efuse { + u8 res4[0x4a]; /* 0xd0 */ + u8 mac_addr[ETH_ALEN]; /* 0x11a */ +}; + struct rtw8723d_efuse { __le16 rtl_id; u8 rsvd[2]; @@ -69,9 +82,15 @@ struct rtw8723d_efuse { u8 rfe_option; u8 country_code[2]; u8 res[3]; - struct rtw8723de_efuse e; + union { + struct rtw8723de_efuse e; + struct rtw8723du_efuse u; + struct rtw8723ds_efuse s; + }; }; +extern const struct rtw_chip_info rtw8723d_hw_spec; + /* phy status page0 */ #define GET_PHY_STAT_P0_PWDB(phy_stat) \ le32_get_bits(*((__le32 *)(phy_stat) + 0x00), GENMASK(15, 8)) @@ -163,6 +182,7 @@ static inline s32 iqk_mult(s32 x, s32 y, s32 *ext) #define REG_CCK0_SYS 0x0a00 #define BIT_CCK_SIDE_BAND BIT(4) #define REG_CCK_ANT_SEL_11N 0x0a04 +#define REG_PWRTH 0x0a08 #define REG_CCK_FA_RST_11N 0x0a2c #define BIT_MASK_CCK_CNT_KEEP BIT(12) #define BIT_MASK_CCK_CNT_EN BIT(13) @@ -175,6 +195,8 @@ static inline s32 iqk_mult(s32 x, s32 y, s32 *ext) #define REG_CCK_CCA_CNT_11N 0x0a60 #define BIT_MASK_CCK_FA_MSB GENMASK(7, 0) #define BIT_MASK_CCK_FA_LSB GENMASK(15, 8) +#define REG_PWRTH2 0x0aa8 +#define REG_CSRATIO 0x0aaa #define REG_OFDM_FA_HOLDC_11N 0x0c00 #define BIT_MASK_OFDM_FA_KEEP BIT(31) #define REG_BB_RX_PATH_11N 0x0c04 diff --git a/drivers/net/wireless/realtek/rtw88/rtw8723de.c b/drivers/net/wireless/realtek/rtw88/rtw8723de.c index c81eb4c336..abbaafa328 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8723de.c +++ b/drivers/net/wireless/realtek/rtw88/rtw8723de.c @@ -4,7 +4,8 @@ #include #include -#include "rtw8723de.h" +#include "pci.h" +#include "rtw8723d.h" static const struct pci_device_id rtw_8723de_id_table[] = { { diff --git a/drivers/net/wireless/realtek/rtw88/rtw8723ds.c b/drivers/net/wireless/realtek/rtw88/rtw8723ds.c new file mode 100644 index 0000000000..f1ffffe42c --- /dev/null +++ b/drivers/net/wireless/realtek/rtw88/rtw8723ds.c @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* Copyright(c) Martin Blumenstingl + */ + +#include +#include "sdio_ids.h" +#include +#include "main.h" +#include "rtw8723d.h" +#include "sdio.h" + +static const struct sdio_device_id rtw_8723ds_id_table[] = { + { + SDIO_DEVICE(SDIO_VENDOR_ID_REALTEK, + SDIO_DEVICE_ID_REALTEK_RTW8723DS_1ANT), + .driver_data = (kernel_ulong_t)&rtw8723d_hw_spec, + }, + { + SDIO_DEVICE(SDIO_VENDOR_ID_REALTEK, + SDIO_DEVICE_ID_REALTEK_RTW8723DS_2ANT), + .driver_data = (kernel_ulong_t)&rtw8723d_hw_spec, + }, + {} +}; +MODULE_DEVICE_TABLE(sdio, rtw_8723ds_id_table); + +static struct sdio_driver rtw_8723ds_driver = { + .name = "rtw_8723ds", + .probe = rtw_sdio_probe, + .remove = rtw_sdio_remove, + .id_table = rtw_8723ds_id_table, + .drv = { + .pm = &rtw_sdio_pm_ops, + .shutdown = rtw_sdio_shutdown, + } +}; +module_sdio_driver(rtw_8723ds_driver); + +MODULE_AUTHOR("Martin Blumenstingl "); +MODULE_DESCRIPTION("Realtek 802.11n wireless 8723ds driver"); +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/net/wireless/realtek/rtw88/rtw8723du.c b/drivers/net/wireless/realtek/rtw88/rtw8723du.c new file mode 100644 index 0000000000..322a805da7 --- /dev/null +++ b/drivers/net/wireless/realtek/rtw88/rtw8723du.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* Copyright(c) 2018-2019 Realtek Corporation + */ + +#include +#include +#include "main.h" +#include "rtw8723d.h" +#include "usb.h" + +static const struct usb_device_id rtw_8723du_id_table[] = { + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xd723, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8723d_hw_spec) }, /* 8723DU 1*1 */ + { USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xd611, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8723d_hw_spec) }, /* Edimax EW-7611ULB V2 */ + { }, +}; +MODULE_DEVICE_TABLE(usb, rtw_8723du_id_table); + +static int rtw8723du_probe(struct usb_interface *intf, + const struct usb_device_id *id) +{ + return rtw_usb_probe(intf, id); +} + +static struct usb_driver rtw_8723du_driver = { + .name = "rtw_8723du", + .id_table = rtw_8723du_id_table, + .probe = rtw8723du_probe, + .disconnect = rtw_usb_disconnect, +}; +module_usb_driver(rtw_8723du_driver); + +MODULE_AUTHOR("Hans Ulli Kroll "); +MODULE_DESCRIPTION("Realtek 802.11n wireless 8723du driver"); +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/net/wireless/realtek/rtw88/rtw8821c.c b/drivers/net/wireless/realtek/rtw88/rtw8821c.c index f9615f76f1..adf224618a 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8821c.c +++ b/drivers/net/wireless/realtek/rtw88/rtw8821c.c @@ -14,6 +14,11 @@ #include "reg.h" #include "debug.h" #include "bf.h" +#include "regd.h" + +static const s8 lna_gain_table_0[8] = {22, 8, -6, -22, -31, -40, -46, -52}; +static const s8 lna_gain_table_1[16] = {10, 6, 2, -2, -6, -10, -14, -17, + -20, -24, -28, -31, -34, -37, -40, -44}; static void rtw8821ce_efuse_parsing(struct rtw_efuse *efuse, struct rtw8821c_efuse *map) @@ -21,15 +26,35 @@ static void rtw8821ce_efuse_parsing(struct rtw_efuse *efuse, ether_addr_copy(efuse->addr, map->e.mac_addr); } +static void rtw8821cu_efuse_parsing(struct rtw_efuse *efuse, + struct rtw8821c_efuse *map) +{ + ether_addr_copy(efuse->addr, map->u.mac_addr); +} + +static void rtw8821cs_efuse_parsing(struct rtw_efuse *efuse, + struct rtw8821c_efuse *map) +{ + ether_addr_copy(efuse->addr, map->s.mac_addr); +} + +enum rtw8821ce_rf_set { + SWITCH_TO_BTG, + SWITCH_TO_WLG, + SWITCH_TO_WLA, + SWITCH_TO_BT, +}; + static int rtw8821c_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) { + struct rtw_hal *hal = &rtwdev->hal; struct rtw_efuse *efuse = &rtwdev->efuse; struct rtw8821c_efuse *map; int i; map = (struct rtw8821c_efuse *)log_map; - efuse->rfe_option = map->rfe_option; + efuse->rfe_option = map->rfe_option & 0x1f; efuse->rf_board_option = map->rf_board_option; efuse->crystal_cap = map->xtal_k; efuse->pa_type_2g = map->pa_type; @@ -46,13 +71,35 @@ static int rtw8821c_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) efuse->tx_bb_swing_setting_2g = map->tx_bb_swing_setting_2g; efuse->tx_bb_swing_setting_5g = map->tx_bb_swing_setting_5g; + hal->pkg_type = map->rfe_option & BIT(5) ? 1 : 0; + + switch (efuse->rfe_option) { + case 0x2: + case 0x4: + case 0x7: + case 0xa: + case 0xc: + case 0xf: + hal->rfe_btg = true; + break; + } + for (i = 0; i < 4; i++) efuse->txpwr_idx_table[i] = map->txpwr_idx_table[i]; + if (rtwdev->efuse.rfe_option == 2 || rtwdev->efuse.rfe_option == 4) + efuse->txpwr_idx_table[0].pwr_idx_2g = map->txpwr_idx_table[1].pwr_idx_2g; + switch (rtw_hci_type(rtwdev)) { case RTW_HCI_TYPE_PCIE: rtw8821ce_efuse_parsing(efuse, map); break; + case RTW_HCI_TYPE_USB: + rtw8821cu_efuse_parsing(efuse, map); + break; + case RTW_HCI_TYPE_SDIO: + rtw8821cs_efuse_parsing(efuse, map); + break; default: /* unsupported now */ return -ENOTSUPP; @@ -110,6 +157,7 @@ static void rtw8821c_phy_bf_init(struct rtw_dev *rtwdev) static void rtw8821c_phy_set_param(struct rtw_dev *rtwdev) { + struct rtw_hal *hal = &rtwdev->hal; u8 crystal_cap, val; /* power on BB/RF domain */ @@ -144,9 +192,9 @@ static void rtw8821c_phy_set_param(struct rtw_dev *rtwdev) /* post init after header files config */ rtw_write32_set(rtwdev, REG_RXPSEL, BIT_RX_PSEL_RST); - rtwdev->chip->ch_param[0] = rtw_read32_mask(rtwdev, REG_TXSF2, MASKDWORD); - rtwdev->chip->ch_param[1] = rtw_read32_mask(rtwdev, REG_TXSF6, MASKDWORD); - rtwdev->chip->ch_param[2] = rtw_read32_mask(rtwdev, REG_TXFILTER, MASKDWORD); + hal->ch_param[0] = rtw_read32_mask(rtwdev, REG_TXSF2, MASKDWORD); + hal->ch_param[1] = rtw_read32_mask(rtwdev, REG_TXSF6, MASKDWORD); + hal->ch_param[2] = rtw_read32_mask(rtwdev, REG_TXFILTER, MASKDWORD); rtw_phy_init(rtwdev); rtwdev->dm_info.cck_pd_default = rtw_read8(rtwdev, REG_CSRATIO) & 0x1f; @@ -208,7 +256,8 @@ static int rtw8821c_mac_init(struct rtw_dev *rtwdev) rtw_write8(rtwdev, REG_TCR + 1, WLAN_TX_FUNC_CFG1); rtw_write8(rtwdev, REG_ACKTO_CCK, 0x40); rtw_write8_set(rtwdev, REG_WMAC_TRXPTCL_CTL_H, BIT(1)); - rtw_write8_set(rtwdev, REG_SND_PTCL_CTRL, BIT(6)); + rtw_write8_set(rtwdev, REG_SND_PTCL_CTRL, + BIT_DIS_CHK_VHTSIGB_CRC); rtw_write32(rtwdev, REG_WMAC_OPTION_FUNCTION + 8, WLAN_MAC_OPT_FUNC2); rtw_write8(rtwdev, REG_WMAC_OPTION_FUNCTION + 4, WLAN_MAC_OPT_NORM_FUNC1); @@ -224,8 +273,43 @@ static void rtw8821c_cfg_ldo25(struct rtw_dev *rtwdev, bool enable) rtw_write8(rtwdev, REG_LDO_EFUSE_CTRL + 3, ldo_pwr); } +static void rtw8821c_switch_rf_set(struct rtw_dev *rtwdev, u8 rf_set) +{ + u32 reg; + + rtw_write32_set(rtwdev, REG_DMEM_CTRL, BIT_WL_RST); + rtw_write32_set(rtwdev, REG_SYS_CTRL, BIT_FEN_EN); + + reg = rtw_read32(rtwdev, REG_RFECTL); + switch (rf_set) { + case SWITCH_TO_BTG: + reg |= B_BTG_SWITCH; + reg &= ~(B_CTRL_SWITCH | B_WL_SWITCH | B_WLG_SWITCH | + B_WLA_SWITCH); + rtw_write32_mask(rtwdev, REG_ENRXCCA, MASKBYTE2, BTG_CCA); + rtw_write32_mask(rtwdev, REG_ENTXCCK, MASKLWORD, BTG_LNA); + break; + case SWITCH_TO_WLG: + reg |= B_WL_SWITCH | B_WLG_SWITCH; + reg &= ~(B_BTG_SWITCH | B_CTRL_SWITCH | B_WLA_SWITCH); + rtw_write32_mask(rtwdev, REG_ENRXCCA, MASKBYTE2, WLG_CCA); + rtw_write32_mask(rtwdev, REG_ENTXCCK, MASKLWORD, WLG_LNA); + break; + case SWITCH_TO_WLA: + reg |= B_WL_SWITCH | B_WLA_SWITCH; + reg &= ~(B_BTG_SWITCH | B_CTRL_SWITCH | B_WLG_SWITCH); + break; + case SWITCH_TO_BT: + default: + break; + } + + rtw_write32(rtwdev, REG_RFECTL, reg); +} + static void rtw8821c_set_channel_rf(struct rtw_dev *rtwdev, u8 channel, u8 bw) { + struct rtw_hal *hal = &rtwdev->hal; u32 rf_reg18; rf_reg18 = rtw_read_rf(rtwdev, RF_PATH_A, 0x18, RFREG_MASK); @@ -257,9 +341,14 @@ static void rtw8821c_set_channel_rf(struct rtw_dev *rtwdev, u8 channel, u8 bw) } if (channel <= 14) { + if (hal->rfe_btg) + rtw8821c_switch_rf_set(rtwdev, SWITCH_TO_BTG); + else + rtw8821c_switch_rf_set(rtwdev, SWITCH_TO_WLG); rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTDBG, BIT(6), 0x1); rtw_write_rf(rtwdev, RF_PATH_A, 0x64, 0xf, 0xf); } else { + rtw8821c_switch_rf_set(rtwdev, SWITCH_TO_WLA); rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTDBG, BIT(6), 0x0); } @@ -295,6 +384,7 @@ static void rtw8821c_set_channel_rxdfir(struct rtw_dev *rtwdev, u8 bw) static void rtw8821c_set_channel_bb(struct rtw_dev *rtwdev, u8 channel, u8 bw, u8 primary_ch_idx) { + struct rtw_hal *hal = &rtwdev->hal; u32 val32; if (channel <= 14) { @@ -311,11 +401,11 @@ static void rtw8821c_set_channel_bb(struct rtw_dev *rtwdev, u8 channel, u8 bw, rtw_write32_mask(rtwdev, REG_TXFILTER, MASKDWORD, 0x00003667); } else { rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD, - rtwdev->chip->ch_param[0]); + hal->ch_param[0]); rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, - rtwdev->chip->ch_param[1] & MASKLWORD); + hal->ch_param[1] & MASKLWORD); rtw_write32_mask(rtwdev, REG_TXFILTER, MASKDWORD, - rtwdev->chip->ch_param[2]); + hal->ch_param[2]); } } else if (channel > 35) { rtw_write32_mask(rtwdev, REG_ENTXCCK, BIT(18), 0x1); @@ -426,22 +516,57 @@ static void rtw8821c_set_channel(struct rtw_dev *rtwdev, u8 channel, u8 bw, rtw8821c_set_channel_rxdfir(rtwdev, bw); } +static s8 get_cck_rx_pwr(struct rtw_dev *rtwdev, u8 lna_idx, u8 vga_idx) +{ + struct rtw_efuse *efuse = &rtwdev->efuse; + const s8 *lna_gain_table; + int lna_gain_table_size; + s8 rx_pwr_all = 0; + s8 lna_gain = 0; + + if (efuse->rfe_option == 0) { + lna_gain_table = lna_gain_table_0; + lna_gain_table_size = ARRAY_SIZE(lna_gain_table_0); + } else { + lna_gain_table = lna_gain_table_1; + lna_gain_table_size = ARRAY_SIZE(lna_gain_table_1); + } + + if (lna_idx >= lna_gain_table_size) { + rtw_warn(rtwdev, "incorrect lna index (%d)\n", lna_idx); + return -120; + } + + lna_gain = lna_gain_table[lna_idx]; + rx_pwr_all = lna_gain - 2 * vga_idx; + + return rx_pwr_all; +} + static void query_phy_status_page0(struct rtw_dev *rtwdev, u8 *phy_status, struct rtw_rx_pkt_stat *pkt_stat) { - s8 min_rx_power = -120; - u8 pwdb = GET_PHY_STAT_P0_PWDB(phy_status); + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + s8 rx_power; + u8 lna_idx = 0; + u8 vga_idx = 0; - pkt_stat->rx_power[RF_PATH_A] = pwdb - 100; + vga_idx = GET_PHY_STAT_P0_VGA(phy_status); + lna_idx = FIELD_PREP(BIT_LNA_H_MASK, GET_PHY_STAT_P0_LNA_H(phy_status)) | + FIELD_PREP(BIT_LNA_L_MASK, GET_PHY_STAT_P0_LNA_L(phy_status)); + rx_power = get_cck_rx_pwr(rtwdev, lna_idx, vga_idx); + + pkt_stat->rx_power[RF_PATH_A] = rx_power; pkt_stat->rssi = rtw_phy_rf_power_2_rssi(pkt_stat->rx_power, 1); + dm_info->rssi[RF_PATH_A] = pkt_stat->rssi; pkt_stat->bw = RTW_CHANNEL_WIDTH_20; - pkt_stat->signal_power = max(pkt_stat->rx_power[RF_PATH_A], - min_rx_power); + pkt_stat->signal_power = rx_power; } static void query_phy_status_page1(struct rtw_dev *rtwdev, u8 *phy_status, struct rtw_rx_pkt_stat *pkt_stat) { + struct rtw_dm_info *dm_info = &rtwdev->dm_info; u8 rxsc, bw; s8 min_rx_power = -120; @@ -461,6 +586,7 @@ static void query_phy_status_page1(struct rtw_dev *rtwdev, u8 *phy_status, pkt_stat->rx_power[RF_PATH_A] = GET_PHY_STAT_P1_PWDB_A(phy_status) - 110; pkt_stat->rssi = rtw_phy_rf_power_2_rssi(pkt_stat->rx_power, 1); + dm_info->rssi[RF_PATH_A] = pkt_stat->rssi; pkt_stat->bw = bw; pkt_stat->signal_power = max(pkt_stat->rx_power[RF_PATH_A], min_rx_power); @@ -499,7 +625,8 @@ static void rtw8821c_query_rx_desc(struct rtw_dev *rtwdev, u8 *rx_desc, pkt_stat->phy_status = GET_RX_DESC_PHYST(rx_desc); pkt_stat->icv_err = GET_RX_DESC_ICV_ERR(rx_desc); pkt_stat->crc_err = GET_RX_DESC_CRC32(rx_desc); - pkt_stat->decrypted = !GET_RX_DESC_SWDEC(rx_desc); + pkt_stat->decrypted = !GET_RX_DESC_SWDEC(rx_desc) && + GET_RX_DESC_ENC_TYPE(rx_desc) != RX_DESC_ENC_NONE; pkt_stat->is_c2h = GET_RX_DESC_C2H(rx_desc); pkt_stat->pkt_len = GET_RX_DESC_PKT_LEN(rx_desc); pkt_stat->drv_info_sz = GET_RX_DESC_DRV_INFO_SIZE(rx_desc); @@ -656,8 +783,7 @@ static void rtw8821c_coex_cfg_init(struct rtw_dev *rtwdev) rtw_write8_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); /* BT report packet sample rate */ - rtw_write8_mask(rtwdev, REG_BT_TDMA_TIME, SAMPLE_RATE_MASK, - SAMPLE_RATE); + rtw_write8_mask(rtwdev, REG_BT_TDMA_TIME, BIT_MASK_SAMPLE_RATE, 0x5); /* enable BT counter statistics */ rtw_write8(rtwdev, REG_BT_STAT_CTRL, BT_CNT_ENABLE); @@ -691,6 +817,15 @@ static void rtw8821c_coex_cfg_ant_switch(struct rtw_dev *rtwdev, u8 ctrl_type, if (switch_status == coex_dm->cur_switch_status) return; + if (coex_rfe->wlg_at_btg) { + ctrl_type = COEX_SWITCH_CTRL_BY_BBSW; + + if (coex_rfe->ant_switch_polarity) + pos_type = COEX_SWITCH_TO_WLA; + else + pos_type = COEX_SWITCH_TO_WLG_BT; + } + coex_dm->cur_switch_status = switch_status; if (coex_rfe->ant_switch_diversity && @@ -911,7 +1046,7 @@ static void rtw8821c_pwrtrack_set(struct rtw_dev *rtwdev) s8 pwr_idx_offset_lower; u8 channel = rtwdev->hal.current_channel; u8 band_width = rtwdev->hal.current_band_width; - u8 regd = rtwdev->regd.txpwr_regd; + u8 regd = rtw_regd_get(rtwdev); u8 tx_rate = dm_info->tx_rate; u8 max_pwr_idx = rtwdev->chip->max_power_index; @@ -1021,25 +1156,37 @@ static void rtw8821c_phy_cck_pd_set(struct rtw_dev *rtwdev, u8 new_lvl) { struct rtw_dm_info *dm_info = &rtwdev->dm_info; u8 pd[CCK_PD_LV_MAX] = {3, 7, 13, 13, 13}; + u8 cck_n_rx; - if (dm_info->min_rssi > 60) { - new_lvl = 4; - pd[4] = 0x1d; - goto set_cck_pd; - } + rtw_dbg(rtwdev, RTW_DBG_PHY, "lv: (%d) -> (%d)\n", + dm_info->cck_pd_lv[RTW_CHANNEL_WIDTH_20][RF_PATH_A], new_lvl); if (dm_info->cck_pd_lv[RTW_CHANNEL_WIDTH_20][RF_PATH_A] == new_lvl) return; + cck_n_rx = (rtw_read8_mask(rtwdev, REG_CCK0_FAREPORT, BIT_CCK0_2RX) && + rtw_read8_mask(rtwdev, REG_CCK0_FAREPORT, BIT_CCK0_MRC)) ? 2 : 1; + rtw_dbg(rtwdev, RTW_DBG_PHY, + "is_linked=%d, lv=%d, n_rx=%d, cs_ratio=0x%x, pd_th=0x%x, cck_fa_avg=%d\n", + rtw_is_assoc(rtwdev), new_lvl, cck_n_rx, + dm_info->cck_pd_default + new_lvl * 2, + pd[new_lvl], dm_info->cck_fa_avg); + dm_info->cck_fa_avg = CCK_FA_AVG_RESET; -set_cck_pd: dm_info->cck_pd_lv[RTW_CHANNEL_WIDTH_20][RF_PATH_A] = new_lvl; rtw_write32_mask(rtwdev, REG_PWRTH, 0x3f0000, pd[new_lvl]); rtw_write32_mask(rtwdev, REG_PWRTH2, 0x1f0000, dm_info->cck_pd_default + new_lvl * 2); } +static void rtw8821c_fill_txdesc_checksum(struct rtw_dev *rtwdev, + struct rtw_tx_pkt_info *pkt_info, + u8 *txdesc) +{ + fill_txdesc_checksum_common(txdesc, 16); +} + static struct rtw_pwr_seq_cmd trans_carddis_to_cardemu_8821c[] = { {0x0086, RTW_PWR_CUT_ALL_MSK, @@ -1410,6 +1557,9 @@ static const struct rtw_intf_phy_para_table phy_para_table_8821c = { static const struct rtw_rfe_def rtw8821c_rfe_defs[] = { [0] = RTW_DEF_RFE(8821c, 0, 0), + [2] = RTW_DEF_RFE_EXT(8821c, 0, 0, 2), + [4] = RTW_DEF_RFE_EXT(8821c, 0, 0, 2), + [6] = RTW_DEF_RFE(8821c, 0, 0), }; static struct rtw_hw_reg rtw8821c_dig[] = { @@ -1484,6 +1634,7 @@ static struct rtw_chip_ops rtw8821c_ops = { .config_bfee = rtw8821c_bf_config_bfee, .set_gid_table = rtw_bf_set_gid_table, .cfg_csi_rate = rtw_bf_cfg_csi_rate, + .fill_txdesc_checksum = rtw8821c_fill_txdesc_checksum, .coex_set_init = rtw8821c_coex_cfg_init, .coex_set_ant_switch = rtw8821c_coex_cfg_ant_switch, @@ -1768,7 +1919,7 @@ static const struct rtw_reg_domain coex_info_hw_regs_8821c[] = { {0x60A, MASKBYTE0, RTW_REG_DOMAIN_MAC8}, }; -struct rtw_chip_info rtw8821c_hw_spec = { +const struct rtw_chip_info rtw8821c_hw_spec = { .ops = &rtw8821c_ops, .id = RTW_CHIP_TYPE_8821C, .fw_name = "rtw88/rtw8821c_fw.bin", @@ -1782,12 +1933,13 @@ struct rtw_chip_info rtw8821c_hw_spec = { .ptct_efuse_size = 96, .txff_size = 65536, .rxff_size = 16384, + .rsvd_drv_pg_num = 8, .txgi_factor = 1, .is_pwr_by_rate_dec = true, .max_power_index = 0x3f, .csi_buf_pg_num = 0, .band = RTW_BAND_2G | RTW_BAND_5G, - .page_size = 128, + .page_size = TX_PAGE_SIZE, .dig_min = 0x1c, .ht_supported = true, .vht_supported = true, @@ -1814,11 +1966,15 @@ struct rtw_chip_info rtw8821c_hw_spec = { .iqk_threshold = 8, .bfer_su_max_num = 2, .bfer_mu_max_num = 1, + .ampdu_density = IEEE80211_HT_MPDU_DENSITY_2, + .max_scan_ie_len = IEEE80211_MAX_DATA_LEN, .coex_para_ver = 0x19092746, .bt_desired_ver = 0x46, .scbd_support = true, .new_scbd10_def = false, + .ble_hid_profile_support = false, + .wl_mimo_ps_support = false, .pstdma_type = COEX_PSTDMA_FORCE_LPSOFF, .bt_rssi_type = COEX_BTRSSI_RATIO, .ant_isolation = 15, diff --git a/drivers/net/wireless/realtek/rtw88/rtw8821c.h b/drivers/net/wireless/realtek/rtw88/rtw8821c.h index 8d1e8ff71d..fcff31688c 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8821c.h +++ b/drivers/net/wireless/realtek/rtw88/rtw8821c.h @@ -9,6 +9,26 @@ #define RCR_VHT_ACK BIT(26) +struct rtw8821cu_efuse { + u8 res4[4]; /* 0xd0 */ + u8 usb_optional_function; + u8 res5[0x1e]; + u8 res6[2]; + u8 serial[0x0b]; /* 0xf5 */ + u8 vid; /* 0x100 */ + u8 res7; + u8 pid; + u8 res8[4]; + u8 mac_addr[ETH_ALEN]; /* 0x107 */ + u8 res9[2]; + u8 vendor_name[0x07]; + u8 res10[2]; + u8 device_name[0x14]; + u8 res11[0xcf]; + u8 package_type; /* 0x1fb */ + u8 res12[0x4]; +}; + struct rtw8821ce_efuse { u8 mac_addr[ETH_ALEN]; /* 0xd0 */ u8 vender_id[2]; @@ -45,6 +65,11 @@ struct rtw8821ce_efuse { u8 res7; }; +struct rtw8821cs_efuse { + u8 res4[0x4a]; /* 0xd0 */ + u8 mac_addr[ETH_ALEN]; /* 0x11a */ +} __packed; + struct rtw8821c_efuse { __le16 rtl_id; u8 res0[0x0e]; @@ -73,6 +98,8 @@ struct rtw8821c_efuse { u8 res[3]; union { struct rtw8821ce_efuse e; + struct rtw8821cu_efuse u; + struct rtw8821cs_efuse s; }; }; @@ -84,6 +111,8 @@ _rtw_write32s_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data) rtw_write32_mask(rtwdev, addr + 0x200, mask, data); } +extern const struct rtw_chip_info rtw8821c_hw_spec; + #define rtw_write32s_mask(rtwdev, addr, mask, data) \ do { \ BUILD_BUG_ON((addr) < 0xC00 || (addr) >= 0xD00); \ @@ -148,6 +177,14 @@ _rtw_write32s_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data) /* phy status page0 */ #define GET_PHY_STAT_P0_PWDB(phy_stat) \ le32_get_bits(*((__le32 *)(phy_stat) + 0x00), GENMASK(15, 8)) +#define GET_PHY_STAT_P0_VGA(phy_stat) \ + le32_get_bits(*((__le32 *)(phy_stat) + 0x03), GENMASK(12, 8)) +#define GET_PHY_STAT_P0_LNA_L(phy_stat) \ + le32_get_bits(*((__le32 *)(phy_stat) + 0x03), GENMASK(15, 13)) +#define GET_PHY_STAT_P0_LNA_H(phy_stat) \ + le32_get_bits(*((__le32 *)(phy_stat) + 0x03), BIT(23)) +#define BIT_LNA_H_MASK BIT(3) +#define BIT_LNA_L_MASK GENMASK(2, 0) /* phy status page1 */ #define GET_PHY_STAT_P1_PWDB_A(phy_stat) \ @@ -173,6 +210,8 @@ _rtw_write32s_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data) #define GET_PHY_STAT_P1_RXSNR_B(phy_stat) \ le32_get_bits(*((__le32 *)(phy_stat) + 0x06), GENMASK(15, 8)) +#define REG_SYS_CTRL 0x000 +#define BIT_FEN_EN BIT(26) #define REG_INIRTS_RATE_SEL 0x0480 #define REG_HTSTFWT 0x800 #define REG_RXPSEL 0x808 @@ -204,6 +243,11 @@ _rtw_write32s_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data) #define REG_FA_CCK 0xa5c #define REG_RXDESC 0xa2c #define REG_ENTXCCK 0xa80 +#define BTG_LNA 0xfc84 +#define WLG_LNA 0x7532 +#define REG_ENRXCCA 0xa84 +#define BTG_CCA 0x0e +#define WLG_CCA 0x12 #define REG_PWRTH2 0xaa8 #define REG_CSRATIO 0xaaa #define REG_TXFILTER 0xaac @@ -217,6 +261,11 @@ _rtw_write32s_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data) #define REG_RFESEL0 0xcb0 #define REG_RFESEL8 0xcb4 #define REG_RFECTL 0xcb8 +#define B_BTG_SWITCH BIT(16) +#define B_CTRL_SWITCH BIT(18) +#define B_WL_SWITCH (BIT(20) | BIT(22)) +#define B_WLG_SWITCH BIT(21) +#define B_WLA_SWITCH BIT(23) #define REG_RFEINV 0xcbc #define REG_AGCTR_B 0xe08 #define REG_RXIGI_B 0xe50 @@ -227,12 +276,12 @@ _rtw_write32s_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data) #define REG_CCA_OFDM 0xf08 #define REG_FA_OFDM 0xf48 #define REG_CCA_CCK 0xfcc +#define REG_DMEM_CTRL 0x1080 +#define BIT_WL_RST BIT(16) #define REG_ANTWT 0x1904 #define REG_IQKFAILMSK 0x1bf0 #define BIT_MASK_R_RFE_SEL_15 GENMASK(31, 28) #define BIT_SDIO_INT BIT(18) -#define SAMPLE_RATE_MASK GENMASK(5, 0) -#define SAMPLE_RATE 0x5 #define BT_CNT_ENABLE 0x1 #define BIT_BCN_QUEUE BIT(3) #define BCN_PRI_EN 0x1 diff --git a/drivers/net/wireless/realtek/rtw88/rtw8821c_table.c b/drivers/net/wireless/realtek/rtw88/rtw8821c_table.c index 970f903f7d..6c82c43834 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8821c_table.c +++ b/drivers/net/wireless/realtek/rtw88/rtw8821c_table.c @@ -13,7 +13,7 @@ static const u32 rtw8821c_mac[] = { 0x04F, 0x00000001, 0x029, 0x000000F9, 0x420, 0x00000080, - 0x421, 0x0000000F, + 0x421, 0x0000001F, 0x428, 0x0000000A, 0x429, 0x00000010, 0x430, 0x00000000, @@ -1342,6 +1342,399 @@ static const u32 rtw8821c_agc[] = { RTW_DECL_TABLE_PHY_COND(rtw8821c_agc, rtw_phy_cfg_agc); +static const u32 rtw8821c_agc_btg_type2[] = { + 0x80001004, 0x00000000, 0x40000000, 0x00000000, + 0x81C, 0xFF000013, + 0x81C, 0xFE020013, + 0x81C, 0xFD040013, + 0x81C, 0xFC060013, + 0x81C, 0xFB080013, + 0x81C, 0xFA0A0013, + 0x81C, 0xF90C0013, + 0x81C, 0xF80E0013, + 0x81C, 0xF7100013, + 0x81C, 0xF6120013, + 0x81C, 0xF5140013, + 0x81C, 0xF4160013, + 0x81C, 0xF3180013, + 0x81C, 0xF21A0013, + 0x81C, 0xF11C0013, + 0x81C, 0xF01E0013, + 0x81C, 0xEF200013, + 0x81C, 0xEE220013, + 0x81C, 0xED240013, + 0x81C, 0xEC260013, + 0x81C, 0xEB280013, + 0x81C, 0xEA2A0013, + 0x81C, 0xE92C0013, + 0x81C, 0xE82E0013, + 0x81C, 0xE7300013, + 0x81C, 0x8B320013, + 0x81C, 0x8A340013, + 0x81C, 0x89360013, + 0x81C, 0x88380013, + 0x81C, 0x873A0013, + 0x81C, 0x863C0013, + 0x81C, 0x853E0013, + 0x81C, 0x84400013, + 0x81C, 0x83420013, + 0x81C, 0x82440013, + 0x81C, 0x81460013, + 0x81C, 0x08480013, + 0x81C, 0x074A0013, + 0x81C, 0x064C0013, + 0x81C, 0x054E0013, + 0x81C, 0x04500013, + 0x81C, 0x03520013, + 0x81C, 0x88540003, + 0x81C, 0x87560003, + 0x81C, 0x86580003, + 0x81C, 0x855A0003, + 0x81C, 0x845C0003, + 0x81C, 0x835E0003, + 0x81C, 0x82600003, + 0x81C, 0x81620003, + 0x81C, 0x07640003, + 0x81C, 0x06660003, + 0x81C, 0x05680003, + 0x81C, 0x046A0003, + 0x81C, 0x036C0003, + 0x81C, 0x026E0003, + 0x81C, 0x01700003, + 0x81C, 0x01720003, + 0x81C, 0x01740003, + 0x81C, 0x01760003, + 0x81C, 0x01780003, + 0x81C, 0x017A0003, + 0x81C, 0x017C0003, + 0x81C, 0x017E0003, + 0x81C, 0xFF000813, + 0x81C, 0xFE020813, + 0x81C, 0xFD040813, + 0x81C, 0xFC060813, + 0x81C, 0xFB080813, + 0x81C, 0xFA0A0813, + 0x81C, 0xF90C0813, + 0x81C, 0xF80E0813, + 0x81C, 0xF7100813, + 0x81C, 0xF6120813, + 0x81C, 0xF5140813, + 0x81C, 0xF4160813, + 0x81C, 0xF3180813, + 0x81C, 0xF21A0813, + 0x81C, 0xF11C0813, + 0x81C, 0x941E0813, + 0x81C, 0x93200813, + 0x81C, 0x92220813, + 0x81C, 0x91240813, + 0x81C, 0x90260813, + 0x81C, 0x8F280813, + 0x81C, 0x8E2A0813, + 0x81C, 0x8D2C0813, + 0x81C, 0x8C2E0813, + 0x81C, 0x8B300813, + 0x81C, 0x8A320813, + 0x81C, 0x89340813, + 0x81C, 0x88360813, + 0x81C, 0x87380813, + 0x81C, 0x863A0813, + 0x81C, 0x853C0813, + 0x81C, 0x843E0813, + 0x81C, 0x83400813, + 0x81C, 0x82420813, + 0x81C, 0x81440813, + 0x81C, 0x07460813, + 0x81C, 0x06480813, + 0x81C, 0x054A0813, + 0x81C, 0x044C0813, + 0x81C, 0x034E0813, + 0x81C, 0x02500813, + 0x81C, 0x01520813, + 0x81C, 0x88540803, + 0x81C, 0x87560803, + 0x81C, 0x86580803, + 0x81C, 0x855A0803, + 0x81C, 0x845C0803, + 0x81C, 0x835E0803, + 0x81C, 0x82600803, + 0x81C, 0x81620803, + 0x81C, 0x07640803, + 0x81C, 0x06660803, + 0x81C, 0x05680803, + 0x81C, 0x046A0803, + 0x81C, 0x036C0803, + 0x81C, 0x026E0803, + 0x81C, 0x01700803, + 0x81C, 0x01720803, + 0x81C, 0x01740803, + 0x81C, 0x01760803, + 0x81C, 0x01780803, + 0x81C, 0x017A0803, + 0x81C, 0x017C0803, + 0x81C, 0x017E0803, + 0x90001005, 0x00000000, 0x40000000, 0x00000000, + 0x81C, 0xFF000013, + 0x81C, 0xFE020013, + 0x81C, 0xFD040013, + 0x81C, 0xFC060013, + 0x81C, 0xFB080013, + 0x81C, 0xFA0A0013, + 0x81C, 0xF90C0013, + 0x81C, 0xF80E0013, + 0x81C, 0xF7100013, + 0x81C, 0xF6120013, + 0x81C, 0xF5140013, + 0x81C, 0xF4160013, + 0x81C, 0xF3180013, + 0x81C, 0xF21A0013, + 0x81C, 0xF11C0013, + 0x81C, 0xF01E0013, + 0x81C, 0xEF200013, + 0x81C, 0xEE220013, + 0x81C, 0xED240013, + 0x81C, 0xEC260013, + 0x81C, 0xEB280013, + 0x81C, 0xEA2A0013, + 0x81C, 0xE92C0013, + 0x81C, 0xE82E0013, + 0x81C, 0xE7300013, + 0x81C, 0x8B320013, + 0x81C, 0x8A340013, + 0x81C, 0x89360013, + 0x81C, 0x88380013, + 0x81C, 0x873A0013, + 0x81C, 0x863C0013, + 0x81C, 0x853E0013, + 0x81C, 0x84400013, + 0x81C, 0x83420013, + 0x81C, 0x82440013, + 0x81C, 0x81460013, + 0x81C, 0x08480013, + 0x81C, 0x074A0013, + 0x81C, 0x064C0013, + 0x81C, 0x054E0013, + 0x81C, 0x04500013, + 0x81C, 0x03520013, + 0x81C, 0x88540003, + 0x81C, 0x87560003, + 0x81C, 0x86580003, + 0x81C, 0x855A0003, + 0x81C, 0x845C0003, + 0x81C, 0x835E0003, + 0x81C, 0x82600003, + 0x81C, 0x81620003, + 0x81C, 0x07640003, + 0x81C, 0x06660003, + 0x81C, 0x05680003, + 0x81C, 0x046A0003, + 0x81C, 0x036C0003, + 0x81C, 0x026E0003, + 0x81C, 0x01700003, + 0x81C, 0x01720003, + 0x81C, 0x01740003, + 0x81C, 0x01760003, + 0x81C, 0x01780003, + 0x81C, 0x017A0003, + 0x81C, 0x017C0003, + 0x81C, 0x017E0003, + 0x81C, 0xFF000813, + 0x81C, 0xFE020813, + 0x81C, 0xFD040813, + 0x81C, 0xFC060813, + 0x81C, 0xFB080813, + 0x81C, 0xFA0A0813, + 0x81C, 0xF90C0813, + 0x81C, 0xF80E0813, + 0x81C, 0xF7100813, + 0x81C, 0xF6120813, + 0x81C, 0xF5140813, + 0x81C, 0xF4160813, + 0x81C, 0xF3180813, + 0x81C, 0xF21A0813, + 0x81C, 0xF11C0813, + 0x81C, 0x941E0813, + 0x81C, 0x93200813, + 0x81C, 0x92220813, + 0x81C, 0x91240813, + 0x81C, 0x90260813, + 0x81C, 0x8F280813, + 0x81C, 0x8E2A0813, + 0x81C, 0x8D2C0813, + 0x81C, 0x8C2E0813, + 0x81C, 0x8B300813, + 0x81C, 0x8A320813, + 0x81C, 0x89340813, + 0x81C, 0x88360813, + 0x81C, 0x87380813, + 0x81C, 0x863A0813, + 0x81C, 0x853C0813, + 0x81C, 0x843E0813, + 0x81C, 0x83400813, + 0x81C, 0x82420813, + 0x81C, 0x81440813, + 0x81C, 0x07460813, + 0x81C, 0x06480813, + 0x81C, 0x054A0813, + 0x81C, 0x044C0813, + 0x81C, 0x034E0813, + 0x81C, 0x02500813, + 0x81C, 0x01520813, + 0x81C, 0x88540803, + 0x81C, 0x87560803, + 0x81C, 0x86580803, + 0x81C, 0x855A0803, + 0x81C, 0x845C0803, + 0x81C, 0x835E0803, + 0x81C, 0x82600803, + 0x81C, 0x81620803, + 0x81C, 0x07640803, + 0x81C, 0x06660803, + 0x81C, 0x05680803, + 0x81C, 0x046A0803, + 0x81C, 0x036C0803, + 0x81C, 0x026E0803, + 0x81C, 0x01700803, + 0x81C, 0x01720803, + 0x81C, 0x01740803, + 0x81C, 0x01760803, + 0x81C, 0x01780803, + 0x81C, 0x017A0803, + 0x81C, 0x017C0803, + 0x81C, 0x017E0803, + 0xA0000000, 0x00000000, + 0x81C, 0xFF000013, + 0x81C, 0xFE020013, + 0x81C, 0xFD040013, + 0x81C, 0xFC060013, + 0x81C, 0xFB080013, + 0x81C, 0xFA0A0013, + 0x81C, 0xF90C0013, + 0x81C, 0xF80E0013, + 0x81C, 0xF7100013, + 0x81C, 0xF6120013, + 0x81C, 0xF5140013, + 0x81C, 0xF4160013, + 0x81C, 0xF3180013, + 0x81C, 0xF21A0013, + 0x81C, 0xF11C0013, + 0x81C, 0xF01E0013, + 0x81C, 0xEF200013, + 0x81C, 0xEE220013, + 0x81C, 0xED240013, + 0x81C, 0xEC260013, + 0x81C, 0xEB280013, + 0x81C, 0xEA2A0013, + 0x81C, 0xE92C0013, + 0x81C, 0xE82E0013, + 0x81C, 0xE7300013, + 0x81C, 0x8A320013, + 0x81C, 0x89340013, + 0x81C, 0x88360013, + 0x81C, 0x87380013, + 0x81C, 0x863A0013, + 0x81C, 0x853C0013, + 0x81C, 0x843E0013, + 0x81C, 0x83400013, + 0x81C, 0x82420013, + 0x81C, 0x81440013, + 0x81C, 0x07460013, + 0x81C, 0x06480013, + 0x81C, 0x054A0013, + 0x81C, 0x044C0013, + 0x81C, 0x034E0013, + 0x81C, 0x02500013, + 0x81C, 0x01520013, + 0x81C, 0x88540003, + 0x81C, 0x87560003, + 0x81C, 0x86580003, + 0x81C, 0x855A0003, + 0x81C, 0x845C0003, + 0x81C, 0x835E0003, + 0x81C, 0x82600003, + 0x81C, 0x81620003, + 0x81C, 0x07640003, + 0x81C, 0x06660003, + 0x81C, 0x05680003, + 0x81C, 0x046A0003, + 0x81C, 0x036C0003, + 0x81C, 0x026E0003, + 0x81C, 0x01700003, + 0x81C, 0x01720003, + 0x81C, 0x01740003, + 0x81C, 0x01760003, + 0x81C, 0x01780003, + 0x81C, 0x017A0003, + 0x81C, 0x017C0003, + 0x81C, 0x017E0003, + 0x81C, 0xFF000813, + 0x81C, 0xFE020813, + 0x81C, 0xFD040813, + 0x81C, 0xFC060813, + 0x81C, 0xFB080813, + 0x81C, 0xFA0A0813, + 0x81C, 0xF90C0813, + 0x81C, 0xF80E0813, + 0x81C, 0xF7100813, + 0x81C, 0xF6120813, + 0x81C, 0xF5140813, + 0x81C, 0xF4160813, + 0x81C, 0xF3180813, + 0x81C, 0xF21A0813, + 0x81C, 0xF11C0813, + 0x81C, 0x961E0813, + 0x81C, 0x95200813, + 0x81C, 0x94220813, + 0x81C, 0x93240813, + 0x81C, 0x92260813, + 0x81C, 0x91280813, + 0x81C, 0x8F2A0813, + 0x81C, 0x8E2C0813, + 0x81C, 0x8D2E0813, + 0x81C, 0x8C300813, + 0x81C, 0x8B320813, + 0x81C, 0x8A340813, + 0x81C, 0x89360813, + 0x81C, 0x88380813, + 0x81C, 0x873A0813, + 0x81C, 0x863C0813, + 0x81C, 0x853E0813, + 0x81C, 0x84400813, + 0x81C, 0x83420813, + 0x81C, 0x82440813, + 0x81C, 0x08460813, + 0x81C, 0x07480813, + 0x81C, 0x064A0813, + 0x81C, 0x054C0813, + 0x81C, 0x044E0813, + 0x81C, 0x03500813, + 0x81C, 0x02520813, + 0x81C, 0x89540803, + 0x81C, 0x88560803, + 0x81C, 0x87580803, + 0x81C, 0x865A0803, + 0x81C, 0x855C0803, + 0x81C, 0x845E0803, + 0x81C, 0x83600803, + 0x81C, 0x82620803, + 0x81C, 0x07640803, + 0x81C, 0x06660803, + 0x81C, 0x05680803, + 0x81C, 0x046A0803, + 0x81C, 0x036C0803, + 0x81C, 0x026E0803, + 0x81C, 0x01700803, + 0x81C, 0x01720803, + 0x81C, 0x01740803, + 0x81C, 0x01760803, + 0x81C, 0x01780803, + 0x81C, 0x017A0803, + 0x81C, 0x017C0803, + 0x81C, 0x017E0803, + 0xB0000000, 0x00000000, +}; + +RTW_DECL_TABLE_PHY_COND(rtw8821c_agc_btg_type2, rtw_phy_cfg_agc); + static const u32 rtw8821c_bb[] = { 0x800, 0x9020D010, 0x804, 0x80018180, @@ -1394,7 +1787,11 @@ static const u32 rtw8821c_bb[] = { 0x8C0, 0xFFE04020, 0x8C4, 0x47C00000, 0x8C8, 0x00025165, + 0x82000400, 0x00000000, 0x40000000, 0x00000000, + 0x8CC, 0x08190492, + 0xA0000000, 0x00000000, 0x8CC, 0x08188492, + 0xB0000000, 0x00000000, 0x8D0, 0x0000B800, 0x8D4, 0x860308A0, 0x8D8, 0x290B5612, diff --git a/drivers/net/wireless/realtek/rtw88/rtw8821c_table.h b/drivers/net/wireless/realtek/rtw88/rtw8821c_table.h index 5ea8b4fc7f..cda98f5c4a 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8821c_table.h +++ b/drivers/net/wireless/realtek/rtw88/rtw8821c_table.h @@ -7,6 +7,7 @@ extern const struct rtw_table rtw8821c_mac_tbl; extern const struct rtw_table rtw8821c_agc_tbl; +extern const struct rtw_table rtw8821c_agc_btg_type2_tbl; extern const struct rtw_table rtw8821c_bb_tbl; extern const struct rtw_table rtw8821c_bb_pg_type0_tbl; extern const struct rtw_table rtw8821c_rf_a_tbl; diff --git a/drivers/net/wireless/realtek/rtw88/rtw8821ce.c b/drivers/net/wireless/realtek/rtw88/rtw8821ce.c index 616fdcfd62..f3d971feda 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8821ce.c +++ b/drivers/net/wireless/realtek/rtw88/rtw8821ce.c @@ -4,9 +4,14 @@ #include #include -#include "rtw8821ce.h" +#include "pci.h" +#include "rtw8821c.h" static const struct pci_device_id rtw_8821ce_id_table[] = { + { + PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0xB821), + .driver_data = (kernel_ulong_t)&rtw8821c_hw_spec + }, { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0xC821), .driver_data = (kernel_ulong_t)&rtw8821c_hw_spec diff --git a/drivers/net/wireless/realtek/rtw88/rtw8821cs.c b/drivers/net/wireless/realtek/rtw88/rtw8821cs.c new file mode 100644 index 0000000000..649f41baa0 --- /dev/null +++ b/drivers/net/wireless/realtek/rtw88/rtw8821cs.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* Copyright(c) Martin Blumenstingl + */ + +#include +#include "sdio_ids.h" +#include +#include "main.h" +#include "rtw8821c.h" +#include "sdio.h" + +static const struct sdio_device_id rtw_8821cs_id_table[] = { + { + SDIO_DEVICE(SDIO_VENDOR_ID_REALTEK, + SDIO_DEVICE_ID_REALTEK_RTW8821CS), + .driver_data = (kernel_ulong_t)&rtw8821c_hw_spec, + }, + {} +}; +MODULE_DEVICE_TABLE(sdio, rtw_8821cs_id_table); + +static struct sdio_driver rtw_8821cs_driver = { + .name = "rtw_8821cs", + .probe = rtw_sdio_probe, + .remove = rtw_sdio_remove, + .id_table = rtw_8821cs_id_table, + .drv = { + .pm = &rtw_sdio_pm_ops, + .shutdown = rtw_sdio_shutdown, + } +}; +module_sdio_driver(rtw_8821cs_driver); + +MODULE_AUTHOR("Martin Blumenstingl "); +MODULE_DESCRIPTION("Realtek 802.11ac wireless 8821cs driver"); +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/net/wireless/realtek/rtw88/rtw8821cu.c b/drivers/net/wireless/realtek/rtw88/rtw8821cu.c new file mode 100644 index 0000000000..7a5cbdc31e --- /dev/null +++ b/drivers/net/wireless/realtek/rtw88/rtw8821cu.c @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* Copyright(c) 2018-2019 Realtek Corporation + */ + +#include +#include +#include "main.h" +#include "rtw8821c.h" +#include "usb.h" + +static const struct usb_device_id rtw_8821cu_id_table[] = { + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xb82b, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8821CU */ + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xb820, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8821CU */ + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc821, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8821CU */ + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc820, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8821CU */ + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc82a, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8821CU */ + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc82b, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8821CU */ + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc811, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8811CU */ + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0x8811, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8811CU */ + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0x2006, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* TOTOLINK A650UA v3 */ + {}, +}; +MODULE_DEVICE_TABLE(usb, rtw_8821cu_id_table); + +static int rtw_8821cu_probe(struct usb_interface *intf, + const struct usb_device_id *id) +{ + return rtw_usb_probe(intf, id); +} + +static struct usb_driver rtw_8821cu_driver = { + .name = "rtw_8821cu", + .id_table = rtw_8821cu_id_table, + .probe = rtw_8821cu_probe, + .disconnect = rtw_usb_disconnect, +}; +module_usb_driver(rtw_8821cu_driver); + +MODULE_AUTHOR("Hans Ulli Kroll "); +MODULE_DESCRIPTION("Realtek 802.11ac wireless 8821cu driver"); +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822b.c b/drivers/net/wireless/realtek/rtw88/rtw8822b.c index dbfd67c3f5..3017a9760d 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8822b.c +++ b/drivers/net/wireless/realtek/rtw88/rtw8822b.c @@ -15,6 +15,7 @@ #include "reg.h" #include "debug.h" #include "bf.h" +#include "regd.h" static void rtw8822b_config_trx_mode(struct rtw_dev *rtwdev, u8 tx_path, u8 rx_path, bool is_tx2_path); @@ -25,6 +26,18 @@ static void rtw8822be_efuse_parsing(struct rtw_efuse *efuse, ether_addr_copy(efuse->addr, map->e.mac_addr); } +static void rtw8822bu_efuse_parsing(struct rtw_efuse *efuse, + struct rtw8822b_efuse *map) +{ + ether_addr_copy(efuse->addr, map->u.mac_addr); +} + +static void rtw8822bs_efuse_parsing(struct rtw_efuse *efuse, + struct rtw8822b_efuse *map) +{ + ether_addr_copy(efuse->addr, map->s.mac_addr); +} + static int rtw8822b_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) { struct rtw_efuse *efuse = &rtwdev->efuse; @@ -55,6 +68,12 @@ static int rtw8822b_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) case RTW_HCI_TYPE_PCIE: rtw8822be_efuse_parsing(efuse, map); break; + case RTW_HCI_TYPE_USB: + rtw8822bu_efuse_parsing(efuse, map); + break; + case RTW_HCI_TYPE_SDIO: + rtw8822bs_efuse_parsing(efuse, map); + break; default: /* unsupported now */ return -ENOTSUPP; @@ -87,7 +106,7 @@ static const u32 rtw8822b_txscale_tbl[RTW_TXSCALE_SIZE] = { 0x2d3, 0x2fe, 0x32b, 0x35c, 0x38e, 0x3c4, 0x3fe }; -static const u8 rtw8822b_get_swing_index(struct rtw_dev *rtwdev) +static u8 rtw8822b_get_swing_index(struct rtw_dev *rtwdev) { u8 i = 0; u32 swing, table_value; @@ -261,6 +280,8 @@ static int rtw8822b_mac_init(struct rtw_dev *rtwdev) rtw_write8(rtwdev, REG_TCR + 1, WLAN_TX_FUNC_CFG1); rtw_write32(rtwdev, REG_WMAC_OPTION_FUNCTION + 8, WLAN_MAC_OPT_FUNC2); rtw_write8(rtwdev, REG_WMAC_OPTION_FUNCTION + 4, WLAN_MAC_OPT_NORM_FUNC1); + rtw_write8_set(rtwdev, REG_SND_PTCL_CTRL, + BIT_DIS_CHK_VHTSIGB_CRC); return 0; } @@ -1009,12 +1030,12 @@ static int rtw8822b_set_antenna(struct rtw_dev *rtwdev, antenna_tx, antenna_rx); if (!rtw8822b_check_rf_path(antenna_tx)) { - rtw_info(rtwdev, "unsupported tx path 0x%x\n", antenna_tx); + rtw_warn(rtwdev, "unsupported tx path 0x%x\n", antenna_tx); return -EINVAL; } if (!rtw8822b_check_rf_path(antenna_rx)) { - rtw_info(rtwdev, "unsupported rx path 0x%x\n", antenna_rx); + rtw_warn(rtwdev, "unsupported rx path 0x%x\n", antenna_rx); return -EINVAL; } @@ -1120,21 +1141,21 @@ static void rtw8822b_coex_cfg_init(struct rtw_dev *rtwdev) /* BT report packet sample rate */ /* 0x790[5:0]=0x5 */ - rtw_write8_set(rtwdev, REG_BT_TDMA_TIME, 0x05); + rtw_write8_mask(rtwdev, REG_BT_TDMA_TIME, BIT_MASK_SAMPLE_RATE, 0x5); /* enable BT counter statistics */ rtw_write8(rtwdev, REG_BT_STAT_CTRL, 0x1); /* enable PTA (3-wire function form BT side) */ rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_BT_PTA_EN); - rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_BT_AOD_GPIO3); + rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_PO_BT_PTA_PINS); /* enable PTA (tx/rx signal form WiFi side) */ rtw_write8_set(rtwdev, REG_QUEUE_CTRL, BIT_PTA_WL_TX_EN); /* wl tx signal to PTA not case EDCCA */ rtw_write8_clr(rtwdev, REG_QUEUE_CTRL, BIT_PTA_EDCCA_EN); /* GNT_BT=1 while select both */ - rtw_write8_set(rtwdev, REG_BT_COEX_V2, BIT_GNT_BT_POLARITY); + rtw_write16_set(rtwdev, REG_BT_COEX_V2, BIT_GNT_BT_POLARITY); } static void rtw8822b_coex_cfg_ant_switch(struct rtw_dev *rtwdev, @@ -1341,6 +1362,7 @@ static void rtw8822b_coex_cfg_wl_rx_gain(struct rtw_dev *rtwdev, bool low_gain) coex_dm->cur_wl_rx_low_gain_en = low_gain; if (coex_dm->cur_wl_rx_low_gain_en) { + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], Hi-Li Table On!\n"); for (i = 0; i < ARRAY_SIZE(wl_rx_low_gain_on); i++) rtw_write32(rtwdev, REG_RX_GAIN_EN, wl_rx_low_gain_on[i]); @@ -1350,6 +1372,7 @@ static void rtw8822b_coex_cfg_wl_rx_gain(struct rtw_dev *rtwdev, bool low_gain) rtw_write_rf(rtwdev, RF_PATH_B, RF_RCKD, 0x2, 0x1); rtw_write_rf(rtwdev, RF_PATH_B, RF_RCK, 0x3f, 0x3f); } else { + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], Hi-Li Table Off!\n"); for (i = 0; i < ARRAY_SIZE(wl_rx_low_gain_off); i++) rtw_write32(rtwdev, 0x81c, wl_rx_low_gain_off[i]); @@ -1434,7 +1457,7 @@ static void rtw8822b_pwrtrack_set(struct rtw_dev *rtwdev, u8 path) u8 pwr_idx_offset, tx_pwr_idx; u8 channel = rtwdev->hal.current_channel; u8 band_width = rtwdev->hal.current_band_width; - u8 regd = rtwdev->regd.txpwr_regd; + u8 regd = rtw_regd_get(rtwdev); u8 tx_rate = dm_info->tx_rate; u8 max_pwr_idx = rtwdev->chip->max_power_index; @@ -1550,6 +1573,48 @@ static void rtw8822b_bf_config_bfee(struct rtw_dev *rtwdev, struct rtw_vif *vif, rtw_warn(rtwdev, "wrong bfee role\n"); } +static void rtw8822b_adaptivity_init(struct rtw_dev *rtwdev) +{ + rtw_phy_set_edcca_th(rtwdev, RTW8822B_EDCCA_MAX, RTW8822B_EDCCA_MAX); + + /* mac edcca state setting */ + rtw_write32_clr(rtwdev, REG_TX_PTCL_CTRL, BIT_DIS_EDCCA); + rtw_write32_set(rtwdev, REG_RD_CTRL, BIT_EDCCA_MSK_CNTDOWN_EN); + rtw_write32_mask(rtwdev, REG_EDCCA_SOURCE, BIT_SOURCE_OPTION, + RTW8822B_EDCCA_SRC_DEF); + rtw_write32_mask(rtwdev, REG_EDCCA_POW_MA, BIT_MA_LEVEL, 0); + + /* edcca decision opt */ + rtw_write32_set(rtwdev, REG_EDCCA_DECISION, BIT_EDCCA_OPTION); +} + +static void rtw8822b_adaptivity(struct rtw_dev *rtwdev) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + s8 l2h, h2l; + u8 igi; + + igi = dm_info->igi_history[0]; + if (dm_info->edcca_mode == RTW_EDCCA_NORMAL) { + l2h = max_t(s8, igi + EDCCA_IGI_L2H_DIFF, EDCCA_TH_L2H_LB); + h2l = l2h - EDCCA_L2H_H2L_DIFF_NORMAL; + } else { + l2h = min_t(s8, igi, dm_info->l2h_th_ini); + h2l = l2h - EDCCA_L2H_H2L_DIFF; + } + + rtw_phy_set_edcca_th(rtwdev, l2h, h2l); +} + +static void rtw8822b_fill_txdesc_checksum(struct rtw_dev *rtwdev, + struct rtw_tx_pkt_info *pkt_info, + u8 *txdesc) +{ + size_t words = 32 / 2; /* calculate the first 32 bytes (16 words) */ + + fill_txdesc_checksum_common(txdesc, words); +} + static const struct rtw_pwr_seq_cmd trans_carddis_to_cardemu_8822b[] = { {0x0086, RTW_PWR_CUT_ALL_MSK, @@ -2123,6 +2188,9 @@ static struct rtw_chip_ops rtw8822b_ops = { .config_bfee = rtw8822b_bf_config_bfee, .set_gid_table = rtw_bf_set_gid_table, .cfg_csi_rate = rtw_bf_cfg_csi_rate, + .adaptivity_init = rtw8822b_adaptivity_init, + .adaptivity = rtw8822b_adaptivity, + .fill_txdesc_checksum = rtw8822b_fill_txdesc_checksum, .coex_set_init = rtw8822b_coex_cfg_init, .coex_set_ant_switch = rtw8822b_coex_cfg_ant_switch, @@ -2141,14 +2209,14 @@ static const struct coex_table_para table_sant_8822b[] = { {0xaaaaaaaa, 0xaaaaaaaa}, {0x5a5a5a5a, 0x5a5a5a5a}, {0xfafafafa, 0xfafafafa}, /* case-5 */ - {0x6a5a6a5a, 0xaaaaaaaa}, + {0x6a5a5555, 0xaaaaaaaa}, {0x6a5a56aa, 0x6a5a56aa}, {0x6a5a5a5a, 0x6a5a5a5a}, {0x66555555, 0x5a5a5a5a}, {0x66555555, 0x6a5a5a5a}, /* case-10 */ {0x66555555, 0xfafafafa}, {0x66555555, 0x5a5a5aaa}, - {0x66555555, 0x5aaa5aaa}, + {0x66555555, 0x6aaa5aaa}, {0x66555555, 0xaaaa5aaa}, {0x66555555, 0xaaaaaaaa}, /* case-15 */ {0xffff55ff, 0xfafafafa}, @@ -2158,13 +2226,16 @@ static const struct coex_table_para table_sant_8822b[] = { {0xaa5555aa, 0x6a5a5a5a}, /* case-20 */ {0xaa5555aa, 0xaaaaaaaa}, {0xffffffff, 0x5a5a5a5a}, - {0xffffffff, 0x6a5a5a5a}, + {0xffffffff, 0x5a5a5a5a}, {0xffffffff, 0x55555555}, {0xffffffff, 0x6a5a5aaa}, /* case-25 */ {0x55555555, 0x5a5a5a5a}, {0x55555555, 0xaaaaaaaa}, {0x55555555, 0x6a5a6a5a}, - {0x66556655, 0x66556655} + {0x66556655, 0x66556655}, + {0x66556aaa, 0x6a5a6aaa}, /* case-30 */ + {0xffffffff, 0x5aaa5aaa}, + {0x56555555, 0x5a5a5aaa}, }; /* Non-Shared-Antenna Coex Table */ @@ -2184,7 +2255,7 @@ static const struct coex_table_para table_nsant_8822b[] = { {0xffff55ff, 0xfafafafa}, {0xffff55ff, 0x5afa5afa}, {0xffff55ff, 0xaaaaaaaa}, - {0xaaffffaa, 0xfafafafa}, /* case-115 */ + {0xffff55ff, 0xffff55ff}, /* case-115 */ {0xaaffffaa, 0x5afa5afa}, {0xaaffffaa, 0xaaaaaaaa}, {0xffffffff, 0xfafafafa}, @@ -2213,7 +2284,7 @@ static const struct coex_tdma_para tdma_sant_8822b[] = { { {0x51, 0x08, 0x03, 0x10, 0x54} }, { {0x51, 0x08, 0x03, 0x10, 0x55} }, { {0x51, 0x08, 0x07, 0x10, 0x54} }, /* case-15 */ - { {0x51, 0x45, 0x03, 0x10, 0x10} }, + { {0x51, 0x45, 0x03, 0x10, 0x50} }, { {0x51, 0x3a, 0x03, 0x10, 0x50} }, { {0x51, 0x30, 0x03, 0x10, 0x50} }, { {0x51, 0x20, 0x03, 0x10, 0x50} }, @@ -2221,7 +2292,7 @@ static const struct coex_tdma_para tdma_sant_8822b[] = { { {0x51, 0x4a, 0x03, 0x10, 0x50} }, { {0x51, 0x0c, 0x03, 0x10, 0x54} }, { {0x55, 0x08, 0x03, 0x10, 0x54} }, - { {0x65, 0x10, 0x03, 0x11, 0x11} }, + { {0x65, 0x10, 0x03, 0x11, 0x10} }, { {0x51, 0x10, 0x03, 0x10, 0x51} }, /* case-25 */ { {0x51, 0x08, 0x03, 0x10, 0x50} }, { {0x61, 0x08, 0x03, 0x11, 0x11} } @@ -2230,7 +2301,7 @@ static const struct coex_tdma_para tdma_sant_8822b[] = { /* Non-Shared-Antenna TDMA */ static const struct coex_tdma_para tdma_nsant_8822b[] = { { {0x00, 0x00, 0x00, 0x00, 0x00} }, /* case-100 */ - { {0x61, 0x45, 0x03, 0x11, 0x11} }, + { {0x61, 0x45, 0x03, 0x11, 0x11} }, /* case-101 */ { {0x61, 0x3a, 0x03, 0x11, 0x11} }, { {0x61, 0x30, 0x03, 0x11, 0x11} }, { {0x61, 0x20, 0x03, 0x11, 0x11} }, @@ -2249,13 +2320,13 @@ static const struct coex_tdma_para tdma_nsant_8822b[] = { { {0x51, 0x3a, 0x03, 0x10, 0x50} }, { {0x51, 0x30, 0x03, 0x10, 0x50} }, { {0x51, 0x20, 0x03, 0x10, 0x50} }, - { {0x51, 0x10, 0x03, 0x10, 0x50} } /* case-120 */ + { {0x51, 0x10, 0x03, 0x10, 0x50} }, /* case-120 */ + { {0x51, 0x08, 0x03, 0x10, 0x50} } }; /* rssi in percentage % (dbm = % - 100) */ static const u8 wl_rssi_step_8822b[] = {60, 50, 44, 30}; static const u8 bt_rssi_step_8822b[] = {30, 30, 30, 30}; -static const struct coex_5g_afh_map afh_5g_8822b[] = { {0, 0, 0} }; /* wl_tx_dec_power, bt_tx_dec_power, wl_rx_gain, bt_rx_lna_constrain */ static const struct coex_rf_para rf_para_tx_8822b[] = { @@ -2276,6 +2347,27 @@ static const struct coex_rf_para rf_para_rx_8822b[] = { {1, 13, true, 1} }; +static const struct coex_5g_afh_map afh_5g_8822b[] = { + {120, 2, 4}, + {124, 8, 8}, + {128, 17, 8}, + {132, 26, 10}, + {136, 34, 8}, + {140, 42, 10}, + {144, 51, 8}, + {149, 62, 8}, + {153, 71, 10}, + {157, 77, 4}, + {118, 2, 4}, + {126, 12, 16}, + {134, 29, 16}, + {142, 46, 16}, + {151, 66, 16}, + {159, 76, 4}, + {122, 10, 20}, + {138, 37, 34}, + {155, 68, 20} +}; static_assert(ARRAY_SIZE(rf_para_tx_8822b) == ARRAY_SIZE(rf_para_rx_8822b)); static const u8 @@ -2428,7 +2520,12 @@ static const struct rtw_reg_domain coex_info_hw_regs_8822b[] = { {0xc50, MASKBYTE0, RTW_REG_DOMAIN_MAC8}, }; -struct rtw_chip_info rtw8822b_hw_spec = { +static struct rtw_hw_reg_offset rtw8822b_edcca_th[] = { + [EDCCA_TH_L2H_IDX] = {{.addr = 0x8a4, .mask = MASKBYTE0}, .offset = 0}, + [EDCCA_TH_H2L_IDX] = {{.addr = 0x8a4, .mask = MASKBYTE1}, .offset = 0}, +}; + +const struct rtw_chip_info rtw8822b_hw_spec = { .ops = &rtw8822b_ops, .id = RTW_CHIP_TYPE_8822B, .fw_name = "rtw88/rtw8822b_fw.bin", @@ -2443,12 +2540,13 @@ struct rtw_chip_info rtw8822b_hw_spec = { .txff_size = 262144, .rxff_size = 24576, .fw_rxff_size = 12288, + .rsvd_drv_pg_num = 8, .txgi_factor = 1, .is_pwr_by_rate_dec = true, .max_power_index = 0x3f, .csi_buf_pg_num = 0, .band = RTW_BAND_2G | RTW_BAND_5G, - .page_size = 128, + .page_size = TX_PAGE_SIZE, .dig_min = 0x1c, .ht_supported = true, .vht_supported = true, @@ -2476,11 +2574,18 @@ struct rtw_chip_info rtw8822b_hw_spec = { .bfer_su_max_num = 2, .bfer_mu_max_num = 1, .rx_ldpc = true, + .edcca_th = rtw8822b_edcca_th, + .l2h_th_ini_cs = 10 + EDCCA_IGI_BASE, + .l2h_th_ini_ad = -14 + EDCCA_IGI_BASE, + .ampdu_density = IEEE80211_HT_MPDU_DENSITY_2, + .max_scan_ie_len = IEEE80211_MAX_DATA_LEN, .coex_para_ver = 0x20070206, .bt_desired_ver = 0x6, .scbd_support = true, .new_scbd10_def = false, + .ble_hid_profile_support = false, + .wl_mimo_ps_support = false, .pstdma_type = COEX_PSTDMA_FORCE_LPSOFF, .bt_rssi_type = COEX_BTRSSI_RATIO, .ant_isolation = 15, diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822b.h b/drivers/net/wireless/realtek/rtw88/rtw8822b.h index 6211f4b547..2dc3a6660f 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8822b.h +++ b/drivers/net/wireless/realtek/rtw88/rtw8822b.h @@ -65,6 +65,11 @@ struct rtw8822be_efuse { u8 res7; }; +struct rtw8822bs_efuse { + u8 res4[0x4a]; /* 0xd0 */ + u8 mac_addr[ETH_ALEN]; /* 0x11a */ +} __packed; + struct rtw8822b_efuse { __le16 rtl_id; u8 res0[0x0e]; @@ -92,8 +97,9 @@ struct rtw8822b_efuse { u8 country_code[2]; u8 res[3]; union { - struct rtw8822bu_efuse u; struct rtw8822be_efuse e; + struct rtw8822bu_efuse u; + struct rtw8822bs_efuse s; }; }; @@ -140,6 +146,8 @@ _rtw_write32s_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data) #define GET_PHY_STAT_P1_RXSNR_B(phy_stat) \ le32_get_bits(*((__le32 *)(phy_stat) + 0x06), GENMASK(15, 8)) +#define RTW8822B_EDCCA_MAX 0x7f +#define RTW8822B_EDCCA_SRC_DEF 1 #define REG_HTSTFWT 0x800 #define REG_RXPSEL 0x808 #define BIT_RX_PSEL_RST (BIT(28) | BIT(29)) @@ -152,11 +160,17 @@ _rtw_write32s_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data) #define REG_L1PKWT 0x840 #define REG_MRC 0x850 #define REG_CLKTRK 0x860 +#define REG_EDCCA_POW_MA 0x8a0 +#define BIT_MA_LEVEL GENMASK(1, 0) #define REG_ADCCLK 0x8ac #define REG_ADC160 0x8c4 #define REG_ADC40 0x8c8 +#define REG_EDCCA_DECISION 0x8dc +#define BIT_EDCCA_OPTION BIT(5) #define REG_CDDTXP 0x93c #define REG_TXPSEL1 0x940 +#define REG_EDCCA_SOURCE 0x944 +#define BIT_SOURCE_OPTION GENMASK(29, 28) #define REG_ACBB0 0x948 #define REG_ACBBRXFIR 0x94c #define REG_ACGG2TBL 0x958 @@ -179,4 +193,6 @@ _rtw_write32s_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data) #define REG_ANTWT 0x1904 #define REG_IQKFAILMSK 0x1bf0 +extern const struct rtw_chip_info rtw8822b_hw_spec; + #endif diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822be.c b/drivers/net/wireless/realtek/rtw88/rtw8822be.c index 921916ae15..4994950776 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8822be.c +++ b/drivers/net/wireless/realtek/rtw88/rtw8822be.c @@ -4,7 +4,8 @@ #include #include -#include "rtw8822be.h" +#include "pci.h" +#include "rtw8822b.h" static const struct pci_device_id rtw_8822be_id_table[] = { { diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822bs.c b/drivers/net/wireless/realtek/rtw88/rtw8822bs.c new file mode 100644 index 0000000000..1ddef81dae --- /dev/null +++ b/drivers/net/wireless/realtek/rtw88/rtw8822bs.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* Copyright(c) Jernej Skrabec + */ + +#include +#include "sdio_ids.h" +#include +#include "main.h" +#include "rtw8822b.h" +#include "sdio.h" + +static const struct sdio_device_id rtw_8822bs_id_table[] = { + { + SDIO_DEVICE(SDIO_VENDOR_ID_REALTEK, + SDIO_DEVICE_ID_REALTEK_RTW8822BS), + .driver_data = (kernel_ulong_t)&rtw8822b_hw_spec, + }, + {} +}; +MODULE_DEVICE_TABLE(sdio, rtw_8822bs_id_table); + +static struct sdio_driver rtw_8822bs_driver = { + .name = "rtw_8822bs", + .probe = rtw_sdio_probe, + .remove = rtw_sdio_remove, + .id_table = rtw_8822bs_id_table, + .drv = { + .pm = &rtw_sdio_pm_ops, + .shutdown = rtw_sdio_shutdown, + } +}; +module_sdio_driver(rtw_8822bs_driver); + +MODULE_AUTHOR("Jernej Skrabec "); +MODULE_DESCRIPTION("Realtek 802.11ac wireless 8822bs driver"); +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822bu.c b/drivers/net/wireless/realtek/rtw88/rtw8822bu.c new file mode 100644 index 0000000000..ab620a0b1d --- /dev/null +++ b/drivers/net/wireless/realtek/rtw88/rtw8822bu.c @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* Copyright(c) 2018-2019 Realtek Corporation + */ + +#include +#include +#include "main.h" +#include "rtw8822b.h" +#include "usb.h" + +static const struct usb_device_id rtw_8822bu_id_table[] = { + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xb812, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xb82c, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0x2102, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* CCNC */ + { USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xb822, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Edimax EW-7822ULC */ + { USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xc822, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Edimax EW-7822UTC */ + { USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xd822, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Edimax */ + { USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xe822, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Edimax */ + { USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xf822, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Edimax EW-7822UAD */ + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xb81a, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Default ID */ + { USB_DEVICE_AND_INTERFACE_INFO(0x0b05, 0x1841, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* ASUS AC1300 USB-AC55 B1 */ + { USB_DEVICE_AND_INTERFACE_INFO(0x0b05, 0x184c, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* ASUS U2 */ + { USB_DEVICE_AND_INTERFACE_INFO(0x0B05, 0x19aa, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* ASUS - USB-AC58 rev A1 */ + { USB_DEVICE_AND_INTERFACE_INFO(0x0B05, 0x1870, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* ASUS */ + { USB_DEVICE_AND_INTERFACE_INFO(0x0B05, 0x1874, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* ASUS */ + { USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x331e, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Dlink - DWA-181 */ + { USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x331c, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Dlink - DWA-182 - D1 */ + {USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x331f, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec)}, /* Dlink - DWA-183 D Ver */ + { USB_DEVICE_AND_INTERFACE_INFO(0x13b1, 0x0043, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Linksys WUSB6400M */ + { USB_DEVICE_AND_INTERFACE_INFO(0x13b1, 0x0045, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Linksys WUSB3600 v2 */ + { USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x012d, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TP-Link Archer T3U v1 */ + { USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x0138, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TP-Link Archer T3U Plus v1 */ + { USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x0115, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TP-Link Archer T4U V3 */ + { USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x012e, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TP-LINK */ + { USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x0116, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TP-LINK */ + { USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x0117, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TP-LINK */ + { USB_DEVICE_AND_INTERFACE_INFO(0x0846, 0x9055, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Netgear A6150 */ + { USB_DEVICE_AND_INTERFACE_INFO(0x0e66, 0x0025, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Hawking HW12ACU */ + { USB_DEVICE_AND_INTERFACE_INFO(0x04ca, 0x8602, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* LiteOn */ + { USB_DEVICE_AND_INTERFACE_INFO(0x20f4, 0x808a, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TRENDnet TEW-808UBM */ + {}, +}; +MODULE_DEVICE_TABLE(usb, rtw_8822bu_id_table); + +static int rtw8822bu_probe(struct usb_interface *intf, + const struct usb_device_id *id) +{ + return rtw_usb_probe(intf, id); +} + +static struct usb_driver rtw_8822bu_driver = { + .name = "rtw_8822bu", + .id_table = rtw_8822bu_id_table, + .probe = rtw8822bu_probe, + .disconnect = rtw_usb_disconnect, +}; +module_usb_driver(rtw_8822bu_driver); + +MODULE_AUTHOR("Realtek Corporation"); +MODULE_DESCRIPTION("Realtek 802.11ac wireless 8822bu driver"); +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822c.c b/drivers/net/wireless/realtek/rtw88/rtw8822c.c index cee5863355..8078127a5e 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8822c.c +++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.c @@ -18,6 +18,8 @@ #include "bf.h" #include "efuse.h" +#define IQK_DONE_8822C 0xaa + static void rtw8822c_config_trx_mode(struct rtw_dev *rtwdev, u8 tx_path, u8 rx_path, bool is_tx2_path); @@ -27,6 +29,18 @@ static void rtw8822ce_efuse_parsing(struct rtw_efuse *efuse, ether_addr_copy(efuse->addr, map->e.mac_addr); } +static void rtw8822cu_efuse_parsing(struct rtw_efuse *efuse, + struct rtw8822c_efuse *map) +{ + ether_addr_copy(efuse->addr, map->u.mac_addr); +} + +static void rtw8822cs_efuse_parsing(struct rtw_efuse *efuse, + struct rtw8822c_efuse *map) +{ + ether_addr_copy(efuse->addr, map->s.mac_addr); +} + static int rtw8822c_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) { struct rtw_efuse *efuse = &rtwdev->efuse; @@ -37,7 +51,7 @@ static int rtw8822c_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) efuse->rfe_option = map->rfe_option; efuse->rf_board_option = map->rf_board_option; - efuse->crystal_cap = map->xtal_k; + efuse->crystal_cap = map->xtal_k & XCAP_MASK; efuse->channel_plan = map->channel_plan; efuse->country_code[0] = map->country_code[0]; efuse->country_code[1] = map->country_code[1]; @@ -56,6 +70,12 @@ static int rtw8822c_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) case RTW_HCI_TYPE_PCIE: rtw8822ce_efuse_parsing(efuse, map); break; + case RTW_HCI_TYPE_USB: + rtw8822cu_efuse_parsing(efuse, map); + break; + case RTW_HCI_TYPE_SDIO: + rtw8822cs_efuse_parsing(efuse, map); + break; default: /* unsupported now */ return -ENOTSUPP; @@ -77,6 +97,13 @@ static void rtw8822c_header_file_init(struct rtw_dev *rtwdev, bool pre) rtw_write32_set(rtwdev, REG_ENCCK, BIT_CCK_OFDM_BLK_EN); } +static void rtw8822c_bb_reset(struct rtw_dev *rtwdev) +{ + rtw_write16_set(rtwdev, REG_SYS_FUNC_EN, BIT_FEN_BB_RSTB); + rtw_write16_clr(rtwdev, REG_SYS_FUNC_EN, BIT_FEN_BB_RSTB); + rtw_write16_set(rtwdev, REG_SYS_FUNC_EN, BIT_FEN_BB_RSTB); +} + static void rtw8822c_dac_backup_reg(struct rtw_dev *rtwdev, struct rtw_backup_info *backup, struct rtw_backup_info *backup_rf) @@ -1092,16 +1119,721 @@ static void rtw8822c_pa_bias(struct rtw_dev *rtwdev) if (pg_pa_bias == EFUSE_READ_FAIL) return; pg_pa_bias = FIELD_GET(PPG_PABIAS_MASK, pg_pa_bias); - rtw_write_rf(rtwdev, path, 0x60, RF_PABIAS_2G_MASK, pg_pa_bias); + rtw_write_rf(rtwdev, path, RF_PA, RF_PABIAS_2G_MASK, pg_pa_bias); } for (path = 0; path < rtwdev->hal.rf_path_num; path++) { rtw_read8_physical_efuse(rtwdev, rf_efuse_5g[path], &pg_pa_bias); pg_pa_bias = FIELD_GET(PPG_PABIAS_MASK, pg_pa_bias); - rtw_write_rf(rtwdev, path, 0x60, RF_PABIAS_5G_MASK, pg_pa_bias); + rtw_write_rf(rtwdev, path, RF_PA, RF_PABIAS_5G_MASK, pg_pa_bias); + } +} + +static void rtw8822c_rfk_handshake(struct rtw_dev *rtwdev, bool is_before_k) +{ + struct rtw_dm_info *dm = &rtwdev->dm_info; + u8 u1b_tmp; + u8 u4b_tmp; + int ret; + + if (is_before_k) { + rtw_dbg(rtwdev, RTW_DBG_RFK, + "[RFK] WiFi / BT RFK handshake start!!\n"); + + if (!dm->is_bt_iqk_timeout) { + ret = read_poll_timeout(rtw_read32_mask, u4b_tmp, + u4b_tmp == 0, 20, 600000, false, + rtwdev, REG_PMC_DBG_CTRL1, + BITS_PMC_BT_IQK_STS); + if (ret) { + rtw_dbg(rtwdev, RTW_DBG_RFK, + "[RFK] Wait BT IQK finish timeout!!\n"); + dm->is_bt_iqk_timeout = true; + } + } + + rtw_fw_inform_rfk_status(rtwdev, true); + + ret = read_poll_timeout(rtw_read8_mask, u1b_tmp, + u1b_tmp == 1, 20, 100000, false, + rtwdev, REG_ARFR4, BIT_WL_RFK); + if (ret) + rtw_dbg(rtwdev, RTW_DBG_RFK, + "[RFK] Send WiFi RFK start H2C cmd FAIL!!\n"); + } else { + rtw_fw_inform_rfk_status(rtwdev, false); + ret = read_poll_timeout(rtw_read8_mask, u1b_tmp, + u1b_tmp == 1, 20, 100000, false, + rtwdev, REG_ARFR4, + BIT_WL_RFK); + if (ret) + rtw_dbg(rtwdev, RTW_DBG_RFK, + "[RFK] Send WiFi RFK finish H2C cmd FAIL!!\n"); + + rtw_dbg(rtwdev, RTW_DBG_RFK, + "[RFK] WiFi / BT RFK handshake finish!!\n"); + } +} + +static void rtw8822c_rfk_power_save(struct rtw_dev *rtwdev, + bool is_power_save) +{ + u8 path; + + for (path = 0; path < rtwdev->hal.rf_path_num; path++) { + rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path); + rtw_write32_mask(rtwdev, REG_DPD_CTL1_S0, BIT_PS_EN, + is_power_save ? 0 : 1); + } +} + +static void rtw8822c_txgapk_backup_bb_reg(struct rtw_dev *rtwdev, const u32 reg[], + u32 reg_backup[], u32 reg_num) +{ + u32 i; + + for (i = 0; i < reg_num; i++) { + reg_backup[i] = rtw_read32(rtwdev, reg[i]); + + rtw_dbg(rtwdev, RTW_DBG_RFK, "[TXGAPK] Backup BB 0x%x = 0x%x\n", + reg[i], reg_backup[i]); + } +} + +static void rtw8822c_txgapk_reload_bb_reg(struct rtw_dev *rtwdev, + const u32 reg[], u32 reg_backup[], + u32 reg_num) +{ + u32 i; + + for (i = 0; i < reg_num; i++) { + rtw_write32(rtwdev, reg[i], reg_backup[i]); + rtw_dbg(rtwdev, RTW_DBG_RFK, "[TXGAPK] Reload BB 0x%x = 0x%x\n", + reg[i], reg_backup[i]); + } +} + +static bool check_rf_status(struct rtw_dev *rtwdev, u8 status) +{ + u8 reg_rf0_a, reg_rf0_b; + + reg_rf0_a = (u8)rtw_read_rf(rtwdev, RF_PATH_A, + RF_MODE_TRXAGC, BIT_RF_MODE); + reg_rf0_b = (u8)rtw_read_rf(rtwdev, RF_PATH_B, + RF_MODE_TRXAGC, BIT_RF_MODE); + + if (reg_rf0_a == status || reg_rf0_b == status) + return false; + + return true; +} + +static void rtw8822c_txgapk_tx_pause(struct rtw_dev *rtwdev) +{ + bool status; + int ret; + + rtw_write8(rtwdev, REG_TXPAUSE, BIT_AC_QUEUE); + rtw_write32_mask(rtwdev, REG_TX_FIFO, BIT_STOP_TX, 0x2); + + ret = read_poll_timeout_atomic(check_rf_status, status, status, + 2, 5000, false, rtwdev, 2); + if (ret) + rtw_warn(rtwdev, "failed to pause TX\n"); + + rtw_dbg(rtwdev, RTW_DBG_RFK, "[TXGAPK] Tx pause!!\n"); +} + +static void rtw8822c_txgapk_bb_dpk(struct rtw_dev *rtwdev, u8 path) +{ + rtw_dbg(rtwdev, RTW_DBG_RFK, "[TXGAPK] ======>%s\n", __func__); + + rtw_write32_mask(rtwdev, REG_ENFN, BIT_IQK_DPK_EN, 0x1); + rtw_write32_mask(rtwdev, REG_CH_DELAY_EXTR2, + BIT_IQK_DPK_CLOCK_SRC, 0x1); + rtw_write32_mask(rtwdev, REG_CH_DELAY_EXTR2, + BIT_IQK_DPK_RESET_SRC, 0x1); + rtw_write32_mask(rtwdev, REG_CH_DELAY_EXTR2, BIT_EN_IOQ_IQK_DPK, 0x1); + rtw_write32_mask(rtwdev, REG_CH_DELAY_EXTR2, BIT_TST_IQK2SET_SRC, 0x0); + rtw_write32_mask(rtwdev, REG_CCA_OFF, BIT_CCA_ON_BY_PW, 0x1ff); + + if (path == RF_PATH_A) { + rtw_write32_mask(rtwdev, REG_RFTXEN_GCK_A, + BIT_RFTXEN_GCK_FORCE_ON, 0x1); + rtw_write32_mask(rtwdev, REG_3WIRE, BIT_DIS_SHARERX_TXGAT, 0x1); + rtw_write32_mask(rtwdev, REG_DIS_SHARE_RX_A, + BIT_TX_SCALE_0DB, 0x1); + rtw_write32_mask(rtwdev, REG_3WIRE, BIT_3WIRE_EN, 0x0); + } else if (path == RF_PATH_B) { + rtw_write32_mask(rtwdev, REG_RFTXEN_GCK_B, + BIT_RFTXEN_GCK_FORCE_ON, 0x1); + rtw_write32_mask(rtwdev, REG_3WIRE2, + BIT_DIS_SHARERX_TXGAT, 0x1); + rtw_write32_mask(rtwdev, REG_DIS_SHARE_RX_B, + BIT_TX_SCALE_0DB, 0x1); + rtw_write32_mask(rtwdev, REG_3WIRE2, BIT_3WIRE_EN, 0x0); + } + rtw_write32_mask(rtwdev, REG_CCKSB, BIT_BBMODE, 0x2); +} + +static void rtw8822c_txgapk_afe_dpk(struct rtw_dev *rtwdev, u8 path) +{ + u32 reg; + + rtw_dbg(rtwdev, RTW_DBG_RFK, "[TXGAPK] ======>%s\n", __func__); + + if (path == RF_PATH_A) { + reg = REG_ANAPAR_A; + } else if (path == RF_PATH_B) { + reg = REG_ANAPAR_B; + } else { + rtw_err(rtwdev, "[TXGAPK] unknown path %d!!\n", path); + return; + } + + rtw_write32_mask(rtwdev, REG_IQK_CTRL, MASKDWORD, MASKDWORD); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x700f0001); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x700f0001); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x701f0001); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x702f0001); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x703f0001); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x704f0001); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x705f0001); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x706f0001); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x707f0001); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x708f0001); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x709f0001); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70af0001); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70bf0001); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70cf0001); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70df0001); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70ef0001); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70ff0001); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70ff0001); +} + +static void rtw8822c_txgapk_afe_dpk_restore(struct rtw_dev *rtwdev, u8 path) +{ + u32 reg; + + rtw_dbg(rtwdev, RTW_DBG_RFK, "[TXGAPK] ======>%s\n", __func__); + + if (path == RF_PATH_A) { + reg = REG_ANAPAR_A; + } else if (path == RF_PATH_B) { + reg = REG_ANAPAR_B; + } else { + rtw_err(rtwdev, "[TXGAPK] unknown path %d!!\n", path); + return; + } + rtw_write32_mask(rtwdev, REG_IQK_CTRL, MASKDWORD, 0xffa1005e); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x700b8041); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70144041); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70244041); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70344041); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70444041); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x705b8041); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70644041); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x707b8041); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x708b8041); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x709b8041); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70ab8041); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70bb8041); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70cb8041); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70db8041); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70eb8041); + rtw_write32_mask(rtwdev, reg, MASKDWORD, 0x70fb8041); +} + +static void rtw8822c_txgapk_bb_dpk_restore(struct rtw_dev *rtwdev, u8 path) +{ + rtw_dbg(rtwdev, RTW_DBG_RFK, "[TXGAPK] ======>%s\n", __func__); + + rtw_write_rf(rtwdev, path, RF_DEBUG, BIT_DE_TX_GAIN, 0x0); + rtw_write_rf(rtwdev, path, RF_DIS_BYPASS_TXBB, BIT_TIA_BYPASS, 0x0); + rtw_write_rf(rtwdev, path, RF_DIS_BYPASS_TXBB, BIT_TXBB, 0x0); + + rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, 0x0); + rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0); + rtw_write32_mask(rtwdev, REG_SINGLE_TONE_SW, BIT_IRQ_TEST_MODE, 0x0); + rtw_write32_mask(rtwdev, REG_R_CONFIG, MASKBYTE0, 0x00); + rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, 0x1); + rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0); + rtw_write32_mask(rtwdev, REG_SINGLE_TONE_SW, BIT_IRQ_TEST_MODE, 0x0); + rtw_write32_mask(rtwdev, REG_R_CONFIG, MASKBYTE0, 0x00); + rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, 0x0); + rtw_write32_mask(rtwdev, REG_CCA_OFF, BIT_CCA_ON_BY_PW, 0x0); + + if (path == RF_PATH_A) { + rtw_write32_mask(rtwdev, REG_RFTXEN_GCK_A, + BIT_RFTXEN_GCK_FORCE_ON, 0x0); + rtw_write32_mask(rtwdev, REG_3WIRE, BIT_DIS_SHARERX_TXGAT, 0x0); + rtw_write32_mask(rtwdev, REG_DIS_SHARE_RX_A, + BIT_TX_SCALE_0DB, 0x0); + rtw_write32_mask(rtwdev, REG_3WIRE, BIT_3WIRE_EN, 0x3); + } else if (path == RF_PATH_B) { + rtw_write32_mask(rtwdev, REG_RFTXEN_GCK_B, + BIT_RFTXEN_GCK_FORCE_ON, 0x0); + rtw_write32_mask(rtwdev, REG_3WIRE2, + BIT_DIS_SHARERX_TXGAT, 0x0); + rtw_write32_mask(rtwdev, REG_DIS_SHARE_RX_B, + BIT_TX_SCALE_0DB, 0x0); + rtw_write32_mask(rtwdev, REG_3WIRE2, BIT_3WIRE_EN, 0x3); + } + + rtw_write32_mask(rtwdev, REG_CCKSB, BIT_BBMODE, 0x0); + rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_CFIR_EN, 0x5); +} + +static bool _rtw8822c_txgapk_gain_valid(struct rtw_dev *rtwdev, u32 gain) +{ + if ((FIELD_GET(BIT_GAIN_TX_PAD_H, gain) >= 0xc) && + (FIELD_GET(BIT_GAIN_TX_PAD_L, gain) >= 0xe)) + return true; + + return false; +} + +static void _rtw8822c_txgapk_write_gain_bb_table(struct rtw_dev *rtwdev, + u8 band, u8 path) +{ + struct rtw_gapk_info *txgapk = &rtwdev->dm_info.gapk; + u32 v, tmp_3f = 0; + u8 gain, check_txgain; + + rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path); + + switch (band) { + case RF_BAND_2G_OFDM: + rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x0); + break; + case RF_BAND_5G_L: + rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x2); + break; + case RF_BAND_5G_M: + rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x3); + break; + case RF_BAND_5G_H: + rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x4); + break; + default: + break; + } + + rtw_write32_mask(rtwdev, REG_TX_GAIN_SET, MASKBYTE0, 0x88); + + check_txgain = 0; + for (gain = 0; gain < RF_GAIN_NUM; gain++) { + v = txgapk->rf3f_bp[band][gain][path]; + if (_rtw8822c_txgapk_gain_valid(rtwdev, v)) { + if (!check_txgain) { + tmp_3f = txgapk->rf3f_bp[band][gain][path]; + check_txgain = 1; + } + rtw_dbg(rtwdev, RTW_DBG_RFK, + "[TXGAPK] tx_gain=0x%03X >= 0xCEX\n", + txgapk->rf3f_bp[band][gain][path]); + } else { + tmp_3f = txgapk->rf3f_bp[band][gain][path]; + } + + rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN, tmp_3f); + rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_I_GAIN, gain); + rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_GAIN_RST, 0x1); + rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_GAIN_RST, 0x0); + + rtw_dbg(rtwdev, RTW_DBG_RFK, + "[TXGAPK] Band=%d 0x1b98[11:0]=0x%03X path=%d\n", + band, tmp_3f, path); } } +static void rtw8822c_txgapk_write_gain_bb_table(struct rtw_dev *rtwdev) +{ + u8 path, band; + + rtw_dbg(rtwdev, RTW_DBG_RFK, "[TXGAPK] ======>%s channel=%d\n", + __func__, rtwdev->dm_info.gapk.channel); + + for (band = 0; band < RF_BAND_MAX; band++) { + for (path = 0; path < rtwdev->hal.rf_path_num; path++) { + _rtw8822c_txgapk_write_gain_bb_table(rtwdev, + band, path); + } + } +} + +static void rtw8822c_txgapk_read_offset(struct rtw_dev *rtwdev, u8 path) +{ + static const u32 cfg1_1b00[2] = {0x00000d18, 0x00000d2a}; + static const u32 cfg2_1b00[2] = {0x00000d19, 0x00000d2b}; + static const u32 set_pi[2] = {REG_RSV_CTRL, REG_WLRF1}; + static const u32 path_setting[2] = {REG_ORITXCODE, REG_ORITXCODE2}; + struct rtw_gapk_info *txgapk = &rtwdev->dm_info.gapk; + u8 channel = txgapk->channel; + u32 val; + int i; + + if (path >= ARRAY_SIZE(cfg1_1b00) || + path >= ARRAY_SIZE(cfg2_1b00) || + path >= ARRAY_SIZE(set_pi) || + path >= ARRAY_SIZE(path_setting)) { + rtw_warn(rtwdev, "[TXGAPK] wrong path %d\n", path); + return; + } + + rtw_write32_mask(rtwdev, REG_ANTMAP0, BIT_ANT_PATH, path + 1); + rtw_write32_mask(rtwdev, REG_TXLGMAP, MASKDWORD, 0xe4e40000); + rtw_write32_mask(rtwdev, REG_TXANTSEG, BIT_ANTSEG, 0x3); + rtw_write32_mask(rtwdev, path_setting[path], MASK20BITS, 0x33312); + rtw_write32_mask(rtwdev, path_setting[path], BIT_PATH_EN, 0x1); + rtw_write32_mask(rtwdev, set_pi[path], BITS_RFC_DIRECT, 0x0); + rtw_write_rf(rtwdev, path, RF_LUTDBG, BIT_TXA_TANK, 0x1); + rtw_write_rf(rtwdev, path, RF_IDAC, BIT_TX_MODE, 0x820); + rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path); + rtw_write32_mask(rtwdev, REG_IQKSTAT, MASKBYTE0, 0x0); + + rtw_write32_mask(rtwdev, REG_TX_TONE_IDX, MASKBYTE0, 0x018); + fsleep(1000); + if (channel >= 1 && channel <= 14) + rtw_write32_mask(rtwdev, REG_R_CONFIG, MASKBYTE0, BIT_2G_SWING); + else + rtw_write32_mask(rtwdev, REG_R_CONFIG, MASKBYTE0, BIT_5G_SWING); + fsleep(1000); + + rtw_write32_mask(rtwdev, REG_NCTL0, MASKDWORD, cfg1_1b00[path]); + rtw_write32_mask(rtwdev, REG_NCTL0, MASKDWORD, cfg2_1b00[path]); + + read_poll_timeout(rtw_read32_mask, val, + val == 0x55, 1000, 100000, false, + rtwdev, REG_RPT_CIP, BIT_RPT_CIP_STATUS); + + rtw_write32_mask(rtwdev, set_pi[path], BITS_RFC_DIRECT, 0x2); + rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path); + rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_RPT_EN, 0x1); + rtw_write32_mask(rtwdev, REG_RXSRAM_CTL, BIT_RPT_SEL, 0x12); + rtw_write32_mask(rtwdev, REG_TX_GAIN_SET, BIT_GAPK_RPT_IDX, 0x3); + val = rtw_read32(rtwdev, REG_STAT_RPT); + + txgapk->offset[0][path] = (s8)FIELD_GET(BIT_GAPK_RPT0, val); + txgapk->offset[1][path] = (s8)FIELD_GET(BIT_GAPK_RPT1, val); + txgapk->offset[2][path] = (s8)FIELD_GET(BIT_GAPK_RPT2, val); + txgapk->offset[3][path] = (s8)FIELD_GET(BIT_GAPK_RPT3, val); + txgapk->offset[4][path] = (s8)FIELD_GET(BIT_GAPK_RPT4, val); + txgapk->offset[5][path] = (s8)FIELD_GET(BIT_GAPK_RPT5, val); + txgapk->offset[6][path] = (s8)FIELD_GET(BIT_GAPK_RPT6, val); + txgapk->offset[7][path] = (s8)FIELD_GET(BIT_GAPK_RPT7, val); + + rtw_write32_mask(rtwdev, REG_TX_GAIN_SET, BIT_GAPK_RPT_IDX, 0x4); + val = rtw_read32(rtwdev, REG_STAT_RPT); + + txgapk->offset[8][path] = (s8)FIELD_GET(BIT_GAPK_RPT0, val); + txgapk->offset[9][path] = (s8)FIELD_GET(BIT_GAPK_RPT1, val); + + for (i = 0; i < RF_HW_OFFSET_NUM; i++) + if (txgapk->offset[i][path] & BIT(3)) + txgapk->offset[i][path] = txgapk->offset[i][path] | + 0xf0; + for (i = 0; i < RF_HW_OFFSET_NUM; i++) + rtw_dbg(rtwdev, RTW_DBG_RFK, + "[TXGAPK] offset %d %d path=%d\n", + txgapk->offset[i][path], i, path); +} + +static void rtw8822c_txgapk_calculate_offset(struct rtw_dev *rtwdev, u8 path) +{ + static const u32 bb_reg[] = {REG_ANTMAP0, REG_TXLGMAP, REG_TXANTSEG, + REG_ORITXCODE, REG_ORITXCODE2}; + struct rtw_gapk_info *txgapk = &rtwdev->dm_info.gapk; + u8 channel = txgapk->channel; + u32 reg_backup[ARRAY_SIZE(bb_reg)] = {0}; + + rtw_dbg(rtwdev, RTW_DBG_RFK, "[TXGAPK] ======>%s channel=%d\n", + __func__, channel); + + rtw8822c_txgapk_backup_bb_reg(rtwdev, bb_reg, + reg_backup, ARRAY_SIZE(bb_reg)); + + if (channel >= 1 && channel <= 14) { + rtw_write32_mask(rtwdev, + REG_SINGLE_TONE_SW, BIT_IRQ_TEST_MODE, 0x0); + rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path); + rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x3f); + rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0); + rtw_write_rf(rtwdev, path, RF_DEBUG, BIT_DE_TX_GAIN, 0x1); + rtw_write_rf(rtwdev, path, RF_MODE_TRXAGC, RFREG_MASK, 0x5000f); + rtw_write_rf(rtwdev, path, RF_TX_GAIN_OFFSET, BIT_RF_GAIN, 0x0); + rtw_write_rf(rtwdev, path, RF_RXG_GAIN, BIT_RXG_GAIN, 0x1); + rtw_write_rf(rtwdev, path, RF_MODE_TRXAGC, BIT_RXAGC, 0x0f); + rtw_write_rf(rtwdev, path, RF_DEBUG, BIT_DE_TRXBW, 0x1); + rtw_write_rf(rtwdev, path, RF_BW_TRXBB, BIT_BW_TXBB, 0x1); + rtw_write_rf(rtwdev, path, RF_BW_TRXBB, BIT_BW_RXBB, 0x0); + rtw_write_rf(rtwdev, path, RF_EXT_TIA_BW, BIT_PW_EXT_TIA, 0x1); + + rtw_write32_mask(rtwdev, REG_IQKSTAT, MASKBYTE0, 0x00); + rtw_write32_mask(rtwdev, REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x0); + + rtw8822c_txgapk_read_offset(rtwdev, path); + rtw_dbg(rtwdev, RTW_DBG_RFK, "=============================\n"); + + } else { + rtw_write32_mask(rtwdev, + REG_SINGLE_TONE_SW, BIT_IRQ_TEST_MODE, 0x0); + rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SEL_PATH, path); + rtw_write32_mask(rtwdev, REG_R_CONFIG, BIT_IQ_SWITCH, 0x3f); + rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x0); + rtw_write_rf(rtwdev, path, RF_DEBUG, BIT_DE_TX_GAIN, 0x1); + rtw_write_rf(rtwdev, path, RF_MODE_TRXAGC, RFREG_MASK, 0x50011); + rtw_write_rf(rtwdev, path, RF_TXA_LB_SW, BIT_TXA_LB_ATT, 0x3); + rtw_write_rf(rtwdev, path, RF_TXA_LB_SW, BIT_LB_ATT, 0x3); + rtw_write_rf(rtwdev, path, RF_TXA_LB_SW, BIT_LB_SW, 0x1); + rtw_write_rf(rtwdev, path, + RF_RXA_MIX_GAIN, BIT_RXA_MIX_GAIN, 0x2); + rtw_write_rf(rtwdev, path, RF_MODE_TRXAGC, BIT_RXAGC, 0x12); + rtw_write_rf(rtwdev, path, RF_DEBUG, BIT_DE_TRXBW, 0x1); + rtw_write_rf(rtwdev, path, RF_BW_TRXBB, BIT_BW_RXBB, 0x0); + rtw_write_rf(rtwdev, path, RF_EXT_TIA_BW, BIT_PW_EXT_TIA, 0x1); + rtw_write_rf(rtwdev, path, RF_MODE_TRXAGC, BIT_RF_MODE, 0x5); + + rtw_write32_mask(rtwdev, REG_IQKSTAT, MASKBYTE0, 0x0); + + if (channel >= 36 && channel <= 64) + rtw_write32_mask(rtwdev, + REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x2); + else if (channel >= 100 && channel <= 144) + rtw_write32_mask(rtwdev, + REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x3); + else if (channel >= 149 && channel <= 177) + rtw_write32_mask(rtwdev, + REG_TABLE_SEL, BIT_Q_GAIN_SEL, 0x4); + + rtw8822c_txgapk_read_offset(rtwdev, path); + rtw_dbg(rtwdev, RTW_DBG_RFK, "=============================\n"); + } + rtw8822c_txgapk_reload_bb_reg(rtwdev, bb_reg, + reg_backup, ARRAY_SIZE(bb_reg)); +} + +static void rtw8822c_txgapk_rf_restore(struct rtw_dev *rtwdev, u8 path) +{ + rtw_dbg(rtwdev, RTW_DBG_RFK, "[TXGAPK] ======>%s\n", __func__); + + if (path >= rtwdev->hal.rf_path_num) + return; + + rtw_write_rf(rtwdev, path, RF_MODE_TRXAGC, BIT_RF_MODE, 0x3); + rtw_write_rf(rtwdev, path, RF_DEBUG, BIT_DE_TRXBW, 0x0); + rtw_write_rf(rtwdev, path, RF_EXT_TIA_BW, BIT_PW_EXT_TIA, 0x0); +} + +static u32 rtw8822c_txgapk_cal_gain(struct rtw_dev *rtwdev, u32 gain, s8 offset) +{ + u32 gain_x2, new_gain; + + rtw_dbg(rtwdev, RTW_DBG_RFK, "[TXGAPK] ======>%s\n", __func__); + + if (_rtw8822c_txgapk_gain_valid(rtwdev, gain)) { + new_gain = gain; + rtw_dbg(rtwdev, RTW_DBG_RFK, + "[TXGAPK] gain=0x%03X(>=0xCEX) offset=%d new_gain=0x%03X\n", + gain, offset, new_gain); + return new_gain; + } + + gain_x2 = (gain << 1) + offset; + new_gain = (gain_x2 >> 1) | (gain_x2 & BIT(0) ? BIT_GAIN_EXT : 0); + + rtw_dbg(rtwdev, RTW_DBG_RFK, + "[TXGAPK] gain=0x%X offset=%d new_gain=0x%X\n", + gain, offset, new_gain); + + return new_gain; +} + +static void rtw8822c_txgapk_write_tx_gain(struct rtw_dev *rtwdev) +{ + struct rtw_gapk_info *txgapk = &rtwdev->dm_info.gapk; + u32 i, j, tmp = 0x20, tmp_3f, v; + s8 offset_tmp[RF_GAIN_NUM] = {0}; + u8 path, band = RF_BAND_2G_OFDM, channel = txgapk->channel; + + rtw_dbg(rtwdev, RTW_DBG_RFK, "[TXGAPK] ======>%s\n", __func__); + + if (channel >= 1 && channel <= 14) { + tmp = 0x20; + band = RF_BAND_2G_OFDM; + } else if (channel >= 36 && channel <= 64) { + tmp = 0x200; + band = RF_BAND_5G_L; + } else if (channel >= 100 && channel <= 144) { + tmp = 0x280; + band = RF_BAND_5G_M; + } else if (channel >= 149 && channel <= 177) { + tmp = 0x300; + band = RF_BAND_5G_H; + } else { + rtw_err(rtwdev, "[TXGAPK] unknown channel %d!!\n", channel); + return; + } + + for (path = 0; path < rtwdev->hal.rf_path_num; path++) { + for (i = 0; i < RF_GAIN_NUM; i++) { + offset_tmp[i] = 0; + for (j = i; j < RF_GAIN_NUM; j++) { + v = txgapk->rf3f_bp[band][j][path]; + if (_rtw8822c_txgapk_gain_valid(rtwdev, v)) + continue; + + offset_tmp[i] += txgapk->offset[j][path]; + txgapk->fianl_offset[i][path] = offset_tmp[i]; + } + + v = txgapk->rf3f_bp[band][i][path]; + if (_rtw8822c_txgapk_gain_valid(rtwdev, v)) { + rtw_dbg(rtwdev, RTW_DBG_RFK, + "[TXGAPK] tx_gain=0x%03X >= 0xCEX\n", + txgapk->rf3f_bp[band][i][path]); + } else { + txgapk->rf3f_fs[path][i] = offset_tmp[i]; + rtw_dbg(rtwdev, RTW_DBG_RFK, + "[TXGAPK] offset %d %d\n", + offset_tmp[i], i); + } + } + + rtw_write_rf(rtwdev, path, RF_LUTWE2, RFREG_MASK, 0x10000); + for (i = 0; i < RF_GAIN_NUM; i++) { + rtw_write_rf(rtwdev, path, + RF_LUTWA, RFREG_MASK, tmp + i); + + tmp_3f = rtw8822c_txgapk_cal_gain(rtwdev, + txgapk->rf3f_bp[band][i][path], + offset_tmp[i]); + rtw_write_rf(rtwdev, path, RF_LUTWD0, + BIT_GAIN_EXT | BIT_DATA_L, tmp_3f); + + rtw_dbg(rtwdev, RTW_DBG_RFK, + "[TXGAPK] 0x33=0x%05X 0x3f=0x%04X\n", + tmp + i, tmp_3f); + } + rtw_write_rf(rtwdev, path, RF_LUTWE2, RFREG_MASK, 0x0); + } +} + +static void rtw8822c_txgapk_save_all_tx_gain_table(struct rtw_dev *rtwdev) +{ + struct rtw_gapk_info *txgapk = &rtwdev->dm_info.gapk; + static const u32 three_wire[2] = {REG_3WIRE, REG_3WIRE2}; + static const u8 ch_num[RF_BAND_MAX] = {1, 1, 36, 100, 149}; + static const u8 band_num[RF_BAND_MAX] = {0x0, 0x0, 0x1, 0x3, 0x5}; + static const u8 cck[RF_BAND_MAX] = {0x1, 0x0, 0x0, 0x0, 0x0}; + u8 path, band, gain, rf0_idx; + u32 rf18, v; + + if (rtwdev->dm_info.dm_flags & BIT(RTW_DM_CAP_TXGAPK)) + return; + + rtw_dbg(rtwdev, RTW_DBG_RFK, "[TXGAPK] ======>%s\n", __func__); + + if (txgapk->read_txgain == 1) { + rtw_dbg(rtwdev, RTW_DBG_RFK, + "[TXGAPK] Already Read txgapk->read_txgain return!!!\n"); + rtw8822c_txgapk_write_gain_bb_table(rtwdev); + return; + } + + for (band = 0; band < RF_BAND_MAX; band++) { + for (path = 0; path < rtwdev->hal.rf_path_num; path++) { + rf18 = rtw_read_rf(rtwdev, path, RF_CFGCH, RFREG_MASK); + + rtw_write32_mask(rtwdev, + three_wire[path], BIT_3WIRE_EN, 0x0); + rtw_write_rf(rtwdev, path, + RF_CFGCH, MASKBYTE0, ch_num[band]); + rtw_write_rf(rtwdev, path, + RF_CFGCH, BIT_BAND, band_num[band]); + rtw_write_rf(rtwdev, path, + RF_BW_TRXBB, BIT_DBG_CCK_CCA, cck[band]); + rtw_write_rf(rtwdev, path, + RF_BW_TRXBB, BIT_TX_CCK_IND, cck[band]); + gain = 0; + for (rf0_idx = 1; rf0_idx < 32; rf0_idx += 3) { + rtw_write_rf(rtwdev, path, RF_MODE_TRXAGC, + MASKBYTE0, rf0_idx); + v = rtw_read_rf(rtwdev, path, + RF_TX_RESULT, RFREG_MASK); + txgapk->rf3f_bp[band][gain][path] = v & BIT_DATA_L; + + rtw_dbg(rtwdev, RTW_DBG_RFK, + "[TXGAPK] 0x5f=0x%03X band=%d path=%d\n", + txgapk->rf3f_bp[band][gain][path], + band, path); + gain++; + } + rtw_write_rf(rtwdev, path, RF_CFGCH, RFREG_MASK, rf18); + rtw_write32_mask(rtwdev, + three_wire[path], BIT_3WIRE_EN, 0x3); + } + } + rtw8822c_txgapk_write_gain_bb_table(rtwdev); + txgapk->read_txgain = 1; +} + +static void rtw8822c_txgapk(struct rtw_dev *rtwdev) +{ + static const u32 bb_reg[2] = {REG_TX_PTCL_CTRL, REG_TX_FIFO}; + struct rtw_gapk_info *txgapk = &rtwdev->dm_info.gapk; + u32 bb_reg_backup[2]; + u8 path; + + rtw_dbg(rtwdev, RTW_DBG_RFK, "[TXGAPK] ======>%s\n", __func__); + + rtw8822c_txgapk_save_all_tx_gain_table(rtwdev); + + if (txgapk->read_txgain == 0) { + rtw_dbg(rtwdev, RTW_DBG_RFK, + "[TXGAPK] txgapk->read_txgain == 0 return!!!\n"); + return; + } + + if (rtwdev->efuse.power_track_type >= 4 && + rtwdev->efuse.power_track_type <= 7) { + rtw_dbg(rtwdev, RTW_DBG_RFK, + "[TXGAPK] Normal Mode in TSSI mode. return!!!\n"); + return; + } + + rtw8822c_txgapk_backup_bb_reg(rtwdev, bb_reg, + bb_reg_backup, ARRAY_SIZE(bb_reg)); + rtw8822c_txgapk_tx_pause(rtwdev); + for (path = 0; path < rtwdev->hal.rf_path_num; path++) { + txgapk->channel = rtw_read_rf(rtwdev, path, + RF_CFGCH, RFREG_MASK) & MASKBYTE0; + rtw8822c_txgapk_bb_dpk(rtwdev, path); + rtw8822c_txgapk_afe_dpk(rtwdev, path); + rtw8822c_txgapk_calculate_offset(rtwdev, path); + rtw8822c_txgapk_rf_restore(rtwdev, path); + rtw8822c_txgapk_afe_dpk_restore(rtwdev, path); + rtw8822c_txgapk_bb_dpk_restore(rtwdev, path); + } + rtw8822c_txgapk_write_tx_gain(rtwdev); + rtw8822c_txgapk_reload_bb_reg(rtwdev, bb_reg, + bb_reg_backup, ARRAY_SIZE(bb_reg)); +} + +static void rtw8822c_do_gapk(struct rtw_dev *rtwdev) +{ + struct rtw_dm_info *dm = &rtwdev->dm_info; + + if (dm->dm_flags & BIT(RTW_DM_CAP_TXGAPK)) { + rtw_dbg(rtwdev, RTW_DBG_RFK, "[TXGAPK] feature disable!!!\n"); + return; + } + rtw8822c_rfk_handshake(rtwdev, true); + rtw8822c_txgapk(rtwdev); + rtw8822c_rfk_handshake(rtwdev, false); +} + static void rtw8822c_rf_init(struct rtw_dev *rtwdev) { rtw8822c_rf_dac_cal(rtwdev); @@ -1388,6 +2120,8 @@ static int rtw8822c_mac_init(struct rtw_dev *rtwdev) BIT_RXPSF_CONT_ERRCHKEN); value16 = BIT_SET_RXPSF_ERRTHR(value16, 0x07); rtw_write16(rtwdev, REG_RXPSF_CTRL, value16); + rtw_write8_set(rtwdev, REG_SND_PTCL_CTRL, + BIT_DIS_CHK_VHTSIGB_CRC); /* Interrupt migration configuration */ rtw_write32(rtwdev, REG_INT_MIG, WLAN_MAC_INT_MIG_CFG); @@ -1395,6 +2129,53 @@ static int rtw8822c_mac_init(struct rtw_dev *rtwdev) return 0; } +#define FWCD_SIZE_REG_8822C 0x2000 +#define FWCD_SIZE_DMEM_8822C 0x10000 +#define FWCD_SIZE_IMEM_8822C 0x10000 +#define FWCD_SIZE_EMEM_8822C 0x20000 +#define FWCD_SIZE_ROM_8822C 0x10000 + +static const u32 __fwcd_segs_8822c[] = { + FWCD_SIZE_REG_8822C, + FWCD_SIZE_DMEM_8822C, + FWCD_SIZE_IMEM_8822C, + FWCD_SIZE_EMEM_8822C, + FWCD_SIZE_ROM_8822C, +}; + +static const struct rtw_fwcd_segs rtw8822c_fwcd_segs = { + .segs = __fwcd_segs_8822c, + .num = ARRAY_SIZE(__fwcd_segs_8822c), +}; + +static int rtw8822c_dump_fw_crash(struct rtw_dev *rtwdev) +{ +#define __dump_fw_8822c(_dev, _mem) \ + rtw_dump_fw(_dev, OCPBASE_ ## _mem ## _88XX, \ + FWCD_SIZE_ ## _mem ## _8822C, RTW_FWCD_ ## _mem) + int ret; + + ret = rtw_dump_reg(rtwdev, 0x0, FWCD_SIZE_REG_8822C); + if (ret) + return ret; + ret = __dump_fw_8822c(rtwdev, DMEM); + if (ret) + return ret; + ret = __dump_fw_8822c(rtwdev, IMEM); + if (ret) + return ret; + ret = __dump_fw_8822c(rtwdev, EMEM); + if (ret) + return ret; + ret = __dump_fw_8822c(rtwdev, ROM); + if (ret) + return ret; + + return 0; + +#undef __dump_fw_8822c +} + static void rtw8822c_rstb_3wire(struct rtw_dev *rtwdev, bool enable) { if (enable) { @@ -1707,10 +2488,11 @@ static void rtw8822c_config_cck_tx_path(struct rtw_dev *rtwdev, u8 tx_path, else rtw_write32_mask(rtwdev, REG_RXCCKSEL, 0xf0000000, 0x8); } + rtw8822c_bb_reset(rtwdev); } static void rtw8822c_config_ofdm_tx_path(struct rtw_dev *rtwdev, u8 tx_path, - bool is_tx2_path) + enum rtw_bb_path tx_path_sel_1ss) { if (tx_path == BB_PATH_A) { rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x11); @@ -1719,21 +2501,28 @@ static void rtw8822c_config_ofdm_tx_path(struct rtw_dev *rtwdev, u8 tx_path, rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x12); rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xff, 0x0); } else { - if (is_tx2_path) { + if (tx_path_sel_1ss == BB_PATH_AB) { rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x33); rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xffff, 0x0404); - } else { + } else if (tx_path_sel_1ss == BB_PATH_B) { + rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x32); + rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xffff, 0x0400); + } else if (tx_path_sel_1ss == BB_PATH_A) { rtw_write32_mask(rtwdev, REG_ANTMAP0, 0xff, 0x31); rtw_write32_mask(rtwdev, REG_TXLGMAP, 0xffff, 0x0400); } } + rtw8822c_bb_reset(rtwdev); } static void rtw8822c_config_tx_path(struct rtw_dev *rtwdev, u8 tx_path, + enum rtw_bb_path tx_path_sel_1ss, + enum rtw_bb_path tx_path_cck, bool is_tx2_path) { - rtw8822c_config_cck_tx_path(rtwdev, tx_path, is_tx2_path); - rtw8822c_config_ofdm_tx_path(rtwdev, tx_path, is_tx2_path); + rtw8822c_config_cck_tx_path(rtwdev, tx_path_cck, is_tx2_path); + rtw8822c_config_ofdm_tx_path(rtwdev, tx_path, tx_path_sel_1ss); + rtw8822c_bb_reset(rtwdev); } static void rtw8822c_config_trx_mode(struct rtw_dev *rtwdev, u8 tx_path, @@ -1749,7 +2538,8 @@ static void rtw8822c_config_trx_mode(struct rtw_dev *rtwdev, u8 tx_path, rtw_write32_mask(rtwdev, REG_ORITXCODE2, MASK20BITS, 0x11111); rtw8822c_config_rx_path(rtwdev, rx_path); - rtw8822c_config_tx_path(rtwdev, tx_path, is_tx2_path); + rtw8822c_config_tx_path(rtwdev, tx_path, BB_PATH_A, BB_PATH_A, + is_tx2_path); rtw8822c_toggle_igi(rtwdev); } @@ -1763,6 +2553,7 @@ static void query_phy_status_page0(struct rtw_dev *rtwdev, u8 *phy_status, s8 rx_power[RTW_RF_PATH_MAX]; s8 min_rx_power = -120; u8 rssi; + u8 channel; int path; rx_power[RF_PATH_A] = GET_PHY_STAT_P0_PWDB_A(phy_status); @@ -1783,6 +2574,11 @@ static void query_phy_status_page0(struct rtw_dev *rtwdev, u8 *phy_status, rx_power[RF_PATH_A] -= 110; rx_power[RF_PATH_B] -= 110; + channel = GET_PHY_STAT_P0_CHANNEL(phy_status); + if (channel == 0) + channel = rtwdev->hal.current_channel; + rtw_set_rx_freq_band(pkt_stat, channel); + pkt_stat->rx_power[RF_PATH_A] = rx_power[RF_PATH_A]; pkt_stat->rx_power[RF_PATH_B] = rx_power[RF_PATH_B]; @@ -1800,6 +2596,7 @@ static void query_phy_status_page0(struct rtw_dev *rtwdev, u8 *phy_status, static void query_phy_status_page1(struct rtw_dev *rtwdev, u8 *phy_status, struct rtw_rx_pkt_stat *pkt_stat) { + struct rtw_path_div *p_div = &rtwdev->dm_path_div; struct rtw_dm_info *dm_info = &rtwdev->dm_info; u8 rxsc, bw; s8 min_rx_power = -120; @@ -1807,6 +2604,7 @@ static void query_phy_status_page1(struct rtw_dev *rtwdev, u8 *phy_status, u8 evm_dbm = 0; u8 rssi; int path; + u8 channel; if (pkt_stat->rate > DESC_RATE11M && pkt_stat->rate < DESC_RATEMCS0) rxsc = GET_PHY_STAT_P1_L_RXSC(phy_status); @@ -1820,6 +2618,9 @@ static void query_phy_status_page1(struct rtw_dev *rtwdev, u8 *phy_status, else bw = RTW_CHANNEL_WIDTH_20; + channel = GET_PHY_STAT_P1_CHANNEL(phy_status); + rtw_set_rx_freq_band(pkt_stat, channel); + pkt_stat->rx_power[RF_PATH_A] = GET_PHY_STAT_P1_PWDB_A(phy_status) - 110; pkt_stat->rx_power[RF_PATH_B] = GET_PHY_STAT_P1_PWDB_B(phy_status) - 110; pkt_stat->rssi = rtw_phy_rf_power_2_rssi(pkt_stat->rx_power, 2); @@ -1842,6 +2643,13 @@ static void query_phy_status_page1(struct rtw_dev *rtwdev, u8 *phy_status, for (path = 0; path <= rtwdev->hal.rf_path_num; path++) { rssi = rtw_phy_rf_power_2_rssi(&pkt_stat->rx_power[path], 1); dm_info->rssi[path] = rssi; + if (path == RF_PATH_A) { + p_div->path_a_sum += rssi; + p_div->path_a_cnt++; + } else if (path == RF_PATH_B) { + p_div->path_b_sum += rssi; + p_div->path_b_cnt++; + } dm_info->rx_snr[path] = pkt_stat->rx_snr[path] >> 1; dm_info->cfo_tail[path] = (pkt_stat->cfo_tail[path] * 5) >> 1; @@ -1855,6 +2663,7 @@ static void query_phy_status_page1(struct rtw_dev *rtwdev, u8 *phy_status, } dm_info->rx_evm_dbm[path] = evm_dbm; } + rtw_phy_parsing_cfo(rtwdev, pkt_stat); } static void query_phy_status(struct rtw_dev *rtwdev, u8 *phy_status, @@ -1910,6 +2719,7 @@ static void rtw8822c_query_rx_desc(struct rtw_dev *rtwdev, u8 *rx_desc, hdr = (struct ieee80211_hdr *)(rx_desc + desc_sz + pkt_stat->shift + pkt_stat->drv_info_sz); + pkt_stat->hdr = hdr; if (pkt_stat->phy_status) { phy_status = rx_desc + desc_sz + pkt_stat->shift; query_phy_status(rtwdev, phy_status, pkt_stat); @@ -2006,7 +2816,7 @@ static int rtw8822c_set_antenna(struct rtw_dev *rtwdev, case BB_PATH_AB: break; default: - rtw_info(rtwdev, "unsupported tx path 0x%x\n", antenna_tx); + rtw_warn(rtwdev, "unsupported tx path 0x%x\n", antenna_tx); return -EINVAL; } @@ -2016,7 +2826,7 @@ static int rtw8822c_set_antenna(struct rtw_dev *rtwdev, case BB_PATH_AB: break; default: - rtw_info(rtwdev, "unsupported rx path 0x%x\n", antenna_rx); + rtw_warn(rtwdev, "unsupported rx path 0x%x\n", antenna_rx); return -EINVAL; } @@ -2131,20 +2941,17 @@ static void rtw8822c_do_iqk(struct rtw_dev *rtwdev) { struct rtw_iqk_para para = {0}; u8 iqk_chk; - int counter; + int ret; para.clear = 1; rtw_fw_do_iqk(rtwdev, ¶); - for (counter = 0; counter < 300; counter++) { - iqk_chk = rtw_read8(rtwdev, REG_RPT_CIP); - if (iqk_chk == 0xaa) - break; - msleep(20); - } - rtw_write8(rtwdev, REG_IQKSTAT, 0x0); + ret = read_poll_timeout(rtw_read8, iqk_chk, iqk_chk == IQK_DONE_8822C, + 20000, 300000, false, rtwdev, REG_RPT_CIP); + if (ret) + rtw_warn(rtwdev, "failed to poll iqk status bit\n"); - rtw_dbg(rtwdev, RTW_DBG_RFK, "iqk counter=%d\n", counter); + rtw_write8(rtwdev, REG_IQKSTAT, 0x0); } /* for coex */ @@ -2153,28 +2960,28 @@ static void rtw8822c_coex_cfg_init(struct rtw_dev *rtwdev) /* enable TBTT nterrupt */ rtw_write8_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); - /* BT report packet sample rate */ + /* BT report packet sample rate */ /* 0x790[5:0]=0x5 */ - rtw_write8_set(rtwdev, REG_BT_TDMA_TIME, 0x05); + rtw_write8_mask(rtwdev, REG_BT_TDMA_TIME, BIT_MASK_SAMPLE_RATE, 0x5); /* enable BT counter statistics */ rtw_write8(rtwdev, REG_BT_STAT_CTRL, 0x1); /* enable PTA (3-wire function form BT side) */ rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_BT_PTA_EN); - rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_BT_AOD_GPIO3); + rtw_write32_set(rtwdev, REG_GPIO_MUXCFG, BIT_PO_BT_PTA_PINS); /* enable PTA (tx/rx signal form WiFi side) */ rtw_write8_set(rtwdev, REG_QUEUE_CTRL, BIT_PTA_WL_TX_EN); /* wl tx signal to PTA not case EDCCA */ rtw_write8_clr(rtwdev, REG_QUEUE_CTRL, BIT_PTA_EDCCA_EN); /* GNT_BT=1 while select both */ - rtw_write8_set(rtwdev, REG_BT_COEX_V2, BIT_GNT_BT_POLARITY); - /* BT_CCA = ~GNT_WL_BB, (not or GNT_BT_BB, LTE_Rx */ + rtw_write16_set(rtwdev, REG_BT_COEX_V2, BIT_GNT_BT_POLARITY); + /* BT_CCA = ~GNT_WL_BB, not or GNT_BT_BB, LTE_Rx */ rtw_write8_clr(rtwdev, REG_DUMMY_PAGE4_V1, BIT_BTCCA_CTRL); /* to avoid RF parameter error */ - rtw_write_rf(rtwdev, RF_PATH_B, 0x1, 0xfffff, 0x40000); + rtw_write_rf(rtwdev, RF_PATH_B, RF_MODOPT, 0xfffff, 0x40000); } static void rtw8822c_coex_cfg_gnt_fix(struct rtw_dev *rtwdev) @@ -2207,41 +3014,62 @@ static void rtw8822c_coex_cfg_gnt_fix(struct rtw_dev *rtwdev) * enable "DAC off if GNT_WL = 0" for non-shared-antenna * disable 0x1c30[22] = 0, * enable: 0x1c30[22] = 1, 0x1c38[12] = 0, 0x1c38[28] = 1 - * - * disable WL-S1 BB chage RF mode if GNT_BT + */ + if (coex_stat->wl_coex_mode == COEX_WLINK_2GFREE) { + rtw_write8_mask(rtwdev, REG_ANAPAR + 2, + BIT_ANAPAR_BTPS >> 16, 0); + } else { + rtw_write8_mask(rtwdev, REG_ANAPAR + 2, + BIT_ANAPAR_BTPS >> 16, 1); + rtw_write8_mask(rtwdev, REG_RSTB_SEL + 1, + BIT_DAC_OFF_ENABLE, 0); + rtw_write8_mask(rtwdev, REG_RSTB_SEL + 3, + BIT_DAC_OFF_ENABLE, 1); + } + + /* disable WL-S1 BB chage RF mode if GNT_BT * since RF TRx mask can do it */ - rtw_write8_mask(rtwdev, 0x1c32, BIT(6), 1); - rtw_write8_mask(rtwdev, 0x1c39, BIT(4), 0); - rtw_write8_mask(rtwdev, 0x1c3b, BIT(4), 1); - rtw_write8_mask(rtwdev, 0x4160, BIT(3), 1); + rtw_write8_mask(rtwdev, REG_IGN_GNTBT4, + BIT_PI_IGNORE_GNT_BT, 1); /* disable WL-S0 BB chage RF mode if wifi is at 5G, * or antenna path is separated */ - if (coex_stat->wl_coex_mode == COEX_WLINK_5G || + if (coex_stat->wl_coex_mode == COEX_WLINK_2GFREE) { + rtw_write8_mask(rtwdev, REG_IGN_GNT_BT1, + BIT_PI_IGNORE_GNT_BT, 1); + rtw_write8_mask(rtwdev, REG_NOMASK_TXBT, + BIT_NOMASK_TXBT_ENABLE, 1); + } else if (coex_stat->wl_coex_mode == COEX_WLINK_5G || coex->under_5g || !efuse->share_ant) { if (coex_stat->kt_ver >= 3) { - rtw_write8_mask(rtwdev, 0x1860, BIT(3), 0); - rtw_write8_mask(rtwdev, 0x1ca7, BIT(3), 1); + rtw_write8_mask(rtwdev, REG_IGN_GNT_BT1, + BIT_PI_IGNORE_GNT_BT, 0); + rtw_write8_mask(rtwdev, REG_NOMASK_TXBT, + BIT_NOMASK_TXBT_ENABLE, 1); } else { - rtw_write8_mask(rtwdev, 0x1860, BIT(3), 1); + rtw_write8_mask(rtwdev, REG_IGN_GNT_BT1, + BIT_PI_IGNORE_GNT_BT, 1); } } else { /* shared-antenna */ - rtw_write8_mask(rtwdev, 0x1860, BIT(3), 0); - if (coex_stat->kt_ver >= 3) - rtw_write8_mask(rtwdev, 0x1ca7, BIT(3), 0); + rtw_write8_mask(rtwdev, REG_IGN_GNT_BT1, + BIT_PI_IGNORE_GNT_BT, 0); + if (coex_stat->kt_ver >= 3) { + rtw_write8_mask(rtwdev, REG_NOMASK_TXBT, + BIT_NOMASK_TXBT_ENABLE, 0); + } } } static void rtw8822c_coex_cfg_gnt_debug(struct rtw_dev *rtwdev) { - rtw_write8_mask(rtwdev, 0x66, BIT(4), 0); - rtw_write8_mask(rtwdev, 0x67, BIT(0), 0); - rtw_write8_mask(rtwdev, 0x42, BIT(3), 0); - rtw_write8_mask(rtwdev, 0x65, BIT(7), 0); - rtw_write8_mask(rtwdev, 0x73, BIT(3), 0); + rtw_write8_mask(rtwdev, REG_PAD_CTRL1 + 2, BIT_BTGP_SPI_EN >> 16, 0); + rtw_write8_mask(rtwdev, REG_PAD_CTRL1 + 3, BIT_BTGP_JTAG_EN >> 24, 0); + rtw_write8_mask(rtwdev, REG_GPIO_MUXCFG + 2, BIT_FSPI_EN >> 16, 0); + rtw_write8_mask(rtwdev, REG_PAD_CTRL1 + 1, BIT_LED1DIS >> 8, 0); + rtw_write8_mask(rtwdev, REG_SYS_SDIO_CTRL + 3, BIT_DBG_GNT_WL_BT >> 24, 0); } static void rtw8822c_coex_cfg_rfe_type(struct rtw_dev *rtwdev) @@ -2262,9 +3090,9 @@ static void rtw8822c_coex_cfg_rfe_type(struct rtw_dev *rtwdev) coex_rfe->wlg_at_btg = false; /* disable LTE coex in wifi side */ - rtw_coex_write_indirect_reg(rtwdev, 0x38, BIT_LTE_COEX_EN, 0x0); - rtw_coex_write_indirect_reg(rtwdev, 0xa0, MASKLWORD, 0xffff); - rtw_coex_write_indirect_reg(rtwdev, 0xa4, MASKLWORD, 0xffff); + rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, BIT_LTE_COEX_EN, 0x0); + rtw_coex_write_indirect_reg(rtwdev, LTE_WL_TRX_CTRL, MASKLWORD, 0xffff); + rtw_coex_write_indirect_reg(rtwdev, LTE_BT_TRX_CTRL, MASKLWORD, 0xffff); } static void rtw8822c_coex_cfg_wl_tx_power(struct rtw_dev *rtwdev, u8 wl_pwr) @@ -2289,16 +3117,22 @@ static void rtw8822c_coex_cfg_wl_rx_gain(struct rtw_dev *rtwdev, bool low_gain) coex_dm->cur_wl_rx_low_gain_en = low_gain; if (coex_dm->cur_wl_rx_low_gain_en) { + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], Hi-Li Table On!\n"); + /* set Rx filter corner RCK offset */ - rtw_write_rf(rtwdev, RF_PATH_A, 0xde, 0xfffff, 0x22); - rtw_write_rf(rtwdev, RF_PATH_A, 0x1d, 0xfffff, 0x36); - rtw_write_rf(rtwdev, RF_PATH_B, 0xde, 0xfffff, 0x22); - rtw_write_rf(rtwdev, RF_PATH_B, 0x1d, 0xfffff, 0x36); + rtw_write_rf(rtwdev, RF_PATH_A, RF_RCKD, RFREG_MASK, 0x22); + rtw_write_rf(rtwdev, RF_PATH_A, RF_RCK, RFREG_MASK, 0x36); + rtw_write_rf(rtwdev, RF_PATH_B, RF_RCKD, RFREG_MASK, 0x22); + rtw_write_rf(rtwdev, RF_PATH_B, RF_RCK, RFREG_MASK, 0x36); + } else { + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], Hi-Li Table Off!\n"); + /* set Rx filter corner RCK offset */ - rtw_write_rf(rtwdev, RF_PATH_A, 0xde, 0xfffff, 0x20); - rtw_write_rf(rtwdev, RF_PATH_A, 0x1d, 0xfffff, 0x0); - rtw_write_rf(rtwdev, RF_PATH_B, 0x1d, 0xfffff, 0x0); + rtw_write_rf(rtwdev, RF_PATH_A, RF_RCKD, RFREG_MASK, 0x20); + rtw_write_rf(rtwdev, RF_PATH_A, RF_RCK, RFREG_MASK, 0x0); + rtw_write_rf(rtwdev, RF_PATH_B, RF_RCKD, RFREG_MASK, 0x20); + rtw_write_rf(rtwdev, RF_PATH_B, RF_RCK, RFREG_MASK, 0x0); } } @@ -2463,7 +3297,7 @@ static void rtw8822c_dpk_rxbb_dc_cal(struct rtw_dev *rtwdev, u8 path) static u8 rtw8822c_dpk_dc_corr_check(struct rtw_dev *rtwdev, u8 path) { u16 dc_i, dc_q; - u8 corr_val, corr_idx; + u8 corr_idx; rtw_write32(rtwdev, REG_RXSRAM_CTL, 0x000900f0); dc_i = (u16)rtw_read32_mask(rtwdev, REG_STAT_RPT, GENMASK(27, 16)); @@ -2476,7 +3310,7 @@ static u8 rtw8822c_dpk_dc_corr_check(struct rtw_dev *rtwdev, u8 path) rtw_write32(rtwdev, REG_RXSRAM_CTL, 0x000000f0); corr_idx = (u8)rtw_read32_mask(rtwdev, REG_STAT_RPT, GENMASK(7, 0)); - corr_val = (u8)rtw_read32_mask(rtwdev, REG_STAT_RPT, GENMASK(15, 8)); + rtw_read32_mask(rtwdev, REG_STAT_RPT, GENMASK(15, 8)); if (dc_i > 200 || dc_q > 200 || corr_idx < 40 || corr_idx > 65) return 1; @@ -2523,9 +3357,9 @@ static void rtw8822c_dpk_pre_setting(struct rtw_dev *rtwdev) rtw_write_rf(rtwdev, path, RF_RXAGC_OFFSET, RFREG_MASK, 0x0); rtw_write32(rtwdev, REG_NCTL0, 0x8 | (path << 1)); if (rtwdev->dm_info.dpk_info.dpk_band == RTW_BAND_2G) - rtw_write32(rtwdev, REG_DPD_LUT3, 0x1f100000); + rtw_write32(rtwdev, REG_DPD_CTL1_S1, 0x1f100000); else - rtw_write32(rtwdev, REG_DPD_LUT3, 0x1f0d0000); + rtw_write32(rtwdev, REG_DPD_CTL1_S1, 0x1f0d0000); rtw_write32_mask(rtwdev, REG_DPD_LUT0, BIT_GLOSS_DB, 0x4); rtw_write32_mask(rtwdev, REG_IQK_CTL1, BIT_TX_CFIR, 0x3); } @@ -2543,11 +3377,11 @@ static u32 rtw8822c_dpk_rf_setting(struct rtw_dev *rtwdev, u8 path) rtw_write_rf(rtwdev, path, RF_DEBUG, BIT_DE_TX_GAIN, 0x1); rtw_write_rf(rtwdev, path, RF_DEBUG, BIT_DE_PWR_TRIM, 0x1); - rtw_write_rf(rtwdev, path, RF_TX_GAIN_OFFSET, BIT_TX_OFFSET_VAL, 0x0); + rtw_write_rf(rtwdev, path, RF_TX_GAIN_OFFSET, BIT_BB_GAIN, 0x0); rtw_write_rf(rtwdev, path, RF_TX_GAIN, RFREG_MASK, ori_txbb); if (rtwdev->dm_info.dpk_info.dpk_band == RTW_BAND_2G) { - rtw_write_rf(rtwdev, path, RF_TX_GAIN_OFFSET, BIT_LB_ATT, 0x1); + rtw_write_rf(rtwdev, path, RF_TX_GAIN_OFFSET, BIT_RF_GAIN, 0x1); rtw_write_rf(rtwdev, path, RF_RXG_GAIN, BIT_RXG_GAIN, 0x0); } else { rtw_write_rf(rtwdev, path, RF_TXA_LB_SW, BIT_TXA_LB_ATT, 0x0); @@ -3294,9 +4128,9 @@ static void rtw8822c_dpk_reload_data(struct rtw_dev *rtwdev) rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1)); if (dpk_info->dpk_band == RTW_BAND_2G) - rtw_write32(rtwdev, REG_DPD_LUT3, 0x1f100000); + rtw_write32(rtwdev, REG_DPD_CTL1_S1, 0x1f100000); else - rtw_write32(rtwdev, REG_DPD_LUT3, 0x1f0d0000); + rtw_write32(rtwdev, REG_DPD_CTL1_S1, 0x1f0d0000); rtw_write8(rtwdev, REG_DPD_AGC, dpk_info->dpk_txagc[path]); @@ -3380,8 +4214,11 @@ static void rtw8822c_do_dpk(struct rtw_dev *rtwdev) static void rtw8822c_phy_calibration(struct rtw_dev *rtwdev) { + rtw8822c_rfk_power_save(rtwdev, false); + rtw8822c_do_gapk(rtwdev); rtw8822c_do_iqk(rtwdev); rtw8822c_do_dpk(rtwdev); + rtw8822c_rfk_power_save(rtwdev, true); } static void rtw8822c_dpk_track(struct rtw_dev *rtwdev) @@ -3416,6 +4253,128 @@ static void rtw8822c_dpk_track(struct rtw_dev *rtwdev) } } +#define XCAP_EXTEND(val) ({typeof(val) _v = (val); _v | _v << 7; }) +static void rtw8822c_set_crystal_cap_reg(struct rtw_dev *rtwdev, u8 crystal_cap) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + struct rtw_cfo_track *cfo = &dm_info->cfo_track; + u32 val = 0; + + val = XCAP_EXTEND(crystal_cap); + cfo->crystal_cap = crystal_cap; + rtw_write32_mask(rtwdev, REG_ANAPAR_XTAL_0, BIT_XCAP_0, val); +} + +static void rtw8822c_set_crystal_cap(struct rtw_dev *rtwdev, u8 crystal_cap) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + struct rtw_cfo_track *cfo = &dm_info->cfo_track; + + if (cfo->crystal_cap == crystal_cap) + return; + + rtw8822c_set_crystal_cap_reg(rtwdev, crystal_cap); +} + +static void rtw8822c_cfo_tracking_reset(struct rtw_dev *rtwdev) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + struct rtw_cfo_track *cfo = &dm_info->cfo_track; + + cfo->is_adjust = true; + + if (cfo->crystal_cap > rtwdev->efuse.crystal_cap) + rtw8822c_set_crystal_cap(rtwdev, cfo->crystal_cap - 1); + else if (cfo->crystal_cap < rtwdev->efuse.crystal_cap) + rtw8822c_set_crystal_cap(rtwdev, cfo->crystal_cap + 1); +} + +static void rtw8822c_cfo_init(struct rtw_dev *rtwdev) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + struct rtw_cfo_track *cfo = &dm_info->cfo_track; + + cfo->crystal_cap = rtwdev->efuse.crystal_cap; + cfo->is_adjust = true; +} + +#define REPORT_TO_KHZ(val) ({typeof(val) _v = (val); (_v << 1) + (_v >> 1); }) +static s32 rtw8822c_cfo_calc_avg(struct rtw_dev *rtwdev, u8 path_num) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + struct rtw_cfo_track *cfo = &dm_info->cfo_track; + s32 cfo_avg, cfo_path_sum = 0, cfo_rpt_sum; + u8 i; + + for (i = 0; i < path_num; i++) { + cfo_rpt_sum = REPORT_TO_KHZ(cfo->cfo_tail[i]); + + if (cfo->cfo_cnt[i]) + cfo_avg = cfo_rpt_sum / cfo->cfo_cnt[i]; + else + cfo_avg = 0; + + cfo_path_sum += cfo_avg; + } + + for (i = 0; i < path_num; i++) { + cfo->cfo_tail[i] = 0; + cfo->cfo_cnt[i] = 0; + } + + return cfo_path_sum / path_num; +} + +static void rtw8822c_cfo_need_adjust(struct rtw_dev *rtwdev, s32 cfo_avg) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + struct rtw_cfo_track *cfo = &dm_info->cfo_track; + + if (!cfo->is_adjust) { + if (abs(cfo_avg) > CFO_TRK_ENABLE_TH) + cfo->is_adjust = true; + } else { + if (abs(cfo_avg) <= CFO_TRK_STOP_TH) + cfo->is_adjust = false; + } + + if (!rtw_coex_disabled(rtwdev)) { + cfo->is_adjust = false; + rtw8822c_set_crystal_cap(rtwdev, rtwdev->efuse.crystal_cap); + } +} + +static void rtw8822c_cfo_track(struct rtw_dev *rtwdev) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + struct rtw_cfo_track *cfo = &dm_info->cfo_track; + u8 path_num = rtwdev->hal.rf_path_num; + s8 crystal_cap = cfo->crystal_cap; + s32 cfo_avg = 0; + + if (rtwdev->sta_cnt != 1) { + rtw8822c_cfo_tracking_reset(rtwdev); + return; + } + + if (cfo->packet_count == cfo->packet_count_pre) + return; + + cfo->packet_count_pre = cfo->packet_count; + cfo_avg = rtw8822c_cfo_calc_avg(rtwdev, path_num); + rtw8822c_cfo_need_adjust(rtwdev, cfo_avg); + + if (cfo->is_adjust) { + if (cfo_avg > CFO_TRK_ADJ_TH) + crystal_cap++; + else if (cfo_avg < -CFO_TRK_ADJ_TH) + crystal_cap--; + + crystal_cap = clamp_t(s8, crystal_cap, 0, XCAP_MASK); + rtw8822c_set_crystal_cap(rtwdev, (u8)crystal_cap); + } +} + static const struct rtw_phy_cck_pd_reg rtw8822c_cck_pd_reg[RTW_CHANNEL_WIDTH_40 + 1][RTW_RF_PATH_MAX] = { { @@ -3463,6 +4422,10 @@ rtw8822c_phy_cck_pd_set_reg(struct rtw_dev *rtwdev, rtw8822c_cck_pd_reg[bw][nrx].reg_cs, rtw8822c_cck_pd_reg[bw][nrx].mask_cs, cs); + + rtw_dbg(rtwdev, RTW_DBG_PHY, + "is_linked=%d, bw=%d, nrx=%d, cs_ratio=0x%x, pd_th=0x%x\n", + rtw_is_assoc(rtwdev), bw, nrx, cs, pd); } static void rtw8822c_phy_cck_pd_set(struct rtw_dev *rtwdev, u8 new_lvl) @@ -3476,6 +4439,10 @@ static void rtw8822c_phy_cck_pd_set(struct rtw_dev *rtwdev, u8 new_lvl) nrx = (u8)rtw_read32_mask(rtwdev, 0x1a2c, 0x60000); bw = (u8)rtw_read32_mask(rtwdev, 0x9b0, 0xc); + rtw_dbg(rtwdev, RTW_DBG_PHY, "lv: (%d) -> (%d) bw=%d nr=%d cck_fa_avg=%d\n", + dm_info->cck_pd_lv[bw][nrx], new_lvl, bw, nrx, + dm_info->cck_fa_avg); + if (dm_info->cck_pd_lv[bw][nrx] == new_lvl) return; @@ -3575,6 +4542,51 @@ static void rtw8822c_pwr_track(struct rtw_dev *rtwdev) dm_info->pwr_trk_triggered = false; } +static void rtw8822c_adaptivity_init(struct rtw_dev *rtwdev) +{ + rtw_phy_set_edcca_th(rtwdev, RTW8822C_EDCCA_MAX, RTW8822C_EDCCA_MAX); + + /* mac edcca state setting */ + rtw_write32_clr(rtwdev, REG_TX_PTCL_CTRL, BIT_DIS_EDCCA); + rtw_write32_set(rtwdev, REG_RD_CTRL, BIT_EDCCA_MSK_CNTDOWN_EN); + + /* edcca decistion opt */ + rtw_write32_clr(rtwdev, REG_EDCCA_DECISION, BIT_EDCCA_OPTION); +} + +static void rtw8822c_adaptivity(struct rtw_dev *rtwdev) +{ + struct rtw_dm_info *dm_info = &rtwdev->dm_info; + s8 l2h, h2l; + u8 igi; + + igi = dm_info->igi_history[0]; + if (dm_info->edcca_mode == RTW_EDCCA_NORMAL) { + l2h = max_t(s8, igi + EDCCA_IGI_L2H_DIFF, EDCCA_TH_L2H_LB); + h2l = l2h - EDCCA_L2H_H2L_DIFF_NORMAL; + } else { + if (igi < dm_info->l2h_th_ini - EDCCA_ADC_BACKOFF) + l2h = igi + EDCCA_ADC_BACKOFF; + else + l2h = dm_info->l2h_th_ini; + h2l = l2h - EDCCA_L2H_H2L_DIFF; + } + + rtw_phy_set_edcca_th(rtwdev, l2h, h2l); +} + +static void rtw8822c_fill_txdesc_checksum(struct rtw_dev *rtwdev, + struct rtw_tx_pkt_info *pkt_info, + u8 *txdesc) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + size_t words; + + words = (pkt_info->pkt_offset * 8 + chip->tx_pkt_desc_sz) / 2; + + fill_txdesc_checksum_common(txdesc, words); +} + static const struct rtw_pwr_seq_cmd trans_carddis_to_cardemu_8822c[] = { {0x0086, RTW_PWR_CUT_ALL_MSK, @@ -3913,6 +4925,8 @@ static const struct rtw_rfe_def rtw8822c_rfe_defs[] = { [0] = RTW_DEF_RFE(8822c, 0, 0), [1] = RTW_DEF_RFE(8822c, 0, 0), [2] = RTW_DEF_RFE(8822c, 0, 0), + [3] = RTW_DEF_RFE(8822c, 0, 0), + [4] = RTW_DEF_RFE(8822c, 0, 0), [5] = RTW_DEF_RFE(8822c, 0, 5), [6] = RTW_DEF_RFE(8822c, 0, 0), }; @@ -3976,6 +4990,7 @@ static struct rtw_chip_ops rtw8822c_ops = { .query_rx_desc = rtw8822c_query_rx_desc, .set_channel = rtw8822c_set_channel, .mac_init = rtw8822c_mac_init, + .dump_fw_crash = rtw8822c_dump_fw_crash, .read_rf = rtw_phy_read_rf, .write_rf = rtw_phy_write_rf_reg_mix, .set_tx_power_index = rtw8822c_set_tx_power_index, @@ -3989,6 +5004,13 @@ static struct rtw_chip_ops rtw8822c_ops = { .config_bfee = rtw8822c_bf_config_bfee, .set_gid_table = rtw_bf_set_gid_table, .cfg_csi_rate = rtw_bf_cfg_csi_rate, + .adaptivity_init = rtw8822c_adaptivity_init, + .adaptivity = rtw8822c_adaptivity, + .cfo_init = rtw8822c_cfo_init, + .cfo_track = rtw8822c_cfo_track, + .config_tx_path = rtw8822c_config_tx_path, + .config_txrx_mode = rtw8822c_config_trx_mode, + .fill_txdesc_checksum = rtw8822c_fill_txdesc_checksum, .coex_set_init = rtw8822c_coex_cfg_init, .coex_set_ant_switch = NULL, @@ -4007,14 +5029,14 @@ static const struct coex_table_para table_sant_8822c[] = { {0xaaaaaaaa, 0xaaaaaaaa}, {0x5a5a5a5a, 0x5a5a5a5a}, {0xfafafafa, 0xfafafafa}, /* case-5 */ - {0x6a5a6a5a, 0xaaaaaaaa}, + {0x6a5a5555, 0xaaaaaaaa}, {0x6a5a56aa, 0x6a5a56aa}, {0x6a5a5a5a, 0x6a5a5a5a}, {0x66555555, 0x5a5a5a5a}, {0x66555555, 0x6a5a5a5a}, /* case-10 */ - {0x66555555, 0xfafafafa}, + {0x66555555, 0x6a5a5aaa}, {0x66555555, 0x5a5a5aaa}, - {0x66555555, 0x5aaa5aaa}, + {0x66555555, 0x6aaa5aaa}, {0x66555555, 0xaaaa5aaa}, {0x66555555, 0xaaaaaaaa}, /* case-15 */ {0xffff55ff, 0xfafafafa}, @@ -4024,13 +5046,18 @@ static const struct coex_table_para table_sant_8822c[] = { {0xaa5555aa, 0x6a5a5a5a}, /* case-20 */ {0xaa5555aa, 0xaaaaaaaa}, {0xffffffff, 0x5a5a5a5a}, - {0xffffffff, 0x6a5a5a5a}, + {0xffffffff, 0x5a5a5a5a}, {0xffffffff, 0x55555555}, - {0xffffffff, 0x6a5a5aaa}, /* case-25 */ + {0xffffffff, 0x5a5a5aaa}, /* case-25 */ {0x55555555, 0x5a5a5a5a}, {0x55555555, 0xaaaaaaaa}, {0x55555555, 0x6a5a6a5a}, - {0x66556655, 0x66556655} + {0x66556655, 0x66556655}, + {0x66556aaa, 0x6a5a6aaa}, /*case-30*/ + {0xffffffff, 0x5aaa5aaa}, + {0x56555555, 0x5a5a5aaa}, + {0xdaffdaff, 0xdaffdaff}, + {0xddffddff, 0xddffddff}, }; /* Non-Shared-Antenna Coex Table */ @@ -4050,12 +5077,12 @@ static const struct coex_table_para table_nsant_8822c[] = { {0xffff55ff, 0xfafafafa}, {0xffff55ff, 0x5afa5afa}, {0xffff55ff, 0xaaaaaaaa}, - {0xaaffffaa, 0xfafafafa}, /* case-115 */ + {0xffff55ff, 0xffff55ff}, /* case-115 */ {0xaaffffaa, 0x5afa5afa}, {0xaaffffaa, 0xaaaaaaaa}, {0xffffffff, 0xfafafafa}, {0xffffffff, 0x5afa5afa}, - {0xffffffff, 0xaaaaaaaa},/* case-120 */ + {0xffffffff, 0xaaaaaaaa}, /* case-120 */ {0x55ff55ff, 0x5afa5afa}, {0x55ff55ff, 0xaaaaaaaa}, {0x55ff55ff, 0x55ff55ff} @@ -4064,7 +5091,7 @@ static const struct coex_table_para table_nsant_8822c[] = { /* Shared-Antenna TDMA */ static const struct coex_tdma_para tdma_sant_8822c[] = { { {0x00, 0x00, 0x00, 0x00, 0x00} }, /* case-0 */ - { {0x61, 0x45, 0x03, 0x11, 0x11} }, + { {0x61, 0x45, 0x03, 0x11, 0x11} }, /* case-1 */ { {0x61, 0x3a, 0x03, 0x11, 0x11} }, { {0x61, 0x30, 0x03, 0x11, 0x11} }, { {0x61, 0x20, 0x03, 0x11, 0x11} }, @@ -4079,7 +5106,7 @@ static const struct coex_tdma_para tdma_sant_8822c[] = { { {0x51, 0x08, 0x03, 0x10, 0x54} }, { {0x51, 0x08, 0x03, 0x10, 0x55} }, { {0x51, 0x08, 0x07, 0x10, 0x54} }, /* case-15 */ - { {0x51, 0x45, 0x03, 0x10, 0x10} }, + { {0x51, 0x45, 0x03, 0x10, 0x50} }, { {0x51, 0x3a, 0x03, 0x10, 0x50} }, { {0x51, 0x30, 0x03, 0x10, 0x50} }, { {0x51, 0x20, 0x03, 0x10, 0x50} }, @@ -4087,7 +5114,7 @@ static const struct coex_tdma_para tdma_sant_8822c[] = { { {0x51, 0x4a, 0x03, 0x10, 0x50} }, { {0x51, 0x0c, 0x03, 0x10, 0x54} }, { {0x55, 0x08, 0x03, 0x10, 0x54} }, - { {0x65, 0x10, 0x03, 0x11, 0x11} }, + { {0x65, 0x10, 0x03, 0x11, 0x10} }, { {0x51, 0x10, 0x03, 0x10, 0x51} }, /* case-25 */ { {0x51, 0x08, 0x03, 0x10, 0x50} }, { {0x61, 0x08, 0x03, 0x11, 0x11} } @@ -4115,7 +5142,8 @@ static const struct coex_tdma_para tdma_nsant_8822c[] = { { {0x51, 0x3a, 0x03, 0x10, 0x50} }, { {0x51, 0x30, 0x03, 0x10, 0x50} }, { {0x51, 0x20, 0x03, 0x10, 0x50} }, - { {0x51, 0x10, 0x03, 0x10, 0x50} } /* case-120 */ + { {0x51, 0x10, 0x03, 0x10, 0x50} }, /* case-120 */ + { {0x51, 0x08, 0x03, 0x10, 0x50} } }; /* rssi in percentage % (dbm = % - 100) */ @@ -4130,7 +5158,8 @@ static const struct coex_rf_para rf_para_tx_8822c[] = { {8, 17, true, 4}, {7, 18, true, 4}, {6, 19, true, 4}, - {5, 20, true, 4} + {5, 20, true, 4}, + {0, 21, true, 4} /* for gamg hid */ }; static const struct coex_rf_para rf_para_rx_8822c[] = { @@ -4139,11 +5168,10 @@ static const struct coex_rf_para rf_para_rx_8822c[] = { {3, 24, true, 5}, {2, 26, true, 5}, {1, 27, true, 5}, - {0, 28, true, 5} + {0, 28, true, 5}, + {0, 28, true, 5} /* for gamg hid */ }; -static_assert(ARRAY_SIZE(rf_para_tx_8822c) == ARRAY_SIZE(rf_para_rx_8822c)); - static const u8 rtw8822c_pwrtrk_5gb_n[RTW_PWR_TRK_5G_NUM][RTW_PWR_TRK_TBL_SZ] = { { 0, 1, 2, 3, 5, 6, 7, 8, 9, 10, @@ -4267,6 +5295,15 @@ static const struct rtw_pwr_track_tbl rtw8822c_rtw_pwr_track_tbl = { .pwrtrk_2g_ccka_p = rtw8822c_pwrtrk_2g_cck_a_p, }; +static struct rtw_hw_reg_offset rtw8822c_edcca_th[] = { + [EDCCA_TH_L2H_IDX] = { + {.addr = 0x84c, .mask = MASKBYTE2}, .offset = 0x80 + }, + [EDCCA_TH_H2L_IDX] = { + {.addr = 0x84c, .mask = MASKBYTE3}, .offset = 0x80 + }, +}; + #ifdef CONFIG_PM static const struct wiphy_wowlan_support rtw_wowlan_stub_8822c = { .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_GTK_REKEY_FAILURE | @@ -4304,7 +5341,7 @@ static const struct rtw_reg_domain coex_info_hw_regs_8822c[] = { {0xc50, MASKBYTE0, RTW_REG_DOMAIN_MAC8}, }; -struct rtw_chip_info rtw8822c_hw_spec = { +const struct rtw_chip_info rtw8822c_hw_spec = { .ops = &rtw8822c_ops, .id = RTW_CHIP_TYPE_8822C, .fw_name = "rtw88/rtw8822c_fw.bin", @@ -4319,13 +5356,16 @@ struct rtw_chip_info rtw8822c_hw_spec = { .txff_size = 262144, .rxff_size = 24576, .fw_rxff_size = 12288, + .rsvd_drv_pg_num = 16, .txgi_factor = 2, .is_pwr_by_rate_dec = false, .max_power_index = 0x7f, .csi_buf_pg_num = 50, .band = RTW_BAND_2G | RTW_BAND_5G, - .page_size = 128, + .page_size = TX_PAGE_SIZE, .dig_min = 0x20, + .default_1ss_tx_path = BB_PATH_A, + .path_div_supported = true, .ht_supported = true, .vht_supported = true, .lps_deep_mode_supported = BIT(LPS_DEEP_MODE_LCLK) | BIT(LPS_DEEP_MODE_PG), @@ -4356,16 +5396,24 @@ struct rtw_chip_info rtw8822c_hw_spec = { .bfer_su_max_num = 2, .bfer_mu_max_num = 1, .rx_ldpc = true, + .tx_stbc = true, + .edcca_th = rtw8822c_edcca_th, + .l2h_th_ini_cs = 60, + .l2h_th_ini_ad = 45, + .ampdu_density = IEEE80211_HT_MPDU_DENSITY_2, #ifdef CONFIG_PM .wow_fw_name = "rtw88/rtw8822c_wow_fw.bin", .wowlan_stub = &rtw_wowlan_stub_8822c, .max_sched_scan_ssids = 4, #endif - .coex_para_ver = 0x20070217, - .bt_desired_ver = 0x17, + .max_scan_ie_len = (RTW_PROBE_PG_CNT - 1) * TX_PAGE_SIZE, + .coex_para_ver = 0x22020720, + .bt_desired_ver = 0x20, .scbd_support = true, .new_scbd10_def = true, + .ble_hid_profile_support = true, + .wl_mimo_ps_support = true, .pstdma_type = COEX_PSTDMA_FORCE_LPSOFF, .bt_rssi_type = COEX_BTRSSI_DBM, .ant_isolation = 15, @@ -4392,6 +5440,7 @@ struct rtw_chip_info rtw8822c_hw_spec = { .coex_info_hw_regs = coex_info_hw_regs_8822c, .fw_fifo_addr = {0x780, 0x700, 0x780, 0x660, 0x650, 0x680}, + .fwcd_segs = &rtw8822c_fwcd_segs, }; EXPORT_SYMBOL(rtw8822c_hw_spec); diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822c.h b/drivers/net/wireless/realtek/rtw88/rtw8822c.h index 32b4771e04..1bc0e7f5d6 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8822c.h +++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.h @@ -16,6 +16,11 @@ struct rtw8822cu_efuse { u8 res2[0x3d]; }; +struct rtw8822cs_efuse { + u8 res0[0x4a]; /* 0x120 */ + u8 mac_addr[ETH_ALEN]; /* 0x16a */ +} __packed; + struct rtw8822ce_efuse { u8 mac_addr[ETH_ALEN]; /* 0x120 */ u8 vender_id[2]; @@ -91,8 +96,9 @@ struct rtw8822c_efuse { u8 res9; u8 res10[0x42]; union { - struct rtw8822cu_efuse u; struct rtw8822ce_efuse e; + struct rtw8822cu_efuse u; + struct rtw8822cs_efuse s; }; }; @@ -118,6 +124,8 @@ enum rtw8822c_dpk_one_shot_action { void rtw8822c_parse_tbl_dpk(struct rtw_dev *rtwdev, const struct rtw_table *tbl); +extern const struct rtw_chip_info rtw8822c_hw_spec; + #define RTW_DECL_TABLE_DPK(name) \ const struct rtw_table name ## _tbl = { \ .data = name, \ @@ -137,6 +145,8 @@ const struct rtw_table name ## _tbl = { \ le32_get_bits(*((__le32 *)(phy_stat) + 0x04), GENMASK(7, 0)) #define GET_PHY_STAT_P0_GAIN_A(phy_stat) \ le32_get_bits(*((__le32 *)(phy_stat) + 0x00), GENMASK(21, 16)) +#define GET_PHY_STAT_P0_CHANNEL(phy_stat) \ + le32_get_bits(*((__le32 *)(phy_stat) + 0x01), GENMASK(23, 16)) #define GET_PHY_STAT_P0_GAIN_B(phy_stat) \ le32_get_bits(*((__le32 *)(phy_stat) + 0x04), GENMASK(29, 24)) @@ -149,6 +159,8 @@ const struct rtw_table name ## _tbl = { \ le32_get_bits(*((__le32 *)(phy_stat) + 0x01), GENMASK(11, 8)) #define GET_PHY_STAT_P1_HT_RXSC(phy_stat) \ le32_get_bits(*((__le32 *)(phy_stat) + 0x01), GENMASK(15, 12)) +#define GET_PHY_STAT_P1_CHANNEL(phy_stat) \ + le32_get_bits(*((__le32 *)(phy_stat) + 0x01), GENMASK(23, 16)) #define GET_PHY_STAT_P1_RXEVM_A(phy_stat) \ le32_get_bits(*((__le32 *)(phy_stat) + 0x04), GENMASK(7, 0)) #define GET_PHY_STAT_P1_RXEVM_B(phy_stat) \ @@ -162,179 +174,253 @@ const struct rtw_table name ## _tbl = { \ #define GET_PHY_STAT_P1_RXSNR_B(phy_stat) \ le32_get_bits(*((__le32 *)(phy_stat) + 0x06), GENMASK(15, 8)) +#define RTW8822C_EDCCA_MAX 0x7f #define REG_ANAPARLDO_POW_MAC 0x0029 #define BIT_LDOE25_PON BIT(0) -#define REG_RRSR 0x0440 -#define BITS_RRSR_RSC (BIT(21) | BIT(22)) +#define XCAP_MASK GENMASK(6, 0) +#define CFO_TRK_ENABLE_TH 20 +#define CFO_TRK_STOP_TH 10 +#define CFO_TRK_ADJ_TH 10 -#define REG_TXDFIR0 0x808 -#define REG_DFIRBW 0x810 -#define REG_ANTMAP0 0x820 -#define REG_ANTMAP 0x824 -#define REG_DYMPRITH 0x86c -#define REG_DYMENTH0 0x870 -#define REG_DYMENTH 0x874 -#define REG_SBD 0x88c +#define REG_TXDFIR0 0x808 +#define REG_DFIRBW 0x810 +#define REG_ANTMAP0 0x820 +#define BIT_ANT_PATH GENMASK(1, 0) +#define REG_ANTMAP 0x824 +#define REG_EDCCA_DECISION 0x844 +#define BIT_EDCCA_OPTION GENMASK(30, 29) +#define REG_DYMPRITH 0x86c +#define REG_DYMENTH0 0x870 +#define REG_DYMENTH 0x874 +#define REG_SBD 0x88c #define BITS_SUBTUNE GENMASK(15, 12) -#define REG_DYMTHMIN 0x8a4 -#define REG_TXBWCTL 0x9b0 -#define REG_TXCLK 0x9b4 -#define REG_SCOTRK 0xc30 -#define REG_MRCM 0xc38 -#define REG_AGCSWSH 0xc44 -#define REG_ANTWTPD 0xc54 -#define REG_PT_CHSMO 0xcbc +#define REG_DYMTHMIN 0x8a4 + +#define REG_TXBWCTL 0x9b0 +#define REG_TXCLK 0x9b4 + +#define REG_SCOTRK 0xc30 +#define REG_MRCM 0xc38 +#define REG_AGCSWSH 0xc44 +#define REG_ANTWTPD 0xc54 +#define REG_PT_CHSMO 0xcbc #define BIT_PT_OPT BIT(21) -#define REG_ORITXCODE 0x1800 -#define REG_3WIRE 0x180c + +#define REG_ORITXCODE 0x1800 +#define BIT_PATH_EN BIT(31) +#define REG_3WIRE 0x180c +#define BIT_DIS_SHARERX_TXGAT BIT(27) #define BIT_3WIRE_TX_EN BIT(0) #define BIT_3WIRE_RX_EN BIT(1) +#define BIT_3WIRE_EN GENMASK(1, 0) #define BIT_3WIRE_PI_ON BIT(28) -#define REG_ANAPAR_A 0x1830 +#define REG_ANAPAR_A 0x1830 #define BIT_ANAPAR_UPDATE BIT(29) -#define REG_RXAGCCTL0 0x18ac +#define REG_RFTXEN_GCK_A 0x1864 +#define BIT_RFTXEN_GCK_FORCE_ON BIT(31) +#define REG_DIS_SHARE_RX_A 0x186c +#define BIT_TX_SCALE_0DB BIT(7) +#define REG_RXAGCCTL0 0x18ac #define BITS_RXAGC_CCK GENMASK(15, 12) #define BITS_RXAGC_OFDM GENMASK(8, 4) -#define REG_DCKA_I_0 0x18bc -#define REG_DCKA_I_1 0x18c0 -#define REG_DCKA_Q_0 0x18d8 -#define REG_DCKA_Q_1 0x18dc -#define REG_CCKSB 0x1a00 -#define REG_RXCCKSEL 0x1a04 -#define REG_BGCTRL 0x1a14 +#define REG_DCKA_I_0 0x18bc +#define REG_DCKA_I_1 0x18c0 +#define REG_DCKA_Q_0 0x18d8 +#define REG_DCKA_Q_1 0x18dc + +#define REG_CCKSB 0x1a00 +#define BIT_BBMODE GENMASK(2, 1) +#define REG_RXCCKSEL 0x1a04 +#define REG_BGCTRL 0x1a14 #define BITS_RX_IQ_WEIGHT (BIT(8) | BIT(9)) -#define REG_TXF0 0x1a20 -#define REG_TXF1 0x1a24 -#define REG_TXF2 0x1a28 -#define REG_CCANRX 0x1a2c +#define REG_TXF0 0x1a20 +#define REG_TXF1 0x1a24 +#define REG_TXF2 0x1a28 +#define REG_CCANRX 0x1a2c #define BIT_CCK_FA_RST (BIT(14) | BIT(15)) #define BIT_OFDM_FA_RST (BIT(12) | BIT(13)) -#define REG_CCK_FACNT 0x1a5c -#define REG_CCKTXONLY 0x1a80 +#define REG_CCK_FACNT 0x1a5c +#define REG_CCKTXONLY 0x1a80 #define BIT_BB_CCK_CHECK_EN BIT(18) -#define REG_TXF3 0x1a98 -#define REG_TXF4 0x1a9c -#define REG_TXF5 0x1aa0 -#define REG_TXF6 0x1aac -#define REG_TXF7 0x1ab0 -#define REG_CCK_SOURCE 0x1abc +#define REG_TXF3 0x1a98 +#define REG_TXF4 0x1a9c +#define REG_TXF5 0x1aa0 +#define REG_TXF6 0x1aac +#define REG_TXF7 0x1ab0 +#define REG_CCK_SOURCE 0x1abc #define BIT_NBI_EN BIT(30) -#define REG_IQKSTAT 0x1b10 -#define REG_TXANT 0x1c28 -#define REG_ENCCK 0x1c3c -#define BIT_CCK_BLK_EN BIT(1) -#define BIT_CCK_OFDM_BLK_EN (BIT(0) | BIT(1)) -#define REG_CCAMSK 0x1c80 -#define REG_RSTB 0x1c90 -#define BIT_RSTB_3WIRE BIT(8) -#define REG_RX_BREAK 0x1d2c -#define BIT_COM_RX_GCK_EN BIT(31) -#define REG_RXFNCTL 0x1d30 -#define REG_RXIGI 0x1d70 -#define REG_ENFN 0x1e24 -#define REG_TXANTSEG 0x1e28 -#define REG_TXLGMAP 0x1e2c -#define REG_CCKPATH 0x1e5c -#define REG_CNT_CTRL 0x1eb4 -#define BIT_ALL_CNT_RST BIT(25) -#define REG_OFDM_FACNT 0x2d00 -#define REG_OFDM_FACNT1 0x2d04 -#define REG_OFDM_FACNT2 0x2d08 -#define REG_OFDM_FACNT3 0x2d0c -#define REG_OFDM_FACNT4 0x2d10 -#define REG_OFDM_FACNT5 0x2d20 -#define REG_RPT_CIP 0x2d9c -#define REG_OFDM_TXCNT 0x2de0 -#define REG_ORITXCODE2 0x4100 -#define REG_3WIRE2 0x410c -#define REG_ANAPAR_B 0x4130 -#define REG_RXAGCCTL 0x41ac -#define REG_DCKB_I_0 0x41bc -#define REG_DCKB_I_1 0x41c0 -#define REG_DCKB_Q_0 0x41d8 -#define REG_DCKB_Q_1 0x41dc - -#define RF_MODE_TRXAGC 0x00 -#define RF_RXAGC_OFFSET 0x19 -#define RF_BW_TRXBB 0x1a -#define RF_TX_GAIN_OFFSET 0x55 -#define RF_TX_GAIN 0x56 -#define RF_TXA_LB_SW 0x63 -#define RF_RXG_GAIN 0x87 -#define RF_RXA_MIX_GAIN 0x8a -#define RF_EXT_TIA_BW 0x8f -#define RF_DEBUG 0xde #define REG_NCTL0 0x1b00 +#define BIT_SEL_PATH GENMASK(2, 1) +#define BIT_SUBPAGE GENMASK(3, 0) #define REG_DPD_CTL0_S0 0x1b04 +#define BIT_GS_PWSF GENMASK(27, 0) #define REG_DPD_CTL1_S0 0x1b08 +#define BIT_DPD_EN BIT(31) +#define BIT_PS_EN BIT(7) +#define REG_IQKSTAT 0x1b10 #define REG_IQK_CTL1 0x1b20 +#define BIT_TX_CFIR GENMASK(31, 30) +#define BIT_CFIR_EN GENMASK(26, 24) +#define BIT_BYPASS_DPD BIT(25) + +#define REG_TX_TONE_IDX 0x1b2c #define REG_DPD_LUT0 0x1b44 +#define BIT_GLOSS_DB GENMASK(14, 12) #define REG_DPD_CTL0_S1 0x1b5c -#define REG_DPD_LUT3 0x1b60 #define REG_DPD_CTL1_S1 0x1b60 #define REG_DPD_AGC 0x1b67 +#define REG_TABLE_SEL 0x1b98 +#define BIT_I_GAIN GENMASK(19, 16) +#define BIT_GAIN_RST BIT(15) +#define BIT_Q_GAIN_SEL GENMASK(14, 12) +#define BIT_Q_GAIN GENMASK(11, 0) +#define REG_TX_GAIN_SET 0x1b9c +#define BIT_GAPK_RPT_IDX GENMASK(11, 8) #define REG_DPD_CTL0 0x1bb4 +#define REG_SINGLE_TONE_SW 0x1bb8 +#define BIT_IRQ_TEST_MODE BIT(20) #define REG_R_CONFIG 0x1bcc +#define BIT_INNER_LB BIT(21) +#define BIT_IQ_SWITCH GENMASK(5, 0) +#define BIT_2G_SWING 0x2d +#define BIT_5G_SWING 0x36 #define REG_RXSRAM_CTL 0x1bd4 +#define BIT_RPT_EN BIT(21) +#define BIT_RPT_SEL GENMASK(20, 16) +#define BIT_DPD_CLK GENMASK(7, 4) #define REG_DPD_CTL11 0x1be4 #define REG_DPD_CTL12 0x1be8 #define REG_DPD_CTL15 0x1bf4 #define REG_DPD_CTL16 0x1bf8 #define REG_STAT_RPT 0x1bfc +#define BIT_RPT_DGAIN GENMASK(27, 16) +#define BIT_GAPK_RPT0 GENMASK(3, 0) +#define BIT_GAPK_RPT1 GENMASK(7, 4) +#define BIT_GAPK_RPT2 GENMASK(11, 8) +#define BIT_GAPK_RPT3 GENMASK(15, 12) +#define BIT_GAPK_RPT4 GENMASK(19, 16) +#define BIT_GAPK_RPT5 GENMASK(23, 20) +#define BIT_GAPK_RPT6 GENMASK(27, 24) +#define BIT_GAPK_RPT7 GENMASK(31, 28) + +#define REG_TXANT 0x1c28 +#define REG_IQK_CTRL 0x1c38 +#define REG_ENCCK 0x1c3c +#define BIT_CCK_BLK_EN BIT(1) +#define BIT_CCK_OFDM_BLK_EN (BIT(0) | BIT(1)) +#define REG_CCAMSK 0x1c80 +#define REG_RSTB 0x1c90 +#define BIT_RSTB_3WIRE BIT(8) +#define REG_CH_DELAY_EXTR2 0x1cd0 +#define BIT_TST_IQK2SET_SRC BIT(31) +#define BIT_EN_IOQ_IQK_DPK BIT(30) +#define BIT_IQK_DPK_RESET_SRC BIT(29) +#define BIT_IQK_DPK_CLOCK_SRC BIT(28) + +#define REG_RX_BREAK 0x1d2c +#define BIT_COM_RX_GCK_EN BIT(31) +#define REG_RXFNCTL 0x1d30 +#define REG_CCA_OFF 0x1d58 +#define BIT_CCA_ON_BY_PW GENMASK(11, 3) +#define REG_RXIGI 0x1d70 + +#define REG_ENFN 0x1e24 +#define BIT_IQK_DPK_EN BIT(17) +#define REG_TXANTSEG 0x1e28 +#define BIT_ANTSEG GENMASK(3, 0) +#define REG_TXLGMAP 0x1e2c +#define REG_CCKPATH 0x1e5c +#define REG_TX_FIFO 0x1e70 +#define BIT_STOP_TX GENMASK(3, 0) +#define REG_CNT_CTRL 0x1eb4 +#define BIT_ALL_CNT_RST BIT(25) + +#define REG_OFDM_FACNT 0x2d00 +#define REG_OFDM_FACNT1 0x2d04 +#define REG_OFDM_FACNT2 0x2d08 +#define REG_OFDM_FACNT3 0x2d0c +#define REG_OFDM_FACNT4 0x2d10 +#define REG_OFDM_FACNT5 0x2d20 +#define REG_RPT_CIP 0x2d9c +#define BIT_RPT_CIP_STATUS GENMASK(7, 0) +#define REG_OFDM_TXCNT 0x2de0 +#define REG_ORITXCODE2 0x4100 +#define REG_3WIRE2 0x410c +#define REG_ANAPAR_B 0x4130 +#define REG_RFTXEN_GCK_B 0x4164 +#define REG_DIS_SHARE_RX_B 0x416c #define BIT_EXT_TIA_BW BIT(1) -#define BIT_DE_TRXBW BIT(2) -#define BIT_DE_TX_GAIN BIT(16) -#define BIT_RXG_GAIN BIT(18) -#define BIT_DE_PWR_TRIM BIT(19) -#define BIT_INNER_LB BIT(21) -#define BIT_BYPASS_DPD BIT(25) -#define BIT_DPD_EN BIT(31) -#define BIT_SUBPAGE GENMASK(3, 0) +#define REG_RXAGCCTL 0x41ac +#define REG_DCKB_I_0 0x41bc +#define REG_DCKB_I_1 0x41c0 +#define REG_DCKB_Q_0 0x41d8 +#define REG_DCKB_Q_1 0x41dc + +#define RF_MODE_TRXAGC 0x00 +#define BIT_RF_MODE GENMASK(19, 16) +#define BIT_RXAGC GENMASK(9, 5) #define BIT_TXAGC GENMASK(4, 0) +#define RF_RXAGC_OFFSET 0x19 +#define RF_BW_TRXBB 0x1a +#define BIT_TX_CCK_IND BIT(16) +#define BIT_BW_TXBB GENMASK(14, 12) +#define BIT_BW_RXBB GENMASK(11, 10) +#define BIT_DBG_CCK_CCA BIT(1) +#define RF_TX_GAIN_OFFSET 0x55 +#define BIT_BB_GAIN GENMASK(18, 14) +#define BIT_RF_GAIN GENMASK(4, 2) +#define RF_TX_GAIN 0x56 #define BIT_GAIN_TXBB GENMASK(4, 0) +#define RF_IDAC 0x58 +#define BIT_TX_MODE GENMASK(19, 8) +#define RF_TX_RESULT 0x5f +#define BIT_GAIN_TX_PAD_H GENMASK(11, 8) +#define BIT_GAIN_TX_PAD_L GENMASK(7, 4) +#define RF_PA 0x60 +#define RF_PABIAS_2G_MASK GENMASK(15, 12) +#define RF_PABIAS_5G_MASK GENMASK(19, 16) +#define RF_TXA_LB_SW 0x63 +#define BIT_TXA_LB_ATT GENMASK(15, 14) +#define BIT_LB_SW GENMASK(13, 12) #define BIT_LB_ATT GENMASK(4, 2) +#define RF_RXG_GAIN 0x87 +#define BIT_RXG_GAIN BIT(18) +#define RF_RXA_MIX_GAIN 0x8a #define BIT_RXA_MIX_GAIN GENMASK(4, 3) -#define BIT_IQ_SWITCH GENMASK(5, 0) -#define BIT_DPD_CLK GENMASK(7, 4) -#define BIT_RXAGC GENMASK(9, 5) -#define BIT_BW_RXBB GENMASK(11, 10) -#define BIT_LB_SW GENMASK(13, 12) -#define BIT_BW_TXBB GENMASK(14, 12) -#define BIT_GLOSS_DB GENMASK(14, 12) -#define BIT_TXA_LB_ATT GENMASK(15, 14) -#define BIT_TX_OFFSET_VAL GENMASK(18, 14) -#define BIT_RPT_SEL GENMASK(20, 16) -#define BIT_GS_PWSF GENMASK(27, 0) -#define BIT_RPT_DGAIN GENMASK(27, 16) -#define BIT_TX_CFIR GENMASK(31, 30) - -#define PPG_THERMAL_A 0x1ef -#define PPG_THERMAL_B 0x1b0 -#define RF_THEMAL_MASK GENMASK(19, 16) -#define PPG_2GL_TXAB 0x1d4 -#define PPG_2GM_TXAB 0x1ee -#define PPG_2GH_TXAB 0x1d2 -#define PPG_2G_A_MASK GENMASK(3, 0) -#define PPG_2G_B_MASK GENMASK(7, 4) -#define PPG_5GL1_TXA 0x1ec -#define PPG_5GL2_TXA 0x1e8 -#define PPG_5GM1_TXA 0x1e4 -#define PPG_5GM2_TXA 0x1e0 -#define PPG_5GH1_TXA 0x1dc -#define PPG_5GL1_TXB 0x1eb -#define PPG_5GL2_TXB 0x1e7 -#define PPG_5GM1_TXB 0x1e3 -#define PPG_5GM2_TXB 0x1df -#define PPG_5GH1_TXB 0x1db -#define PPG_5G_MASK GENMASK(4, 0) -#define PPG_PABIAS_2GA 0x1d6 -#define PPG_PABIAS_2GB 0x1d5 -#define PPG_PABIAS_5GA 0x1d8 -#define PPG_PABIAS_5GB 0x1d7 -#define PPG_PABIAS_MASK GENMASK(3, 0) -#define RF_PABIAS_2G_MASK GENMASK(15, 12) -#define RF_PABIAS_5G_MASK GENMASK(19, 16) +#define RF_EXT_TIA_BW 0x8f +#define BIT_PW_EXT_TIA BIT(1) +#define RF_DIS_BYPASS_TXBB 0x9e +#define BIT_TXBB BIT(10) +#define BIT_TIA_BYPASS BIT(5) +#define RF_DEBUG 0xde +#define BIT_DE_PWR_TRIM BIT(19) +#define BIT_DE_TX_GAIN BIT(16) +#define BIT_DE_TRXBW BIT(2) +#define PPG_THERMAL_B 0x1b0 +#define RF_THEMAL_MASK GENMASK(19, 16) +#define PPG_2GH_TXAB 0x1d2 +#define PPG_2G_A_MASK GENMASK(3, 0) +#define PPG_2G_B_MASK GENMASK(7, 4) +#define PPG_2GL_TXAB 0x1d4 +#define PPG_PABIAS_2GB 0x1d5 +#define PPG_PABIAS_2GA 0x1d6 +#define PPG_PABIAS_MASK GENMASK(3, 0) +#define PPG_PABIAS_5GB 0x1d7 +#define PPG_PABIAS_5GA 0x1d8 +#define PPG_5G_MASK GENMASK(4, 0) +#define PPG_5GH1_TXB 0x1db +#define PPG_5GH1_TXA 0x1dc +#define PPG_5GM2_TXB 0x1df +#define PPG_5GM2_TXA 0x1e0 +#define PPG_5GM1_TXB 0x1e3 +#define PPG_5GM1_TXA 0x1e4 +#define PPG_5GL2_TXB 0x1e7 +#define PPG_5GL2_TXA 0x1e8 +#define PPG_5GL1_TXB 0x1eb +#define PPG_5GL1_TXA 0x1ec +#define PPG_2GM_TXAB 0x1ee +#define PPG_THERMAL_A 0x1ef #endif diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822c_table.c b/drivers/net/wireless/realtek/rtw88/rtw8822c_table.c index 3a204a7533..f9e3d0779c 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8822c_table.c +++ b/drivers/net/wireless/realtek/rtw88/rtw8822c_table.c @@ -13,7 +13,72 @@ static const u32 rtw8822c_mac[] = { RTW_DECL_TABLE_PHY_COND(rtw8822c_mac, rtw_phy_cfg_mac); static const u32 rtw8822c_agc[] = { - 0x80000015, 0x00000000, 0x40000000, 0x00000000, + 0x83000000, 0x00000000, 0x40000000, 0x00000000, + 0x1D90, 0x300001FF, + 0x1D90, 0x300101FE, + 0x1D90, 0x300201FD, + 0x1D90, 0x300301FC, + 0x1D90, 0x300401FB, + 0x1D90, 0x300501FA, + 0x1D90, 0x300601F9, + 0x1D90, 0x300701F8, + 0x1D90, 0x300801F7, + 0x1D90, 0x300901F6, + 0x1D90, 0x300A01F5, + 0x1D90, 0x300B01F4, + 0x1D90, 0x300C01F3, + 0x1D90, 0x300D01F2, + 0x1D90, 0x300E01F1, + 0x1D90, 0x300F01F0, + 0x1D90, 0x301001EF, + 0x1D90, 0x301101EE, + 0x1D90, 0x301201ED, + 0x1D90, 0x301301EC, + 0x1D90, 0x301401EB, + 0x1D90, 0x301501EA, + 0x1D90, 0x301601E9, + 0x1D90, 0x301701E8, + 0x1D90, 0x301801E7, + 0x1D90, 0x301901E5, + 0x1D90, 0x301A01E4, + 0x1D90, 0x301B01C5, + 0x1D90, 0x301C01C4, + 0x1D90, 0x301D01C3, + 0x1D90, 0x301E01C2, + 0x1D90, 0x301F0188, + 0x1D90, 0x30200187, + 0x1D90, 0x30210186, + 0x1D90, 0x30220184, + 0x1D90, 0x30230183, + 0x1D90, 0x30240182, + 0x1D90, 0x30250181, + 0x1D90, 0x30260148, + 0x1D90, 0x30270147, + 0x1D90, 0x30280146, + 0x1D90, 0x30290144, + 0x1D90, 0x302A0143, + 0x1D90, 0x302B0142, + 0x1D90, 0x302C0141, + 0x1D90, 0x302D00C8, + 0x1D90, 0x302E00C7, + 0x1D90, 0x302F00C6, + 0x1D90, 0x303000C5, + 0x1D90, 0x303100C4, + 0x1D90, 0x303200C3, + 0x1D90, 0x30330048, + 0x1D90, 0x30340047, + 0x1D90, 0x30350046, + 0x1D90, 0x30360045, + 0x1D90, 0x30370025, + 0x1D90, 0x30380024, + 0x1D90, 0x30390023, + 0x1D90, 0x303A0022, + 0x1D90, 0x303B0021, + 0x1D90, 0x303C0020, + 0x1D90, 0x303D0003, + 0x1D90, 0x303E0002, + 0x1D90, 0x303F0001, + 0x90000015, 0x00000000, 0x40000000, 0x00000000, 0x1D90, 0x300001FF, 0x1D90, 0x300101FE, 0x1D90, 0x300201FD, @@ -209,7 +274,72 @@ static const u32 rtw8822c_agc[] = { 0x1D90, 0x303E0002, 0x1D90, 0x303F0001, 0xB0000000, 0x00000000, - 0x80000015, 0x00000000, 0x40000000, 0x00000000, + 0x83000000, 0x00000000, 0x40000000, 0x00000000, + 0x1D90, 0x3040011F, + 0x1D90, 0x3041011F, + 0x1D90, 0x3042011F, + 0x1D90, 0x3043011F, + 0x1D90, 0x3044011F, + 0x1D90, 0x3045011F, + 0x1D90, 0x3046011F, + 0x1D90, 0x3047011F, + 0x1D90, 0x3048011F, + 0x1D90, 0x3049011F, + 0x1D90, 0x304A011F, + 0x1D90, 0x304B011F, + 0x1D90, 0x304C011F, + 0x1D90, 0x304D011F, + 0x1D90, 0x304E011F, + 0x1D90, 0x304F00F4, + 0x1D90, 0x305000F3, + 0x1D90, 0x305100F2, + 0x1D90, 0x305200F1, + 0x1D90, 0x305300F0, + 0x1D90, 0x305400EF, + 0x1D90, 0x305500EE, + 0x1D90, 0x305600ED, + 0x1D90, 0x305700EC, + 0x1D90, 0x305800EB, + 0x1D90, 0x305900EA, + 0x1D90, 0x305A00E9, + 0x1D90, 0x305B00E8, + 0x1D90, 0x305C00E7, + 0x1D90, 0x305D00E6, + 0x1D90, 0x305E00E4, + 0x1D90, 0x305F00E3, + 0x1D90, 0x306000E2, + 0x1D90, 0x306100C4, + 0x1D90, 0x306200C3, + 0x1D90, 0x306300C2, + 0x1D90, 0x306400A4, + 0x1D90, 0x306500A3, + 0x1D90, 0x306600A2, + 0x1D90, 0x306700A1, + 0x1D90, 0x30680084, + 0x1D90, 0x30690083, + 0x1D90, 0x306A0082, + 0x1D90, 0x306B0081, + 0x1D90, 0x306C0080, + 0x1D90, 0x306D0067, + 0x1D90, 0x306E0066, + 0x1D90, 0x306F0065, + 0x1D90, 0x30700064, + 0x1D90, 0x30710063, + 0x1D90, 0x30720044, + 0x1D90, 0x30730043, + 0x1D90, 0x30740042, + 0x1D90, 0x30750041, + 0x1D90, 0x30760024, + 0x1D90, 0x30770023, + 0x1D90, 0x30780022, + 0x1D90, 0x30790021, + 0x1D90, 0x307A0020, + 0x1D90, 0x307B0004, + 0x1D90, 0x307C0003, + 0x1D90, 0x307D0002, + 0x1D90, 0x307E0001, + 0x1D90, 0x307F0000, + 0x90000015, 0x00000000, 0x40000000, 0x00000000, 0x1D90, 0x304001FD, 0x1D90, 0x304101FC, 0x1D90, 0x304201FB, @@ -405,137 +535,202 @@ static const u32 rtw8822c_agc[] = { 0x1D90, 0x307E0001, 0x1D90, 0x307F0000, 0xB0000000, 0x00000000, - 0x80000015, 0x00000000, 0x40000000, 0x00000000, - 0x1D90, 0x308000FA, - 0x1D90, 0x308100F9, - 0x1D90, 0x308200F8, - 0x1D90, 0x308300F7, - 0x1D90, 0x308400F6, - 0x1D90, 0x308500F5, - 0x1D90, 0x308600F4, - 0x1D90, 0x308700F3, - 0x1D90, 0x308800F2, - 0x1D90, 0x308900F1, - 0x1D90, 0x308A00F0, - 0x1D90, 0x308B00EF, - 0x1D90, 0x308C00EE, - 0x1D90, 0x308D00ED, - 0x1D90, 0x308E00EC, - 0x1D90, 0x308F00EB, - 0x1D90, 0x309000EA, - 0x1D90, 0x309100E8, - 0x1D90, 0x309200E7, - 0x1D90, 0x309300E6, - 0x1D90, 0x309400E5, - 0x1D90, 0x309500E4, - 0x1D90, 0x309600C4, - 0x1D90, 0x309700C3, - 0x1D90, 0x309800C2, - 0x1D90, 0x309900C1, - 0x1D90, 0x309A00A3, - 0x1D90, 0x309B00A2, - 0x1D90, 0x309C00A1, - 0x1D90, 0x309D0085, - 0x1D90, 0x309E0084, - 0x1D90, 0x309F0083, - 0x1D90, 0x30A00082, - 0x1D90, 0x30A10081, - 0x1D90, 0x30A20067, - 0x1D90, 0x30A30066, - 0x1D90, 0x30A40065, - 0x1D90, 0x30A50064, - 0x1D90, 0x30A60063, - 0x1D90, 0x30A70044, - 0x1D90, 0x30A80043, - 0x1D90, 0x30A90042, - 0x1D90, 0x30AA0026, - 0x1D90, 0x30AB0025, - 0x1D90, 0x30AC0024, - 0x1D90, 0x30AD0023, - 0x1D90, 0x30AE0022, - 0x1D90, 0x30AF0021, - 0x1D90, 0x30B00005, - 0x1D90, 0x30B10004, - 0x1D90, 0x30B20003, - 0x1D90, 0x30B30002, - 0x1D90, 0x30B40001, - 0x1D90, 0x30B50000, - 0x1D90, 0x30B60000, - 0x1D90, 0x30B70000, - 0x1D90, 0x30B80000, - 0x1D90, 0x30B90000, - 0x1D90, 0x30BA0000, - 0x1D90, 0x30BB0000, - 0x1D90, 0x30BC0000, - 0x1D90, 0x30BD0000, - 0x1D90, 0x30BE0000, - 0x1D90, 0x30BF0000, - 0x90000016, 0x00000000, 0x40000000, 0x00000000, - 0x1D90, 0x308000FA, - 0x1D90, 0x308100F9, - 0x1D90, 0x308200F8, - 0x1D90, 0x308300F7, - 0x1D90, 0x308400F6, - 0x1D90, 0x308500F5, - 0x1D90, 0x308600F4, - 0x1D90, 0x308700F3, - 0x1D90, 0x308800F2, - 0x1D90, 0x308900F1, - 0x1D90, 0x308A00F0, - 0x1D90, 0x308B00EF, - 0x1D90, 0x308C00EE, - 0x1D90, 0x308D00ED, - 0x1D90, 0x308E00EC, - 0x1D90, 0x308F00EB, - 0x1D90, 0x309000EA, - 0x1D90, 0x309100E8, - 0x1D90, 0x309200E7, - 0x1D90, 0x309300E6, - 0x1D90, 0x309400E5, - 0x1D90, 0x309500E4, - 0x1D90, 0x309600C4, - 0x1D90, 0x309700C3, - 0x1D90, 0x309800C2, - 0x1D90, 0x309900C1, - 0x1D90, 0x309A00A3, - 0x1D90, 0x309B00A2, - 0x1D90, 0x309C00A1, - 0x1D90, 0x309D0085, - 0x1D90, 0x309E0084, - 0x1D90, 0x309F0083, - 0x1D90, 0x30A00082, - 0x1D90, 0x30A10081, - 0x1D90, 0x30A20067, - 0x1D90, 0x30A30066, - 0x1D90, 0x30A40065, - 0x1D90, 0x30A50064, - 0x1D90, 0x30A60063, - 0x1D90, 0x30A70044, - 0x1D90, 0x30A80043, - 0x1D90, 0x30A90042, - 0x1D90, 0x30AA0026, - 0x1D90, 0x30AB0025, - 0x1D90, 0x30AC0024, - 0x1D90, 0x30AD0023, - 0x1D90, 0x30AE0022, - 0x1D90, 0x30AF0021, - 0x1D90, 0x30B00005, - 0x1D90, 0x30B10004, - 0x1D90, 0x30B20003, - 0x1D90, 0x30B30002, - 0x1D90, 0x30B40001, - 0x1D90, 0x30B50000, - 0x1D90, 0x30B60000, - 0x1D90, 0x30B70000, - 0x1D90, 0x30B80000, - 0x1D90, 0x30B90000, - 0x1D90, 0x30BA0000, - 0x1D90, 0x30BB0000, - 0x1D90, 0x30BC0000, - 0x1D90, 0x30BD0000, - 0x1D90, 0x30BE0000, - 0x1D90, 0x30BF0000, - 0xA0000000, 0x00000000, + 0x83000000, 0x00000000, 0x40000000, 0x00000000, + 0x1D90, 0x308000FF, + 0x1D90, 0x308100FF, + 0x1D90, 0x308200FF, + 0x1D90, 0x308300FF, + 0x1D90, 0x308400FF, + 0x1D90, 0x308500FF, + 0x1D90, 0x308600FE, + 0x1D90, 0x308700FD, + 0x1D90, 0x308800FC, + 0x1D90, 0x308900FB, + 0x1D90, 0x308A00FA, + 0x1D90, 0x308B00F9, + 0x1D90, 0x308C00F8, + 0x1D90, 0x308D00F7, + 0x1D90, 0x308E00F6, + 0x1D90, 0x308F00F5, + 0x1D90, 0x309000F4, + 0x1D90, 0x309100F3, + 0x1D90, 0x309200F2, + 0x1D90, 0x309300F1, + 0x1D90, 0x309400F0, + 0x1D90, 0x309500EF, + 0x1D90, 0x309600EE, + 0x1D90, 0x309700ED, + 0x1D90, 0x309800EC, + 0x1D90, 0x309900EB, + 0x1D90, 0x309A00EA, + 0x1D90, 0x309B00E8, + 0x1D90, 0x309C00E7, + 0x1D90, 0x309D00E6, + 0x1D90, 0x309E00E5, + 0x1D90, 0x309F00E4, + 0x1D90, 0x30A000C4, + 0x1D90, 0x30A100C3, + 0x1D90, 0x30A200C2, + 0x1D90, 0x30A300C1, + 0x1D90, 0x30A400A3, + 0x1D90, 0x30A500A2, + 0x1D90, 0x30A600A1, + 0x1D90, 0x30A70085, + 0x1D90, 0x30A80084, + 0x1D90, 0x30A90083, + 0x1D90, 0x30AA0082, + 0x1D90, 0x30AB0081, + 0x1D90, 0x30AC0067, + 0x1D90, 0x30AD0066, + 0x1D90, 0x30AE0065, + 0x1D90, 0x30AF0064, + 0x1D90, 0x30B00063, + 0x1D90, 0x30B10044, + 0x1D90, 0x30B20043, + 0x1D90, 0x30B30042, + 0x1D90, 0x30B40026, + 0x1D90, 0x30B50025, + 0x1D90, 0x30B60024, + 0x1D90, 0x30B70023, + 0x1D90, 0x30B80022, + 0x1D90, 0x30B90021, + 0x1D90, 0x30BA0005, + 0x1D90, 0x30BB0004, + 0x1D90, 0x30BC0003, + 0x1D90, 0x30BD0002, + 0x1D90, 0x30BE0001, + 0x1D90, 0x30BF0000, + 0x90000015, 0x00000000, 0x40000000, 0x00000000, + 0x1D90, 0x308000FA, + 0x1D90, 0x308100F9, + 0x1D90, 0x308200F8, + 0x1D90, 0x308300F7, + 0x1D90, 0x308400F6, + 0x1D90, 0x308500F5, + 0x1D90, 0x308600F4, + 0x1D90, 0x308700F3, + 0x1D90, 0x308800F2, + 0x1D90, 0x308900F1, + 0x1D90, 0x308A00F0, + 0x1D90, 0x308B00EF, + 0x1D90, 0x308C00EE, + 0x1D90, 0x308D00ED, + 0x1D90, 0x308E00EC, + 0x1D90, 0x308F00EB, + 0x1D90, 0x309000EA, + 0x1D90, 0x309100E8, + 0x1D90, 0x309200E7, + 0x1D90, 0x309300E6, + 0x1D90, 0x309400E5, + 0x1D90, 0x309500E4, + 0x1D90, 0x309600C4, + 0x1D90, 0x309700C3, + 0x1D90, 0x309800C2, + 0x1D90, 0x309900C1, + 0x1D90, 0x309A00A3, + 0x1D90, 0x309B00A2, + 0x1D90, 0x309C00A1, + 0x1D90, 0x309D0085, + 0x1D90, 0x309E0084, + 0x1D90, 0x309F0083, + 0x1D90, 0x30A00082, + 0x1D90, 0x30A10081, + 0x1D90, 0x30A20067, + 0x1D90, 0x30A30066, + 0x1D90, 0x30A40065, + 0x1D90, 0x30A50064, + 0x1D90, 0x30A60063, + 0x1D90, 0x30A70044, + 0x1D90, 0x30A80043, + 0x1D90, 0x30A90042, + 0x1D90, 0x30AA0026, + 0x1D90, 0x30AB0025, + 0x1D90, 0x30AC0024, + 0x1D90, 0x30AD0023, + 0x1D90, 0x30AE0022, + 0x1D90, 0x30AF0021, + 0x1D90, 0x30B00005, + 0x1D90, 0x30B10004, + 0x1D90, 0x30B20003, + 0x1D90, 0x30B30002, + 0x1D90, 0x30B40001, + 0x1D90, 0x30B50000, + 0x1D90, 0x30B60000, + 0x1D90, 0x30B70000, + 0x1D90, 0x30B80000, + 0x1D90, 0x30B90000, + 0x1D90, 0x30BA0000, + 0x1D90, 0x30BB0000, + 0x1D90, 0x30BC0000, + 0x1D90, 0x30BD0000, + 0x1D90, 0x30BE0000, + 0x1D90, 0x30BF0000, + 0x90000016, 0x00000000, 0x40000000, 0x00000000, + 0x1D90, 0x308000FA, + 0x1D90, 0x308100F9, + 0x1D90, 0x308200F8, + 0x1D90, 0x308300F7, + 0x1D90, 0x308400F6, + 0x1D90, 0x308500F5, + 0x1D90, 0x308600F4, + 0x1D90, 0x308700F3, + 0x1D90, 0x308800F2, + 0x1D90, 0x308900F1, + 0x1D90, 0x308A00F0, + 0x1D90, 0x308B00EF, + 0x1D90, 0x308C00EE, + 0x1D90, 0x308D00ED, + 0x1D90, 0x308E00EC, + 0x1D90, 0x308F00EB, + 0x1D90, 0x309000EA, + 0x1D90, 0x309100E8, + 0x1D90, 0x309200E7, + 0x1D90, 0x309300E6, + 0x1D90, 0x309400E5, + 0x1D90, 0x309500E4, + 0x1D90, 0x309600C4, + 0x1D90, 0x309700C3, + 0x1D90, 0x309800C2, + 0x1D90, 0x309900C1, + 0x1D90, 0x309A00A3, + 0x1D90, 0x309B00A2, + 0x1D90, 0x309C00A1, + 0x1D90, 0x309D0085, + 0x1D90, 0x309E0084, + 0x1D90, 0x309F0083, + 0x1D90, 0x30A00082, + 0x1D90, 0x30A10081, + 0x1D90, 0x30A20067, + 0x1D90, 0x30A30066, + 0x1D90, 0x30A40065, + 0x1D90, 0x30A50064, + 0x1D90, 0x30A60063, + 0x1D90, 0x30A70044, + 0x1D90, 0x30A80043, + 0x1D90, 0x30A90042, + 0x1D90, 0x30AA0026, + 0x1D90, 0x30AB0025, + 0x1D90, 0x30AC0024, + 0x1D90, 0x30AD0023, + 0x1D90, 0x30AE0022, + 0x1D90, 0x30AF0021, + 0x1D90, 0x30B00005, + 0x1D90, 0x30B10004, + 0x1D90, 0x30B20003, + 0x1D90, 0x30B30002, + 0x1D90, 0x30B40001, + 0x1D90, 0x30B50000, + 0x1D90, 0x30B60000, + 0x1D90, 0x30B70000, + 0x1D90, 0x30B80000, + 0x1D90, 0x30B90000, + 0x1D90, 0x30BA0000, + 0x1D90, 0x30BB0000, + 0x1D90, 0x30BC0000, + 0x1D90, 0x30BD0000, + 0x1D90, 0x30BE0000, + 0x1D90, 0x30BF0000, + 0xA0000000, 0x00000000, 0x1D90, 0x308000FF, 0x1D90, 0x308100FF, 0x1D90, 0x308200FF, @@ -601,7 +796,72 @@ static const u32 rtw8822c_agc[] = { 0x1D90, 0x30BE0001, 0x1D90, 0x30BF0000, 0xB0000000, 0x00000000, - 0x80000015, 0x00000000, 0x40000000, 0x00000000, + 0x83000000, 0x00000000, 0x40000000, 0x00000000, + 0x1D90, 0x30C000FF, + 0x1D90, 0x30C100FF, + 0x1D90, 0x30C200FF, + 0x1D90, 0x30C300FF, + 0x1D90, 0x30C400FF, + 0x1D90, 0x30C500FF, + 0x1D90, 0x30C600FE, + 0x1D90, 0x30C700FD, + 0x1D90, 0x30C800FC, + 0x1D90, 0x30C900FB, + 0x1D90, 0x30CA00FA, + 0x1D90, 0x30CB00F9, + 0x1D90, 0x30CC00F8, + 0x1D90, 0x30CD00F7, + 0x1D90, 0x30CE00F6, + 0x1D90, 0x30CF00F5, + 0x1D90, 0x30D000F4, + 0x1D90, 0x30D100F3, + 0x1D90, 0x30D200F2, + 0x1D90, 0x30D300F1, + 0x1D90, 0x30D400F0, + 0x1D90, 0x30D500EF, + 0x1D90, 0x30D600EE, + 0x1D90, 0x30D700ED, + 0x1D90, 0x30D800EC, + 0x1D90, 0x30D900EB, + 0x1D90, 0x30DA00EA, + 0x1D90, 0x30DB00E8, + 0x1D90, 0x30DC00E7, + 0x1D90, 0x30DD00E6, + 0x1D90, 0x30DE00E5, + 0x1D90, 0x30DF00E4, + 0x1D90, 0x30E000E3, + 0x1D90, 0x30E100E2, + 0x1D90, 0x30E200A6, + 0x1D90, 0x30E300A5, + 0x1D90, 0x30E400A4, + 0x1D90, 0x30E500A3, + 0x1D90, 0x30E600A2, + 0x1D90, 0x30E70086, + 0x1D90, 0x30E80085, + 0x1D90, 0x30E90084, + 0x1D90, 0x30EA0083, + 0x1D90, 0x30EB0082, + 0x1D90, 0x30EC0067, + 0x1D90, 0x30ED0066, + 0x1D90, 0x30EE0065, + 0x1D90, 0x30EF0064, + 0x1D90, 0x30F00063, + 0x1D90, 0x30F10045, + 0x1D90, 0x30F20044, + 0x1D90, 0x30F30043, + 0x1D90, 0x30F40042, + 0x1D90, 0x30F50025, + 0x1D90, 0x30F60024, + 0x1D90, 0x30F70023, + 0x1D90, 0x30F80022, + 0x1D90, 0x30F90021, + 0x1D90, 0x30FA0005, + 0x1D90, 0x30FB0004, + 0x1D90, 0x30FC0003, + 0x1D90, 0x30FD0002, + 0x1D90, 0x30FE0001, + 0x1D90, 0x30FF0000, + 0x90000015, 0x00000000, 0x40000000, 0x00000000, 0x1D90, 0x30C000F8, 0x1D90, 0x30C100F7, 0x1D90, 0x30C200F6, @@ -797,267 +1057,397 @@ static const u32 rtw8822c_agc[] = { 0x1D90, 0x30FE0001, 0x1D90, 0x30FF0000, 0xB0000000, 0x00000000, - 0x80000015, 0x00000000, 0x40000000, 0x00000000, + 0x83000000, 0x00000000, 0x40000000, 0x00000000, + 0x1D90, 0x310001FF, + 0x1D90, 0x310101FF, + 0x1D90, 0x310201FF, + 0x1D90, 0x310301FF, + 0x1D90, 0x310401FE, + 0x1D90, 0x310501FD, + 0x1D90, 0x310601FC, + 0x1D90, 0x310701FB, + 0x1D90, 0x310801FA, + 0x1D90, 0x310901F9, + 0x1D90, 0x310A01F8, + 0x1D90, 0x310B01F7, + 0x1D90, 0x310C01F6, + 0x1D90, 0x310D01F5, + 0x1D90, 0x310E01F4, + 0x1D90, 0x310F01F3, + 0x1D90, 0x311001F2, + 0x1D90, 0x311101F1, + 0x1D90, 0x311201F0, + 0x1D90, 0x311301EF, + 0x1D90, 0x311401EE, + 0x1D90, 0x311501ED, + 0x1D90, 0x311601EC, + 0x1D90, 0x311701EB, + 0x1D90, 0x311801EA, + 0x1D90, 0x311901E9, + 0x1D90, 0x311A01E8, + 0x1D90, 0x311B01E7, + 0x1D90, 0x311C01E5, + 0x1D90, 0x311D01E4, + 0x1D90, 0x311E01C5, + 0x1D90, 0x311F01C4, + 0x1D90, 0x312001C3, + 0x1D90, 0x312101C2, + 0x1D90, 0x31220188, + 0x1D90, 0x31230187, + 0x1D90, 0x31240186, + 0x1D90, 0x31250184, + 0x1D90, 0x31260183, + 0x1D90, 0x31270182, + 0x1D90, 0x31280181, + 0x1D90, 0x31290148, + 0x1D90, 0x312A0147, + 0x1D90, 0x312B0146, + 0x1D90, 0x312C0144, + 0x1D90, 0x312D0143, + 0x1D90, 0x312E0142, + 0x1D90, 0x312F0141, + 0x1D90, 0x313000C8, + 0x1D90, 0x313100C7, + 0x1D90, 0x313200C6, + 0x1D90, 0x313300C5, + 0x1D90, 0x313400C4, + 0x1D90, 0x313500C3, + 0x1D90, 0x31360048, + 0x1D90, 0x31370047, + 0x1D90, 0x31380046, + 0x1D90, 0x31390045, + 0x1D90, 0x313A0025, + 0x1D90, 0x313B0024, + 0x1D90, 0x313C0023, + 0x1D90, 0x313D0022, + 0x1D90, 0x313E0021, + 0x1D90, 0x313F0020, + 0x90000015, 0x00000000, 0x40000000, 0x00000000, 0x1D90, 0x310001FF, 0x1D90, 0x310101FF, 0x1D90, 0x310201FF, 0x1D90, 0x310301FF, - 0x1D90, 0x310401FF, - 0x1D90, 0x310501FF, - 0x1D90, 0x310601FF, - 0x1D90, 0x310701FF, - 0x1D90, 0x310801FF, - 0x1D90, 0x310901FE, - 0x1D90, 0x310A01FD, - 0x1D90, 0x310B01FC, - 0x1D90, 0x310C01FB, - 0x1D90, 0x310D01FA, - 0x1D90, 0x310E01F9, - 0x1D90, 0x310F01F8, - 0x1D90, 0x311001F7, - 0x1D90, 0x311101F6, - 0x1D90, 0x311201F5, - 0x1D90, 0x311301F4, - 0x1D90, 0x311401F3, - 0x1D90, 0x311501F2, - 0x1D90, 0x311601F1, - 0x1D90, 0x311701F0, - 0x1D90, 0x311801EF, - 0x1D90, 0x311901EE, - 0x1D90, 0x311A01ED, - 0x1D90, 0x311B01EC, - 0x1D90, 0x311C01EB, - 0x1D90, 0x311D0192, - 0x1D90, 0x311E0191, - 0x1D90, 0x311F0190, - 0x1D90, 0x3120018F, - 0x1D90, 0x3121018E, - 0x1D90, 0x3122018D, - 0x1D90, 0x3123018C, - 0x1D90, 0x3124018B, - 0x1D90, 0x3125018A, - 0x1D90, 0x31260189, - 0x1D90, 0x31270188, - 0x1D90, 0x31280187, - 0x1D90, 0x31290186, - 0x1D90, 0x312A0185, - 0x1D90, 0x312B0149, - 0x1D90, 0x312C0148, - 0x1D90, 0x312D0147, - 0x1D90, 0x312E0146, - 0x1D90, 0x312F0145, - 0x1D90, 0x31300144, - 0x1D90, 0x31310143, - 0x1D90, 0x31320142, - 0x1D90, 0x31330141, - 0x1D90, 0x31340140, - 0x1D90, 0x313500C7, - 0x1D90, 0x313600C6, - 0x1D90, 0x313700C5, - 0x1D90, 0x313800C4, - 0x1D90, 0x313900C3, - 0x1D90, 0x313A0088, - 0x1D90, 0x313B0087, - 0x1D90, 0x313C0086, - 0x1D90, 0x313D0045, - 0x1D90, 0x313E0044, - 0x1D90, 0x313F0043, + 0x1D90, 0x310401FE, + 0x1D90, 0x310501FD, + 0x1D90, 0x310601FC, + 0x1D90, 0x310701FB, + 0x1D90, 0x310801FA, + 0x1D90, 0x310901F9, + 0x1D90, 0x310A01F8, + 0x1D90, 0x310B01F7, + 0x1D90, 0x310C01F6, + 0x1D90, 0x310D01F5, + 0x1D90, 0x310E01F4, + 0x1D90, 0x310F01F3, + 0x1D90, 0x311001F2, + 0x1D90, 0x311101F1, + 0x1D90, 0x311201F0, + 0x1D90, 0x311301EF, + 0x1D90, 0x311401EE, + 0x1D90, 0x311501ED, + 0x1D90, 0x311601EC, + 0x1D90, 0x311701EB, + 0x1D90, 0x311801EA, + 0x1D90, 0x311901E9, + 0x1D90, 0x311A01E8, + 0x1D90, 0x311B01E7, + 0x1D90, 0x311C01E5, + 0x1D90, 0x311D01E4, + 0x1D90, 0x311E01C5, + 0x1D90, 0x311F01C4, + 0x1D90, 0x312001C3, + 0x1D90, 0x312101C2, + 0x1D90, 0x31220188, + 0x1D90, 0x31230187, + 0x1D90, 0x31240186, + 0x1D90, 0x31250184, + 0x1D90, 0x31260183, + 0x1D90, 0x31270182, + 0x1D90, 0x31280181, + 0x1D90, 0x31290148, + 0x1D90, 0x312A0147, + 0x1D90, 0x312B0146, + 0x1D90, 0x312C0144, + 0x1D90, 0x312D0143, + 0x1D90, 0x312E0142, + 0x1D90, 0x312F0141, + 0x1D90, 0x313000C8, + 0x1D90, 0x313100C7, + 0x1D90, 0x313200C6, + 0x1D90, 0x313300C5, + 0x1D90, 0x313400C4, + 0x1D90, 0x313500C3, + 0x1D90, 0x31360048, + 0x1D90, 0x31370047, + 0x1D90, 0x31380046, + 0x1D90, 0x31390045, + 0x1D90, 0x313A0025, + 0x1D90, 0x313B0024, + 0x1D90, 0x313C0023, + 0x1D90, 0x313D0022, + 0x1D90, 0x313E0021, + 0x1D90, 0x313F0020, 0x90000016, 0x00000000, 0x40000000, 0x00000000, 0x1D90, 0x310001FF, 0x1D90, 0x310101FF, 0x1D90, 0x310201FF, 0x1D90, 0x310301FF, - 0x1D90, 0x310401FF, - 0x1D90, 0x310501FF, - 0x1D90, 0x310601FF, - 0x1D90, 0x310701FF, - 0x1D90, 0x310801FF, - 0x1D90, 0x310901FE, - 0x1D90, 0x310A01FD, - 0x1D90, 0x310B01FC, - 0x1D90, 0x310C01FB, - 0x1D90, 0x310D01FA, - 0x1D90, 0x310E01F9, - 0x1D90, 0x310F01F8, - 0x1D90, 0x311001F7, - 0x1D90, 0x311101F6, - 0x1D90, 0x311201F5, - 0x1D90, 0x311301F4, - 0x1D90, 0x311401F3, - 0x1D90, 0x311501F2, - 0x1D90, 0x311601F1, - 0x1D90, 0x311701F0, - 0x1D90, 0x311801EF, - 0x1D90, 0x311901EE, - 0x1D90, 0x311A01ED, - 0x1D90, 0x311B01EC, - 0x1D90, 0x311C01EB, - 0x1D90, 0x311D0192, - 0x1D90, 0x311E0191, - 0x1D90, 0x311F0190, - 0x1D90, 0x3120018F, - 0x1D90, 0x3121018E, - 0x1D90, 0x3122018D, - 0x1D90, 0x3123018C, - 0x1D90, 0x3124018B, - 0x1D90, 0x3125018A, - 0x1D90, 0x31260189, - 0x1D90, 0x31270188, - 0x1D90, 0x31280187, - 0x1D90, 0x31290186, - 0x1D90, 0x312A0185, - 0x1D90, 0x312B0149, - 0x1D90, 0x312C0148, - 0x1D90, 0x312D0147, - 0x1D90, 0x312E0146, - 0x1D90, 0x312F0145, - 0x1D90, 0x31300144, - 0x1D90, 0x31310143, - 0x1D90, 0x31320142, - 0x1D90, 0x31330141, - 0x1D90, 0x31340140, - 0x1D90, 0x313500C7, - 0x1D90, 0x313600C6, - 0x1D90, 0x313700C5, - 0x1D90, 0x313800C4, - 0x1D90, 0x313900C3, - 0x1D90, 0x313A0088, - 0x1D90, 0x313B0087, - 0x1D90, 0x313C0086, - 0x1D90, 0x313D0045, - 0x1D90, 0x313E0044, - 0x1D90, 0x313F0043, + 0x1D90, 0x310401FE, + 0x1D90, 0x310501FD, + 0x1D90, 0x310601FC, + 0x1D90, 0x310701FB, + 0x1D90, 0x310801FA, + 0x1D90, 0x310901F9, + 0x1D90, 0x310A01F8, + 0x1D90, 0x310B01F7, + 0x1D90, 0x310C01F6, + 0x1D90, 0x310D01F5, + 0x1D90, 0x310E01F4, + 0x1D90, 0x310F01F3, + 0x1D90, 0x311001F2, + 0x1D90, 0x311101F1, + 0x1D90, 0x311201F0, + 0x1D90, 0x311301EF, + 0x1D90, 0x311401EE, + 0x1D90, 0x311501ED, + 0x1D90, 0x311601EC, + 0x1D90, 0x311701EB, + 0x1D90, 0x311801EA, + 0x1D90, 0x311901E9, + 0x1D90, 0x311A01E8, + 0x1D90, 0x311B01E7, + 0x1D90, 0x311C01E5, + 0x1D90, 0x311D01E4, + 0x1D90, 0x311E01C5, + 0x1D90, 0x311F01C4, + 0x1D90, 0x312001C3, + 0x1D90, 0x312101C2, + 0x1D90, 0x31220188, + 0x1D90, 0x31230187, + 0x1D90, 0x31240186, + 0x1D90, 0x31250184, + 0x1D90, 0x31260183, + 0x1D90, 0x31270182, + 0x1D90, 0x31280181, + 0x1D90, 0x31290148, + 0x1D90, 0x312A0147, + 0x1D90, 0x312B0146, + 0x1D90, 0x312C0144, + 0x1D90, 0x312D0143, + 0x1D90, 0x312E0142, + 0x1D90, 0x312F0141, + 0x1D90, 0x313000C8, + 0x1D90, 0x313100C7, + 0x1D90, 0x313200C6, + 0x1D90, 0x313300C5, + 0x1D90, 0x313400C4, + 0x1D90, 0x313500C3, + 0x1D90, 0x31360048, + 0x1D90, 0x31370047, + 0x1D90, 0x31380046, + 0x1D90, 0x31390045, + 0x1D90, 0x313A0025, + 0x1D90, 0x313B0024, + 0x1D90, 0x313C0023, + 0x1D90, 0x313D0022, + 0x1D90, 0x313E0021, + 0x1D90, 0x313F0020, 0xA0000000, 0x00000000, 0x1D90, 0x310001FF, 0x1D90, 0x310101FF, 0x1D90, 0x310201FF, 0x1D90, 0x310301FF, - 0x1D90, 0x310401FF, - 0x1D90, 0x310501FF, - 0x1D90, 0x310601FF, - 0x1D90, 0x310701FF, - 0x1D90, 0x310801FF, - 0x1D90, 0x310901FE, - 0x1D90, 0x310A01FD, - 0x1D90, 0x310B01FC, - 0x1D90, 0x310C01FB, - 0x1D90, 0x310D01FA, - 0x1D90, 0x310E01F9, - 0x1D90, 0x310F01F8, - 0x1D90, 0x311001F7, - 0x1D90, 0x311101F6, - 0x1D90, 0x311201F5, - 0x1D90, 0x311301F4, - 0x1D90, 0x311401F3, - 0x1D90, 0x311501F2, - 0x1D90, 0x311601F1, - 0x1D90, 0x311701F0, - 0x1D90, 0x311801EF, - 0x1D90, 0x311901EE, - 0x1D90, 0x311A01ED, - 0x1D90, 0x311B01EC, - 0x1D90, 0x311C01EB, - 0x1D90, 0x311D0192, - 0x1D90, 0x311E0191, - 0x1D90, 0x311F0190, - 0x1D90, 0x3120018F, - 0x1D90, 0x3121018E, - 0x1D90, 0x3122018D, - 0x1D90, 0x3123018C, - 0x1D90, 0x3124018B, - 0x1D90, 0x3125018A, - 0x1D90, 0x31260189, - 0x1D90, 0x31270188, - 0x1D90, 0x31280187, - 0x1D90, 0x31290186, - 0x1D90, 0x312A0185, - 0x1D90, 0x312B0149, - 0x1D90, 0x312C0148, - 0x1D90, 0x312D0147, - 0x1D90, 0x312E0146, - 0x1D90, 0x312F0145, - 0x1D90, 0x31300144, - 0x1D90, 0x31310143, - 0x1D90, 0x31320142, - 0x1D90, 0x31330141, - 0x1D90, 0x31340140, - 0x1D90, 0x313500C7, - 0x1D90, 0x313600C6, - 0x1D90, 0x313700C5, - 0x1D90, 0x313800C4, - 0x1D90, 0x313900C3, - 0x1D90, 0x313A0088, - 0x1D90, 0x313B0087, - 0x1D90, 0x313C0086, - 0x1D90, 0x313D0045, - 0x1D90, 0x313E0044, - 0x1D90, 0x313F0043, + 0x1D90, 0x310401FE, + 0x1D90, 0x310501FD, + 0x1D90, 0x310601FC, + 0x1D90, 0x310701FB, + 0x1D90, 0x310801FA, + 0x1D90, 0x310901F9, + 0x1D90, 0x310A01F8, + 0x1D90, 0x310B01F7, + 0x1D90, 0x310C01F6, + 0x1D90, 0x310D01F5, + 0x1D90, 0x310E01F4, + 0x1D90, 0x310F01F3, + 0x1D90, 0x311001F2, + 0x1D90, 0x311101F1, + 0x1D90, 0x311201F0, + 0x1D90, 0x311301EF, + 0x1D90, 0x311401EE, + 0x1D90, 0x311501ED, + 0x1D90, 0x311601EC, + 0x1D90, 0x311701EB, + 0x1D90, 0x311801EA, + 0x1D90, 0x311901E9, + 0x1D90, 0x311A01E8, + 0x1D90, 0x311B01E7, + 0x1D90, 0x311C01E5, + 0x1D90, 0x311D01E4, + 0x1D90, 0x311E01C5, + 0x1D90, 0x311F01C4, + 0x1D90, 0x312001C3, + 0x1D90, 0x312101C2, + 0x1D90, 0x31220188, + 0x1D90, 0x31230187, + 0x1D90, 0x31240186, + 0x1D90, 0x31250184, + 0x1D90, 0x31260183, + 0x1D90, 0x31270182, + 0x1D90, 0x31280181, + 0x1D90, 0x31290148, + 0x1D90, 0x312A0147, + 0x1D90, 0x312B0146, + 0x1D90, 0x312C0144, + 0x1D90, 0x312D0143, + 0x1D90, 0x312E0142, + 0x1D90, 0x312F0141, + 0x1D90, 0x313000C8, + 0x1D90, 0x313100C7, + 0x1D90, 0x313200C6, + 0x1D90, 0x313300C5, + 0x1D90, 0x313400C4, + 0x1D90, 0x313500C3, + 0x1D90, 0x31360048, + 0x1D90, 0x31370047, + 0x1D90, 0x31380046, + 0x1D90, 0x31390045, + 0x1D90, 0x313A0025, + 0x1D90, 0x313B0024, + 0x1D90, 0x313C0023, + 0x1D90, 0x313D0022, + 0x1D90, 0x313E0021, + 0x1D90, 0x313F0020, 0xB0000000, 0x00000000, - 0x80000015, 0x00000000, 0x40000000, 0x00000000, + 0x83000000, 0x00000000, 0x40000000, 0x00000000, 0x1D90, 0x314001FF, 0x1D90, 0x314101FF, 0x1D90, 0x314201FF, 0x1D90, 0x314301FF, 0x1D90, 0x314401FF, 0x1D90, 0x314501FF, - 0x1D90, 0x314601FF, - 0x1D90, 0x314701FE, - 0x1D90, 0x314801FD, - 0x1D90, 0x314901FC, - 0x1D90, 0x314A01FB, - 0x1D90, 0x314B01FA, - 0x1D90, 0x314C01F9, - 0x1D90, 0x314D01F8, - 0x1D90, 0x314E01F7, - 0x1D90, 0x314F01F6, - 0x1D90, 0x315001F5, - 0x1D90, 0x315101F4, - 0x1D90, 0x315201F3, - 0x1D90, 0x315301F2, - 0x1D90, 0x315401F1, - 0x1D90, 0x315501F0, - 0x1D90, 0x315601EF, - 0x1D90, 0x315701EE, - 0x1D90, 0x315801ED, - 0x1D90, 0x315901EC, - 0x1D90, 0x315A01EB, - 0x1D90, 0x315B01EA, - 0x1D90, 0x315C01E9, - 0x1D90, 0x315D018F, - 0x1D90, 0x315E018E, - 0x1D90, 0x315F018D, - 0x1D90, 0x3160018C, - 0x1D90, 0x3161018B, - 0x1D90, 0x3162018A, - 0x1D90, 0x31630189, - 0x1D90, 0x31640188, - 0x1D90, 0x31650187, - 0x1D90, 0x31660186, - 0x1D90, 0x31670185, - 0x1D90, 0x31680184, - 0x1D90, 0x31690183, - 0x1D90, 0x316A0182, - 0x1D90, 0x316B0149, - 0x1D90, 0x316C0148, - 0x1D90, 0x316D0147, - 0x1D90, 0x316E0146, - 0x1D90, 0x316F0145, - 0x1D90, 0x31700144, - 0x1D90, 0x31710143, - 0x1D90, 0x31720142, - 0x1D90, 0x31730141, - 0x1D90, 0x31740140, - 0x1D90, 0x317500C7, - 0x1D90, 0x317600C6, - 0x1D90, 0x317700C5, - 0x1D90, 0x317800C4, - 0x1D90, 0x317900C3, - 0x1D90, 0x317A0088, - 0x1D90, 0x317B0087, - 0x1D90, 0x317C0086, - 0x1D90, 0x317D0045, - 0x1D90, 0x317E0044, - 0x1D90, 0x317F0043, + 0x1D90, 0x314601FE, + 0x1D90, 0x314701FD, + 0x1D90, 0x314801FC, + 0x1D90, 0x314901FB, + 0x1D90, 0x314A01FA, + 0x1D90, 0x314B01F9, + 0x1D90, 0x314C01F8, + 0x1D90, 0x314D01F7, + 0x1D90, 0x314E01F6, + 0x1D90, 0x314F01F5, + 0x1D90, 0x315001F4, + 0x1D90, 0x315101F3, + 0x1D90, 0x315201F2, + 0x1D90, 0x315301F1, + 0x1D90, 0x315401F0, + 0x1D90, 0x315501EF, + 0x1D90, 0x315601EE, + 0x1D90, 0x315701ED, + 0x1D90, 0x315801EC, + 0x1D90, 0x315901EB, + 0x1D90, 0x315A01EA, + 0x1D90, 0x315B01E9, + 0x1D90, 0x315C01E7, + 0x1D90, 0x315D01E6, + 0x1D90, 0x315E01E5, + 0x1D90, 0x315F01E4, + 0x1D90, 0x316001A8, + 0x1D90, 0x316101A7, + 0x1D90, 0x316201A6, + 0x1D90, 0x316301A5, + 0x1D90, 0x31640185, + 0x1D90, 0x31650184, + 0x1D90, 0x31660183, + 0x1D90, 0x31670182, + 0x1D90, 0x31680149, + 0x1D90, 0x31690148, + 0x1D90, 0x316A0147, + 0x1D90, 0x316B0145, + 0x1D90, 0x316C0144, + 0x1D90, 0x316D0143, + 0x1D90, 0x316E0142, + 0x1D90, 0x316F00E6, + 0x1D90, 0x317000E5, + 0x1D90, 0x317100C9, + 0x1D90, 0x317200C8, + 0x1D90, 0x317300C7, + 0x1D90, 0x317400C6, + 0x1D90, 0x317500C5, + 0x1D90, 0x317600C4, + 0x1D90, 0x317700C3, + 0x1D90, 0x31780088, + 0x1D90, 0x31790087, + 0x1D90, 0x317A0086, + 0x1D90, 0x317B0085, + 0x1D90, 0x317C0026, + 0x1D90, 0x317D0025, + 0x1D90, 0x317E0024, + 0x1D90, 0x317F0023, + 0x90000015, 0x00000000, 0x40000000, 0x00000000, + 0x1D90, 0x314001FF, + 0x1D90, 0x314101FF, + 0x1D90, 0x314201FF, + 0x1D90, 0x314301FF, + 0x1D90, 0x314401FF, + 0x1D90, 0x314501FF, + 0x1D90, 0x314601FE, + 0x1D90, 0x314701FD, + 0x1D90, 0x314801FC, + 0x1D90, 0x314901FB, + 0x1D90, 0x314A01FA, + 0x1D90, 0x314B01F9, + 0x1D90, 0x314C01F8, + 0x1D90, 0x314D01F7, + 0x1D90, 0x314E01F6, + 0x1D90, 0x314F01F5, + 0x1D90, 0x315001F4, + 0x1D90, 0x315101F3, + 0x1D90, 0x315201F2, + 0x1D90, 0x315301F1, + 0x1D90, 0x315401F0, + 0x1D90, 0x315501EF, + 0x1D90, 0x315601EE, + 0x1D90, 0x315701ED, + 0x1D90, 0x315801EC, + 0x1D90, 0x315901EB, + 0x1D90, 0x315A01EA, + 0x1D90, 0x315B01E9, + 0x1D90, 0x315C01E7, + 0x1D90, 0x315D01E6, + 0x1D90, 0x315E01E5, + 0x1D90, 0x315F01E4, + 0x1D90, 0x316001A8, + 0x1D90, 0x316101A7, + 0x1D90, 0x316201A6, + 0x1D90, 0x316301A5, + 0x1D90, 0x31640185, + 0x1D90, 0x31650184, + 0x1D90, 0x31660183, + 0x1D90, 0x31670182, + 0x1D90, 0x31680149, + 0x1D90, 0x31690148, + 0x1D90, 0x316A0147, + 0x1D90, 0x316B0145, + 0x1D90, 0x316C0144, + 0x1D90, 0x316D0143, + 0x1D90, 0x316E0142, + 0x1D90, 0x316F00E6, + 0x1D90, 0x317000E5, + 0x1D90, 0x317100C9, + 0x1D90, 0x317200C8, + 0x1D90, 0x317300C7, + 0x1D90, 0x317400C6, + 0x1D90, 0x317500C5, + 0x1D90, 0x317600C4, + 0x1D90, 0x317700C3, + 0x1D90, 0x31780088, + 0x1D90, 0x31790087, + 0x1D90, 0x317A0086, + 0x1D90, 0x317B0085, + 0x1D90, 0x317C0026, + 0x1D90, 0x317D0025, + 0x1D90, 0x317E0024, + 0x1D90, 0x317F0023, 0x90000016, 0x00000000, 0x40000000, 0x00000000, 0x1D90, 0x314001FF, 0x1D90, 0x314101FF, @@ -1065,64 +1455,64 @@ static const u32 rtw8822c_agc[] = { 0x1D90, 0x314301FF, 0x1D90, 0x314401FF, 0x1D90, 0x314501FF, - 0x1D90, 0x314601FF, - 0x1D90, 0x314701FE, - 0x1D90, 0x314801FD, - 0x1D90, 0x314901FC, - 0x1D90, 0x314A01FB, - 0x1D90, 0x314B01FA, - 0x1D90, 0x314C01F9, - 0x1D90, 0x314D01F8, - 0x1D90, 0x314E01F7, - 0x1D90, 0x314F01F6, - 0x1D90, 0x315001F5, - 0x1D90, 0x315101F4, - 0x1D90, 0x315201F3, - 0x1D90, 0x315301F2, - 0x1D90, 0x315401F1, - 0x1D90, 0x315501F0, - 0x1D90, 0x315601EF, - 0x1D90, 0x315701EE, - 0x1D90, 0x315801ED, - 0x1D90, 0x315901EC, - 0x1D90, 0x315A01EB, - 0x1D90, 0x315B01EA, - 0x1D90, 0x315C01E9, - 0x1D90, 0x315D018F, - 0x1D90, 0x315E018E, - 0x1D90, 0x315F018D, - 0x1D90, 0x3160018C, - 0x1D90, 0x3161018B, - 0x1D90, 0x3162018A, - 0x1D90, 0x31630189, - 0x1D90, 0x31640188, - 0x1D90, 0x31650187, - 0x1D90, 0x31660186, - 0x1D90, 0x31670185, - 0x1D90, 0x31680184, - 0x1D90, 0x31690183, - 0x1D90, 0x316A0182, - 0x1D90, 0x316B0149, - 0x1D90, 0x316C0148, - 0x1D90, 0x316D0147, - 0x1D90, 0x316E0146, - 0x1D90, 0x316F0145, - 0x1D90, 0x31700144, - 0x1D90, 0x31710143, - 0x1D90, 0x31720142, - 0x1D90, 0x31730141, - 0x1D90, 0x31740140, - 0x1D90, 0x317500C7, - 0x1D90, 0x317600C6, - 0x1D90, 0x317700C5, - 0x1D90, 0x317800C4, - 0x1D90, 0x317900C3, - 0x1D90, 0x317A0088, - 0x1D90, 0x317B0087, - 0x1D90, 0x317C0086, - 0x1D90, 0x317D0045, - 0x1D90, 0x317E0044, - 0x1D90, 0x317F0043, + 0x1D90, 0x314601FE, + 0x1D90, 0x314701FD, + 0x1D90, 0x314801FC, + 0x1D90, 0x314901FB, + 0x1D90, 0x314A01FA, + 0x1D90, 0x314B01F9, + 0x1D90, 0x314C01F8, + 0x1D90, 0x314D01F7, + 0x1D90, 0x314E01F6, + 0x1D90, 0x314F01F5, + 0x1D90, 0x315001F4, + 0x1D90, 0x315101F3, + 0x1D90, 0x315201F2, + 0x1D90, 0x315301F1, + 0x1D90, 0x315401F0, + 0x1D90, 0x315501EF, + 0x1D90, 0x315601EE, + 0x1D90, 0x315701ED, + 0x1D90, 0x315801EC, + 0x1D90, 0x315901EB, + 0x1D90, 0x315A01EA, + 0x1D90, 0x315B01E9, + 0x1D90, 0x315C01E7, + 0x1D90, 0x315D01E6, + 0x1D90, 0x315E01E5, + 0x1D90, 0x315F01E4, + 0x1D90, 0x316001A8, + 0x1D90, 0x316101A7, + 0x1D90, 0x316201A6, + 0x1D90, 0x316301A5, + 0x1D90, 0x31640185, + 0x1D90, 0x31650184, + 0x1D90, 0x31660183, + 0x1D90, 0x31670182, + 0x1D90, 0x31680149, + 0x1D90, 0x31690148, + 0x1D90, 0x316A0147, + 0x1D90, 0x316B0145, + 0x1D90, 0x316C0144, + 0x1D90, 0x316D0143, + 0x1D90, 0x316E0142, + 0x1D90, 0x316F00E6, + 0x1D90, 0x317000E5, + 0x1D90, 0x317100C9, + 0x1D90, 0x317200C8, + 0x1D90, 0x317300C7, + 0x1D90, 0x317400C6, + 0x1D90, 0x317500C5, + 0x1D90, 0x317600C4, + 0x1D90, 0x317700C3, + 0x1D90, 0x31780088, + 0x1D90, 0x31790087, + 0x1D90, 0x317A0086, + 0x1D90, 0x317B0085, + 0x1D90, 0x317C0026, + 0x1D90, 0x317D0025, + 0x1D90, 0x317E0024, + 0x1D90, 0x317F0023, 0xA0000000, 0x00000000, 0x1D90, 0x314001FF, 0x1D90, 0x314101FF, @@ -1130,66 +1520,131 @@ static const u32 rtw8822c_agc[] = { 0x1D90, 0x314301FF, 0x1D90, 0x314401FF, 0x1D90, 0x314501FF, - 0x1D90, 0x314601FF, - 0x1D90, 0x314701FE, - 0x1D90, 0x314801FD, - 0x1D90, 0x314901FC, - 0x1D90, 0x314A01FB, - 0x1D90, 0x314B01FA, - 0x1D90, 0x314C01F9, - 0x1D90, 0x314D01F8, - 0x1D90, 0x314E01F7, - 0x1D90, 0x314F01F6, - 0x1D90, 0x315001F5, - 0x1D90, 0x315101F4, - 0x1D90, 0x315201F3, - 0x1D90, 0x315301F2, - 0x1D90, 0x315401F1, - 0x1D90, 0x315501F0, - 0x1D90, 0x315601EF, - 0x1D90, 0x315701EE, - 0x1D90, 0x315801ED, - 0x1D90, 0x315901EC, - 0x1D90, 0x315A01EB, - 0x1D90, 0x315B01EA, - 0x1D90, 0x315C01E9, - 0x1D90, 0x315D018F, - 0x1D90, 0x315E018E, - 0x1D90, 0x315F018D, - 0x1D90, 0x3160018C, - 0x1D90, 0x3161018B, - 0x1D90, 0x3162018A, - 0x1D90, 0x31630189, - 0x1D90, 0x31640188, - 0x1D90, 0x31650187, - 0x1D90, 0x31660186, - 0x1D90, 0x31670185, - 0x1D90, 0x31680184, - 0x1D90, 0x31690183, - 0x1D90, 0x316A0182, - 0x1D90, 0x316B0149, - 0x1D90, 0x316C0148, - 0x1D90, 0x316D0147, - 0x1D90, 0x316E0146, - 0x1D90, 0x316F0145, - 0x1D90, 0x31700144, - 0x1D90, 0x31710143, - 0x1D90, 0x31720142, - 0x1D90, 0x31730141, - 0x1D90, 0x31740140, - 0x1D90, 0x317500C7, - 0x1D90, 0x317600C6, - 0x1D90, 0x317700C5, - 0x1D90, 0x317800C4, - 0x1D90, 0x317900C3, - 0x1D90, 0x317A0088, - 0x1D90, 0x317B0087, - 0x1D90, 0x317C0086, - 0x1D90, 0x317D0045, - 0x1D90, 0x317E0044, - 0x1D90, 0x317F0043, + 0x1D90, 0x314601FE, + 0x1D90, 0x314701FD, + 0x1D90, 0x314801FC, + 0x1D90, 0x314901FB, + 0x1D90, 0x314A01FA, + 0x1D90, 0x314B01F9, + 0x1D90, 0x314C01F8, + 0x1D90, 0x314D01F7, + 0x1D90, 0x314E01F6, + 0x1D90, 0x314F01F5, + 0x1D90, 0x315001F4, + 0x1D90, 0x315101F3, + 0x1D90, 0x315201F2, + 0x1D90, 0x315301F1, + 0x1D90, 0x315401F0, + 0x1D90, 0x315501EF, + 0x1D90, 0x315601EE, + 0x1D90, 0x315701ED, + 0x1D90, 0x315801EC, + 0x1D90, 0x315901EB, + 0x1D90, 0x315A01EA, + 0x1D90, 0x315B01E9, + 0x1D90, 0x315C01E7, + 0x1D90, 0x315D01E6, + 0x1D90, 0x315E01E5, + 0x1D90, 0x315F01E4, + 0x1D90, 0x316001A8, + 0x1D90, 0x316101A7, + 0x1D90, 0x316201A6, + 0x1D90, 0x316301A5, + 0x1D90, 0x31640185, + 0x1D90, 0x31650184, + 0x1D90, 0x31660183, + 0x1D90, 0x31670182, + 0x1D90, 0x31680149, + 0x1D90, 0x31690148, + 0x1D90, 0x316A0147, + 0x1D90, 0x316B0145, + 0x1D90, 0x316C0144, + 0x1D90, 0x316D0143, + 0x1D90, 0x316E0142, + 0x1D90, 0x316F00E6, + 0x1D90, 0x317000E5, + 0x1D90, 0x317100C9, + 0x1D90, 0x317200C8, + 0x1D90, 0x317300C7, + 0x1D90, 0x317400C6, + 0x1D90, 0x317500C5, + 0x1D90, 0x317600C4, + 0x1D90, 0x317700C3, + 0x1D90, 0x31780088, + 0x1D90, 0x31790087, + 0x1D90, 0x317A0086, + 0x1D90, 0x317B0085, + 0x1D90, 0x317C0026, + 0x1D90, 0x317D0025, + 0x1D90, 0x317E0024, + 0x1D90, 0x317F0023, 0xB0000000, 0x00000000, - 0x80000015, 0x00000000, 0x40000000, 0x00000000, + 0x83000000, 0x00000000, 0x40000000, 0x00000000, + 0x1D90, 0x318001FE, + 0x1D90, 0x318101FD, + 0x1D90, 0x318201FC, + 0x1D90, 0x318301FB, + 0x1D90, 0x318401FA, + 0x1D90, 0x318501F9, + 0x1D90, 0x318601F8, + 0x1D90, 0x318701F7, + 0x1D90, 0x318801F6, + 0x1D90, 0x318901F5, + 0x1D90, 0x318A01F4, + 0x1D90, 0x318B01F3, + 0x1D90, 0x318C01F2, + 0x1D90, 0x318D01F1, + 0x1D90, 0x318E01F0, + 0x1D90, 0x318F01EF, + 0x1D90, 0x319001EE, + 0x1D90, 0x319101ED, + 0x1D90, 0x319201EC, + 0x1D90, 0x319301EB, + 0x1D90, 0x319401EA, + 0x1D90, 0x319501E9, + 0x1D90, 0x319601E7, + 0x1D90, 0x319701E6, + 0x1D90, 0x319801E5, + 0x1D90, 0x319901E4, + 0x1D90, 0x319A01A8, + 0x1D90, 0x319B01A7, + 0x1D90, 0x319C01A6, + 0x1D90, 0x319D01A5, + 0x1D90, 0x319E0185, + 0x1D90, 0x319F0184, + 0x1D90, 0x31A00183, + 0x1D90, 0x31A10182, + 0x1D90, 0x31A20149, + 0x1D90, 0x31A30148, + 0x1D90, 0x31A40147, + 0x1D90, 0x31A50145, + 0x1D90, 0x31A60144, + 0x1D90, 0x31A70143, + 0x1D90, 0x31A80142, + 0x1D90, 0x31A900E6, + 0x1D90, 0x31AA00E5, + 0x1D90, 0x31AB00C9, + 0x1D90, 0x31AC00C8, + 0x1D90, 0x31AD00C7, + 0x1D90, 0x31AE00C6, + 0x1D90, 0x31AF00C5, + 0x1D90, 0x31B000C4, + 0x1D90, 0x31B100C3, + 0x1D90, 0x31B20088, + 0x1D90, 0x31B30087, + 0x1D90, 0x31B40086, + 0x1D90, 0x31B50085, + 0x1D90, 0x31B60026, + 0x1D90, 0x31B70025, + 0x1D90, 0x31B80024, + 0x1D90, 0x31B90023, + 0x1D90, 0x31BA0022, + 0x1D90, 0x31BB0021, + 0x1D90, 0x31BC0020, + 0x1D90, 0x31BD0003, + 0x1D90, 0x31BE0002, + 0x1D90, 0x31BF0001, + 0x90000015, 0x00000000, 0x40000000, 0x00000000, 0x1D90, 0x318001FE, 0x1D90, 0x318101FD, 0x1D90, 0x318201FC, @@ -1385,7 +1840,10 @@ static const u32 rtw8822c_agc[] = { 0x1D90, 0x31BE0002, 0x1D90, 0x31BF0001, 0xB0000000, 0x00000000, - 0x80000015, 0x00000000, 0x40000000, 0x00000000, + 0x83000000, 0x00000000, 0x40000000, 0x00000000, + 0x1D70, 0x22222222, + 0x1D70, 0x20202020, + 0x90000015, 0x00000000, 0x40000000, 0x00000000, 0x1D70, 0x22222222, 0x1D70, 0x20202020, 0x90000016, 0x00000000, 0x40000000, 0x00000000, @@ -1793,7 +2251,9 @@ static const u32 rtw8822c_bb[] = { 0x1828, 0x000004FD, 0x182C, 0x00000000, 0x1834, 0x00000000, - 0x83000015, 0x00000000, 0x40000000, 0x00000000, + 0x83000000, 0x00000000, 0x40000000, 0x00000000, + 0x1838, 0x20000000, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x1838, 0x20100000, 0x93000016, 0x00000000, 0x40000000, 0x00000000, 0x1838, 0x20100000, @@ -1801,11 +2261,17 @@ static const u32 rtw8822c_bb[] = { 0x1838, 0x20100000, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x1838, 0x20100000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x1838, 0x20100000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x1838, 0x20100000, 0xA0000000, 0x00000000, 0x1838, 0x20000000, 0xB0000000, 0x00000000, 0x183C, 0x00000000, - 0x83000015, 0x00000000, 0x40000000, 0x00000000, + 0x83000000, 0x00000000, 0x40000000, 0x00000000, + 0x1840, 0x00000000, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x1840, 0x00002300, 0x93000016, 0x00000000, 0x40000000, 0x00000000, 0x1840, 0x00002300, @@ -1813,6 +2279,10 @@ static const u32 rtw8822c_bb[] = { 0x1840, 0x00002300, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x1840, 0x00002300, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x1840, 0x00002300, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x1840, 0x00002300, 0xA0000000, 0x00000000, 0x1840, 0x00000000, 0xB0000000, 0x00000000, @@ -1826,7 +2296,9 @@ static const u32 rtw8822c_bb[] = { 0x1860, 0xF0040FF8, 0x1864, 0x7F000000, 0x1868, 0x00000000, - 0x83000015, 0x00000000, 0x40000000, 0x00000000, + 0x83000000, 0x00000000, 0x40000000, 0x00000000, + 0x186C, 0x0000FF00, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x186C, 0x0000FF02, 0x93000016, 0x00000000, 0x40000000, 0x00000000, 0x186C, 0x0000FF02, @@ -1834,6 +2306,10 @@ static const u32 rtw8822c_bb[] = { 0x186C, 0x0000FF02, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x186C, 0x0000FF02, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x186C, 0x0000FF02, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x186C, 0x0000FF02, 0xA0000000, 0x00000000, 0x186C, 0x0000FF00, 0xB0000000, 0x00000000, @@ -1842,7 +2318,9 @@ static const u32 rtw8822c_bb[] = { 0x1878, 0x00000000, 0x187C, 0x00000000, 0x1880, 0x00000000, - 0x83000015, 0x00000000, 0x40000000, 0x00000000, + 0x83000000, 0x00000000, 0x40000000, 0x00000000, + 0x1884, 0x02B00000, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x1884, 0x03B00000, 0x93000016, 0x00000000, 0x40000000, 0x00000000, 0x1884, 0x03B00000, @@ -1850,6 +2328,10 @@ static const u32 rtw8822c_bb[] = { 0x1884, 0x03B00000, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x1884, 0x03B00000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x1884, 0x03B00000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x1884, 0x03B00000, 0xA0000000, 0x00000000, 0x1884, 0x02B00000, 0xB0000000, 0x00000000, @@ -1982,7 +2464,10 @@ static const u32 rtw8822c_bb[] = { 0x1C84, 0x245120D4, 0x1C88, 0xC8400483, 0x1C8C, 0x40005A20, - 0x83000015, 0x00000000, 0x40000000, 0x00000000, + 0x83000000, 0x00000000, 0x40000000, 0x00000000, + 0x1C94, 0x00000000, + 0x1C98, 0x00000000, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x1C94, 0x00000B0E, 0x1C98, 0x00450000, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -1994,6 +2479,12 @@ static const u32 rtw8822c_bb[] = { 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x1C94, 0x00000B0E, 0x1C98, 0x00450000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x1C94, 0x00000B0E, + 0x1C98, 0x00450000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x1C94, 0x00000B0E, + 0x1C98, 0x00450000, 0xA0000000, 0x00000000, 0x1C94, 0x00000000, 0x1C98, 0x00000000, @@ -2330,7 +2821,9 @@ static const u32 rtw8822c_bb[] = { 0x4128, 0x000004FD, 0x412C, 0x00000000, 0x4134, 0x00000000, - 0x83000015, 0x00000000, 0x40000000, 0x00000000, + 0x83000000, 0x00000000, 0x40000000, 0x00000000, + 0x4138, 0x20000000, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x4138, 0x20100000, 0x93000016, 0x00000000, 0x40000000, 0x00000000, 0x4138, 0x20100000, @@ -2338,12 +2831,18 @@ static const u32 rtw8822c_bb[] = { 0x4138, 0x20100000, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x4138, 0x20100000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x4138, 0x20100000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x4138, 0x20100000, 0xA0000000, 0x00000000, 0x4138, 0x20000000, 0xB0000000, 0x00000000, 0x413C, 0x00000000, 0x4140, 0x00000000, - 0x83000015, 0x00000000, 0x40000000, 0x00000000, + 0x83000000, 0x00000000, 0x40000000, 0x00000000, + 0x4144, 0x00000000, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x4144, 0x00002030, 0x93000016, 0x00000000, 0x40000000, 0x00000000, 0x4144, 0x00002030, @@ -2351,6 +2850,10 @@ static const u32 rtw8822c_bb[] = { 0x4144, 0x00002030, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x4144, 0x00002030, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x4144, 0x00002030, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x4144, 0x00002030, 0xA0000000, 0x00000000, 0x4144, 0x00000000, 0xB0000000, 0x00000000, @@ -2363,7 +2866,9 @@ static const u32 rtw8822c_bb[] = { 0x4160, 0xF0040FF8, 0x4164, 0x7F000000, 0x4168, 0x00000000, - 0x83000015, 0x00000000, 0x40000000, 0x00000000, + 0x83000000, 0x00000000, 0x40000000, 0x00000000, + 0x416C, 0x00008000, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x416C, 0x00008002, 0x93000016, 0x00000000, 0x40000000, 0x00000000, 0x416C, 0x00008002, @@ -2371,6 +2876,10 @@ static const u32 rtw8822c_bb[] = { 0x416C, 0x00008002, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x416C, 0x00008002, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x416C, 0x00008002, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x416C, 0x00008002, 0xA0000000, 0x00000000, 0x416C, 0x00008000, 0xB0000000, 0x00000000, @@ -2379,7 +2888,9 @@ static const u32 rtw8822c_bb[] = { 0x4178, 0x00000000, 0x417C, 0x00000000, 0x4180, 0x00000000, - 0x83000015, 0x00000000, 0x40000000, 0x00000000, + 0x83000000, 0x00000000, 0x40000000, 0x00000000, + 0x4184, 0x02B00000, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x4184, 0x03B00000, 0x93000016, 0x00000000, 0x40000000, 0x00000000, 0x4184, 0x03B00000, @@ -2387,6 +2898,10 @@ static const u32 rtw8822c_bb[] = { 0x4184, 0x03B00000, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x4184, 0x03B00000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x4184, 0x03B00000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x4184, 0x03B00000, 0xA0000000, 0x00000000, 0x4184, 0x02B00000, 0xB0000000, 0x00000000, @@ -2843,7 +3358,11 @@ static const u32 rtw8822c_rf_a[] = { 0x018, 0x00013124, 0x093, 0x0008483F, 0x0DE, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x08E, 0x000B9140, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x08E, 0x000B9140, @@ -2861,6 +3380,8 @@ static const u32 rtw8822c_rf_a[] = { 0x08E, 0x000A5540, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x08E, 0x000A5540, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x08E, 0x000A5540, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -2875,17 +3396,39 @@ static const u32 rtw8822c_rf_a[] = { 0x08E, 0x000A5540, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x08E, 0x000A5540, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x08E, 0x000A5540, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x08E, 0x000A5540, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, 0xA0000000, 0x00000000, 0x08E, 0x000A5540, 0xB0000000, 0x00000000, 0x081, 0x0000FC01, 0x081, 0x0002FC01, 0x081, 0x0003FC01, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x085, 0x0006A06C, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x085, 0x0006A06C, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x085, 0x0006A06C, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x085, 0x0006A06C, @@ -2903,6 +3446,8 @@ static const u32 rtw8822c_rf_a[] = { 0x085, 0x0006A06C, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x085, 0x0006A06C, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x085, 0x0006A06C, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x085, 0x0006A06C, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -2917,14 +3462,50 @@ static const u32 rtw8822c_rf_a[] = { 0x085, 0x0006A06C, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x085, 0x0006A06C, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x085, 0x0006A06C, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x085, 0x0006A06C, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x085, 0x0006A06C, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x085, 0x0006A06C, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x085, 0x0006A06C, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x085, 0x0006A06C, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x085, 0x0006A06C, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x085, 0x0006A06C, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x085, 0x0006A06C, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x085, 0x0006A06C, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x085, 0x0006A06C, 0xA0000000, 0x00000000, 0x085, 0x0006A06C, 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000003F, + 0x033, 0x00000001, + 0x03F, 0x0000003F, + 0x033, 0x00000002, + 0x03F, 0x0000003F, + 0x0EE, 0x00000000, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000003F, + 0x033, 0x00000001, + 0x03F, 0x0000003F, + 0x033, 0x00000002, + 0x03F, 0x0000003F, + 0x0EE, 0x00000000, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x0EE, 0x00000010, 0x033, 0x00000001, 0x03F, 0x0000002A, @@ -3005,6 +3586,15 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x00000002, 0x03F, 0x0000002A, 0x0EE, 0x00000000, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x0EE, 0x00000010, 0x033, 0x00000001, @@ -3068,6 +3658,15 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x00000002, 0x03F, 0x0000002A, 0x0EE, 0x00000000, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x0EE, 0x00000010, 0x033, 0x00000001, @@ -3086,6 +3685,78 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x00000002, 0x03F, 0x0000002A, 0x0EE, 0x00000000, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, 0xA0000000, 0x00000000, 0x0EE, 0x00000010, 0x033, 0x00000001, @@ -3096,7 +3767,59 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x0000003F, 0x0EE, 0x00000000, 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773E8, + 0x033, 0x0000000E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000D, + 0x03F, 0x00000380, + 0x033, 0x0000000C, + 0x03F, 0x000FF380, + 0x033, 0x0000000B, + 0x03F, 0x00000300, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773E8, + 0x033, 0x0000000E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000D, + 0x03F, 0x00000380, + 0x033, 0x0000000C, + 0x03F, 0x000FF380, + 0x033, 0x0000000B, + 0x03F, 0x00000300, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00010000, 0x033, 0x0000000F, 0x03F, 0x000773C0, @@ -3330,6 +4053,32 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000004, 0x03F, 0x00000040, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00010000, 0x033, 0x0000000F, @@ -3512,6 +4261,32 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000004, 0x03F, 0x00000040, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00010000, 0x033, 0x0000000F, @@ -3564,6 +4339,214 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000004, 0x03F, 0x00000040, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x00000287, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000207, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x00000287, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000207, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x00000287, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000207, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x00000287, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000207, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, 0xA0000000, 0x00000000, 0x0EF, 0x00010000, 0x033, 0x0000000F, @@ -3593,7 +4576,57 @@ static const u32 rtw8822c_rf_a[] = { 0xB0000000, 0x00000000, 0x033, 0x00000003, 0x03F, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773E8, + 0x033, 0x0000001E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001D, + 0x03F, 0x00000380, + 0x033, 0x0000001C, + 0x03F, 0x000FF380, + 0x033, 0x0000001B, + 0x03F, 0x00000300, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773E8, + 0x033, 0x0000001E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001D, + 0x03F, 0x00000380, + 0x033, 0x0000001C, + 0x03F, 0x000FF380, + 0x033, 0x0000001B, + 0x03F, 0x00000300, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000001F, 0x03F, 0x000773C0, 0x033, 0x0000001E, @@ -3818,6 +4851,31 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000014, 0x03F, 0x00000040, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000001F, 0x03F, 0x000773C0, @@ -3993,6 +5051,31 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000014, 0x03F, 0x00000040, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000001F, 0x03F, 0x000773C0, @@ -4043,6 +5126,206 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000014, 0x03F, 0x00000040, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x00000287, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000207, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x00000287, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000207, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x00000287, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000207, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x00000287, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000207, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, 0xA0000000, 0x00000000, 0x033, 0x0000001F, 0x03F, 0x000773E8, @@ -4071,17 +5354,17 @@ static const u32 rtw8822c_rf_a[] = { 0xB0000000, 0x00000000, 0x033, 0x00000013, 0x03F, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000002F, - 0x03F, 0x000773C0, + 0x03F, 0x000773E8, 0x033, 0x0000002E, - 0x03F, 0x000FF3C0, + 0x03F, 0x000FF3A0, 0x033, 0x0000002D, - 0x03F, 0x000773E8, + 0x03F, 0x00000380, 0x033, 0x0000002C, - 0x03F, 0x000FF3E8, + 0x03F, 0x000FF380, 0x033, 0x0000002B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000300, 0x033, 0x0000002A, 0x03F, 0x000002A8, 0x033, 0x00000029, @@ -4096,17 +5379,17 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000024, 0x03F, 0x00000040, - 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000002F, - 0x03F, 0x000773C0, + 0x03F, 0x000773E8, 0x033, 0x0000002E, - 0x03F, 0x000FF3C0, + 0x03F, 0x000FF3A0, 0x033, 0x0000002D, - 0x03F, 0x000773E8, + 0x03F, 0x00000380, 0x033, 0x0000002C, - 0x03F, 0x000FF3E8, + 0x03F, 0x000FF380, 0x033, 0x0000002B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000300, 0x033, 0x0000002A, 0x03F, 0x000002A8, 0x033, 0x00000029, @@ -4121,7 +5404,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000024, 0x03F, 0x00000040, - 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000002F, 0x03F, 0x000773C0, 0x033, 0x0000002E, @@ -4146,7 +5429,57 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000024, 0x03F, 0x00000040, - 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000002F, 0x03F, 0x000773C0, 0x033, 0x0000002E, @@ -4296,6 +5629,31 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000024, 0x03F, 0x00000040, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000002F, 0x03F, 0x000773C0, @@ -4471,6 +5829,31 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000024, 0x03F, 0x00000040, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000002F, 0x03F, 0x000773C0, @@ -4521,6 +5904,206 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000024, 0x03F, 0x00000040, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x00000287, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000207, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x00000287, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000207, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x00000287, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000207, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x00000287, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000207, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, 0xA0000000, 0x00000000, 0x033, 0x0000002F, 0x03F, 0x000773E8, @@ -4549,17 +6132,17 @@ static const u32 rtw8822c_rf_a[] = { 0xB0000000, 0x00000000, 0x033, 0x00000023, 0x03F, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, - 0x03F, 0x000773C0, + 0x03F, 0x000773E8, 0x033, 0x0000003E, - 0x03F, 0x000FF3C0, + 0x03F, 0x000FF3A0, 0x033, 0x0000003D, - 0x03F, 0x000773E8, + 0x03F, 0x00000380, 0x033, 0x0000003C, - 0x03F, 0x000FF3E8, + 0x03F, 0x000FF380, 0x033, 0x0000003B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000300, 0x033, 0x0000003A, 0x03F, 0x000002A8, 0x033, 0x00000039, @@ -4574,17 +6157,17 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, - 0x03F, 0x000773C0, + 0x03F, 0x000773E8, 0x033, 0x0000003E, - 0x03F, 0x000FF3C0, + 0x03F, 0x000FF3A0, 0x033, 0x0000003D, - 0x03F, 0x000773E8, + 0x03F, 0x00000380, 0x033, 0x0000003C, - 0x03F, 0x000FF3E8, + 0x03F, 0x000FF380, 0x033, 0x0000003B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000300, 0x033, 0x0000003A, 0x03F, 0x000002A8, 0x033, 0x00000039, @@ -4599,7 +6182,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -4624,7 +6207,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -4649,7 +6232,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -4674,7 +6257,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -4699,7 +6282,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -4709,11 +6292,11 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x0000003C, 0x03F, 0x000FF3E8, 0x033, 0x0000003B, - 0x03F, 0x00000287, + 0x03F, 0x000FF3A0, 0x033, 0x0000003A, 0x03F, 0x000002A8, 0x033, 0x00000039, - 0x03F, 0x00000207, + 0x03F, 0x00000280, 0x033, 0x00000038, 0x03F, 0x000FF280, 0x033, 0x00000037, @@ -4724,7 +6307,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x93000002, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -4734,11 +6317,11 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x0000003C, 0x03F, 0x000FF3E8, 0x033, 0x0000003B, - 0x03F, 0x00000287, + 0x03F, 0x000FF3A0, 0x033, 0x0000003A, 0x03F, 0x000002A8, 0x033, 0x00000039, - 0x03F, 0x00000207, + 0x03F, 0x00000280, 0x033, 0x00000038, 0x03F, 0x000FF280, 0x033, 0x00000037, @@ -4749,7 +6332,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x93000003, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -4759,11 +6342,11 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x0000003C, 0x03F, 0x000FF3E8, 0x033, 0x0000003B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000287, 0x033, 0x0000003A, 0x03F, 0x000002A8, 0x033, 0x00000039, - 0x03F, 0x00000280, + 0x03F, 0x00000207, 0x033, 0x00000038, 0x03F, 0x000FF280, 0x033, 0x00000037, @@ -4774,7 +6357,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x93000004, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -4799,7 +6382,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -4809,11 +6392,11 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x0000003C, 0x03F, 0x000FF3E8, 0x033, 0x0000003B, - 0x03F, 0x00000287, + 0x03F, 0x000FF3A0, 0x033, 0x0000003A, 0x03F, 0x000002A8, 0x033, 0x00000039, - 0x03F, 0x00000207, + 0x03F, 0x00000280, 0x033, 0x00000038, 0x03F, 0x000FF280, 0x033, 0x00000037, @@ -4824,7 +6407,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -4849,7 +6432,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -4859,11 +6442,11 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x0000003C, 0x03F, 0x000FF3E8, 0x033, 0x0000003B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000287, 0x033, 0x0000003A, 0x03F, 0x000002A8, 0x033, 0x00000039, - 0x03F, 0x00000280, + 0x03F, 0x00000207, 0x033, 0x00000038, 0x03F, 0x000FF280, 0x033, 0x00000037, @@ -4874,7 +6457,82 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, + 0x03F, 0x000773E8, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x00000287, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000207, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, + 0x03F, 0x000773E8, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000280, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, + 0x03F, 0x000773E8, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000280, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, + 0x94000003, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -4949,6 +6607,31 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, + 0x03F, 0x000773E8, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000280, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, @@ -4999,6 +6682,206 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, + 0x03F, 0x000773E8, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000280, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, + 0x03F, 0x000773E8, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000280, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, + 0x03F, 0x000773E8, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x00000287, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000207, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, + 0x03F, 0x000773E8, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x00000287, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000207, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, + 0x03F, 0x000773E8, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000280, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, + 0x03F, 0x000773E8, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000280, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, + 0x03F, 0x000773E8, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x00000287, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000207, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, + 0x03F, 0x000773E8, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x00000287, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000207, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, 0xA0000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773E8, @@ -5027,7 +6910,57 @@ static const u32 rtw8822c_rf_a[] = { 0xB0000000, 0x00000000, 0x033, 0x00000033, 0x03F, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, + 0x03F, 0x000773E8, + 0x033, 0x0000004E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000004D, + 0x03F, 0x00000380, + 0x033, 0x0000004C, + 0x03F, 0x000FF380, + 0x033, 0x0000004B, + 0x03F, 0x00000300, + 0x033, 0x0000004A, + 0x03F, 0x000002A8, + 0x033, 0x00000049, + 0x03F, 0x00000280, + 0x033, 0x00000048, + 0x03F, 0x000FF280, + 0x033, 0x00000047, + 0x03F, 0x00000200, + 0x033, 0x00000046, + 0x03F, 0x000001C0, + 0x033, 0x00000045, + 0x03F, 0x00000180, + 0x033, 0x00000044, + 0x03F, 0x00000040, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, + 0x03F, 0x000773E8, + 0x033, 0x0000004E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000004D, + 0x03F, 0x00000380, + 0x033, 0x0000004C, + 0x03F, 0x000FF380, + 0x033, 0x0000004B, + 0x03F, 0x00000300, + 0x033, 0x0000004A, + 0x03F, 0x000002A8, + 0x033, 0x00000049, + 0x03F, 0x00000280, + 0x033, 0x00000048, + 0x03F, 0x000FF280, + 0x033, 0x00000047, + 0x03F, 0x00000200, + 0x033, 0x00000046, + 0x03F, 0x000001C0, + 0x033, 0x00000045, + 0x03F, 0x00000180, + 0x033, 0x00000044, + 0x03F, 0x00000040, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, 0x033, 0x0000004E, @@ -5252,6 +7185,31 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, + 0x03F, 0x000773C0, + 0x033, 0x0000004E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000004D, + 0x03F, 0x000773E8, + 0x033, 0x0000004C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000004B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000004A, + 0x03F, 0x000002A8, + 0x033, 0x00000049, + 0x03F, 0x00000280, + 0x033, 0x00000048, + 0x03F, 0x000FF280, + 0x033, 0x00000047, + 0x03F, 0x00000200, + 0x033, 0x00000046, + 0x03F, 0x000001C0, + 0x033, 0x00000045, + 0x03F, 0x00000180, + 0x033, 0x00000044, + 0x03F, 0x00000040, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, @@ -5427,7 +7385,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, 0x033, 0x0000004E, @@ -5437,11 +7395,11 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x0000004C, 0x03F, 0x000FF3E8, 0x033, 0x0000004B, - 0x03F, 0x00000287, + 0x03F, 0x000FF3A0, 0x033, 0x0000004A, 0x03F, 0x000002A8, 0x033, 0x00000049, - 0x03F, 0x00000207, + 0x03F, 0x00000280, 0x033, 0x00000048, 0x03F, 0x000FF280, 0x033, 0x00000047, @@ -5452,7 +7410,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, 0x033, 0x0000004E, @@ -5477,21 +7435,21 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, - 0xA0000000, 0x00000000, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, - 0x03F, 0x000773E8, + 0x03F, 0x000773C0, 0x033, 0x0000004E, - 0x03F, 0x000FF3A0, + 0x03F, 0x000FF3C0, 0x033, 0x0000004D, - 0x03F, 0x00000380, + 0x03F, 0x000773E8, 0x033, 0x0000004C, - 0x03F, 0x000FF380, + 0x03F, 0x000FF3E8, 0x033, 0x0000004B, - 0x03F, 0x00000300, + 0x03F, 0x00000287, 0x033, 0x0000004A, 0x03F, 0x000002A8, 0x033, 0x00000049, - 0x03F, 0x00000280, + 0x03F, 0x00000207, 0x033, 0x00000048, 0x03F, 0x000FF280, 0x033, 0x00000047, @@ -5502,127 +7460,402 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, - 0xB0000000, 0x00000000, - 0x033, 0x00000043, - 0x03F, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000005F, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, 0x03F, 0x000773C0, - 0x033, 0x0000005E, + 0x033, 0x0000004E, 0x03F, 0x000FF3C0, - 0x033, 0x0000005D, + 0x033, 0x0000004D, 0x03F, 0x000773E8, - 0x033, 0x0000005C, + 0x033, 0x0000004C, 0x03F, 0x000FF3E8, - 0x033, 0x0000005B, + 0x033, 0x0000004B, 0x03F, 0x000FF3A0, - 0x033, 0x0000005A, + 0x033, 0x0000004A, 0x03F, 0x000002A8, - 0x033, 0x00000059, + 0x033, 0x00000049, 0x03F, 0x00000280, - 0x033, 0x00000058, + 0x033, 0x00000048, 0x03F, 0x000FF280, - 0x033, 0x00000057, + 0x033, 0x00000047, 0x03F, 0x00000200, - 0x033, 0x00000056, + 0x033, 0x00000046, 0x03F, 0x000001C0, - 0x033, 0x00000055, + 0x033, 0x00000045, 0x03F, 0x00000180, - 0x033, 0x00000054, + 0x033, 0x00000044, 0x03F, 0x00000040, - 0x91000002, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000005F, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, 0x03F, 0x000773C0, - 0x033, 0x0000005E, + 0x033, 0x0000004E, 0x03F, 0x000FF3C0, - 0x033, 0x0000005D, + 0x033, 0x0000004D, 0x03F, 0x000773E8, - 0x033, 0x0000005C, + 0x033, 0x0000004C, 0x03F, 0x000FF3E8, - 0x033, 0x0000005B, + 0x033, 0x0000004B, 0x03F, 0x000FF3A0, - 0x033, 0x0000005A, + 0x033, 0x0000004A, 0x03F, 0x000002A8, - 0x033, 0x00000059, + 0x033, 0x00000049, 0x03F, 0x00000280, - 0x033, 0x00000058, + 0x033, 0x00000048, 0x03F, 0x000FF280, - 0x033, 0x00000057, + 0x033, 0x00000047, 0x03F, 0x00000200, - 0x033, 0x00000056, + 0x033, 0x00000046, 0x03F, 0x000001C0, - 0x033, 0x00000055, + 0x033, 0x00000045, 0x03F, 0x00000180, - 0x033, 0x00000054, + 0x033, 0x00000044, 0x03F, 0x00000040, - 0x92000001, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000005F, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, 0x03F, 0x000773C0, - 0x033, 0x0000005E, + 0x033, 0x0000004E, 0x03F, 0x000FF3C0, - 0x033, 0x0000005D, + 0x033, 0x0000004D, 0x03F, 0x000773E8, - 0x033, 0x0000005C, + 0x033, 0x0000004C, 0x03F, 0x000FF3E8, - 0x033, 0x0000005B, - 0x03F, 0x000FF3A0, - 0x033, 0x0000005A, + 0x033, 0x0000004B, + 0x03F, 0x00000287, + 0x033, 0x0000004A, 0x03F, 0x000002A8, - 0x033, 0x00000059, - 0x03F, 0x00000280, - 0x033, 0x00000058, + 0x033, 0x00000049, + 0x03F, 0x00000207, + 0x033, 0x00000048, 0x03F, 0x000FF280, - 0x033, 0x00000057, + 0x033, 0x00000047, 0x03F, 0x00000200, - 0x033, 0x00000056, + 0x033, 0x00000046, 0x03F, 0x000001C0, - 0x033, 0x00000055, + 0x033, 0x00000045, 0x03F, 0x00000180, - 0x033, 0x00000054, + 0x033, 0x00000044, 0x03F, 0x00000040, - 0x92000002, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000005F, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, 0x03F, 0x000773C0, - 0x033, 0x0000005E, + 0x033, 0x0000004E, 0x03F, 0x000FF3C0, - 0x033, 0x0000005D, + 0x033, 0x0000004D, 0x03F, 0x000773E8, - 0x033, 0x0000005C, + 0x033, 0x0000004C, 0x03F, 0x000FF3E8, - 0x033, 0x0000005B, - 0x03F, 0x000FF3A0, - 0x033, 0x0000005A, + 0x033, 0x0000004B, + 0x03F, 0x00000287, + 0x033, 0x0000004A, 0x03F, 0x000002A8, - 0x033, 0x00000059, - 0x03F, 0x00000280, - 0x033, 0x00000058, + 0x033, 0x00000049, + 0x03F, 0x00000207, + 0x033, 0x00000048, 0x03F, 0x000FF280, - 0x033, 0x00000057, + 0x033, 0x00000047, 0x03F, 0x00000200, - 0x033, 0x00000056, + 0x033, 0x00000046, 0x03F, 0x000001C0, - 0x033, 0x00000055, + 0x033, 0x00000045, 0x03F, 0x00000180, - 0x033, 0x00000054, + 0x033, 0x00000044, 0x03F, 0x00000040, - 0x93000001, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000005F, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, 0x03F, 0x000773C0, - 0x033, 0x0000005E, + 0x033, 0x0000004E, 0x03F, 0x000FF3C0, - 0x033, 0x0000005D, + 0x033, 0x0000004D, 0x03F, 0x000773E8, - 0x033, 0x0000005C, + 0x033, 0x0000004C, 0x03F, 0x000FF3E8, - 0x033, 0x0000005B, + 0x033, 0x0000004B, 0x03F, 0x000FF3A0, - 0x033, 0x0000005A, + 0x033, 0x0000004A, 0x03F, 0x000002A8, - 0x033, 0x00000059, + 0x033, 0x00000049, 0x03F, 0x00000280, - 0x033, 0x00000058, + 0x033, 0x00000048, 0x03F, 0x000FF280, - 0x033, 0x00000057, + 0x033, 0x00000047, + 0x03F, 0x00000200, + 0x033, 0x00000046, + 0x03F, 0x000001C0, + 0x033, 0x00000045, + 0x03F, 0x00000180, + 0x033, 0x00000044, + 0x03F, 0x00000040, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, + 0x03F, 0x000773C0, + 0x033, 0x0000004E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000004D, + 0x03F, 0x000773E8, + 0x033, 0x0000004C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000004B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000004A, + 0x03F, 0x000002A8, + 0x033, 0x00000049, + 0x03F, 0x00000280, + 0x033, 0x00000048, + 0x03F, 0x000FF280, + 0x033, 0x00000047, + 0x03F, 0x00000200, + 0x033, 0x00000046, + 0x03F, 0x000001C0, + 0x033, 0x00000045, + 0x03F, 0x00000180, + 0x033, 0x00000044, + 0x03F, 0x00000040, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, + 0x03F, 0x000773C0, + 0x033, 0x0000004E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000004D, + 0x03F, 0x000773E8, + 0x033, 0x0000004C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000004B, + 0x03F, 0x00000287, + 0x033, 0x0000004A, + 0x03F, 0x000002A8, + 0x033, 0x00000049, + 0x03F, 0x00000207, + 0x033, 0x00000048, + 0x03F, 0x000FF280, + 0x033, 0x00000047, + 0x03F, 0x00000200, + 0x033, 0x00000046, + 0x03F, 0x000001C0, + 0x033, 0x00000045, + 0x03F, 0x00000180, + 0x033, 0x00000044, + 0x03F, 0x00000040, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, + 0x03F, 0x000773C0, + 0x033, 0x0000004E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000004D, + 0x03F, 0x000773E8, + 0x033, 0x0000004C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000004B, + 0x03F, 0x00000287, + 0x033, 0x0000004A, + 0x03F, 0x000002A8, + 0x033, 0x00000049, + 0x03F, 0x00000207, + 0x033, 0x00000048, + 0x03F, 0x000FF280, + 0x033, 0x00000047, + 0x03F, 0x00000200, + 0x033, 0x00000046, + 0x03F, 0x000001C0, + 0x033, 0x00000045, + 0x03F, 0x00000180, + 0x033, 0x00000044, + 0x03F, 0x00000040, + 0xA0000000, 0x00000000, + 0x033, 0x0000004F, + 0x03F, 0x000773E8, + 0x033, 0x0000004E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000004D, + 0x03F, 0x00000380, + 0x033, 0x0000004C, + 0x03F, 0x000FF380, + 0x033, 0x0000004B, + 0x03F, 0x00000300, + 0x033, 0x0000004A, + 0x03F, 0x000002A8, + 0x033, 0x00000049, + 0x03F, 0x00000280, + 0x033, 0x00000048, + 0x03F, 0x000FF280, + 0x033, 0x00000047, + 0x03F, 0x00000200, + 0x033, 0x00000046, + 0x03F, 0x000001C0, + 0x033, 0x00000045, + 0x03F, 0x00000180, + 0x033, 0x00000044, + 0x03F, 0x00000040, + 0xB0000000, 0x00000000, + 0x033, 0x00000043, + 0x03F, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773E8, + 0x033, 0x0000005E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005D, + 0x03F, 0x00000380, + 0x033, 0x0000005C, + 0x03F, 0x000FF380, + 0x033, 0x0000005B, + 0x03F, 0x00000300, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773E8, + 0x033, 0x0000005E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005D, + 0x03F, 0x00000380, + 0x033, 0x0000005C, + 0x03F, 0x000FF380, + 0x033, 0x0000005B, + 0x03F, 0x00000300, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, 0x03F, 0x00000200, 0x033, 0x00000056, 0x03F, 0x000001C0, @@ -5730,6 +7963,31 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, @@ -5905,6 +8163,31 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, @@ -5955,17 +8238,117 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0xA0000000, 0x00000000, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, 0x03F, 0x000FF3A0, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, 0x033, 0x0000005D, - 0x03F, 0x00000380, + 0x03F, 0x000773E8, 0x033, 0x0000005C, - 0x03F, 0x000FF380, + 0x03F, 0x000FF3E8, 0x033, 0x0000005B, - 0x03F, 0x00000300, + 0x03F, 0x00000287, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000207, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x00000287, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000207, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x000FF3A0, 0x033, 0x0000005A, 0x03F, 0x000002A8, 0x033, 0x00000059, @@ -5980,96 +8363,220 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0xB0000000, 0x00000000, - 0x033, 0x00000053, - 0x03F, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00000000, - 0x91000002, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00000000, - 0x92000001, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00000000, - 0x92000002, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00000000, - 0x93000001, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00000000, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00000000, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00000000, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00000000, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00000000, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00000000, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00000000, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00000000, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00000000, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00000000, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00000000, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00000000, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00000000, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00000000, - 0xA0000000, 0x00000000, - 0x0EF, 0x00000000, - 0xB0000000, 0x00000000, - 0x08A, 0x000E7DE3, - 0x08B, 0x0008FE00, - 0x0EE, 0x00000008, - 0x033, 0x00000000, - 0x03F, 0x00000023, - 0x033, 0x00000001, - 0x03F, 0x00000023, - 0x0EE, 0x00000000, - 0x0EF, 0x00004000, - 0x033, 0x00000000, - 0x03F, 0x0000000F, - 0x033, 0x00000002, - 0x03F, 0x00000000, - 0x0EF, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00020000, - 0x033, 0x00000000, - 0x03E, 0x00001C86, - 0x03F, 0x00020000, - 0x033, 0x00000001, - 0x03E, 0x00001C02, - 0x03F, 0x00020000, - 0x033, 0x00000002, - 0x03E, 0x00000F02, - 0x03F, 0x00020000, - 0x033, 0x00000003, - 0x03E, 0x00000F00, - 0x03F, 0x00020000, - 0x033, 0x00000004, - 0x03E, 0x00000086, - 0x03F, 0x00020000, - 0x033, 0x00000005, - 0x03E, 0x00000002, - 0x03F, 0x00020000, - 0x033, 0x00000006, - 0x03E, 0x00000000, - 0x03F, 0x00020000, - 0x033, 0x00000007, - 0x03E, 0x00000000, - 0x03F, 0x0002F81C, - 0x033, 0x00000008, - 0x03E, 0x00000000, - 0x03F, 0x0002F81C, - 0x033, 0x00000009, - 0x03E, 0x00001C02, - 0x03F, 0x00020000, - 0x033, 0x0000000A, - 0x03E, 0x00000F02, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x00000287, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000207, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x00000287, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000207, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0xA0000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773E8, + 0x033, 0x0000005E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005D, + 0x03F, 0x00000380, + 0x033, 0x0000005C, + 0x03F, 0x000FF380, + 0x033, 0x0000005B, + 0x03F, 0x00000300, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0xB0000000, 0x00000000, + 0x033, 0x00000053, + 0x03F, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0xA0000000, 0x00000000, + 0x0EF, 0x00000000, + 0xB0000000, 0x00000000, + 0x08A, 0x000E7DE3, + 0x08B, 0x0008FE00, + 0x0EE, 0x00000008, + 0x033, 0x00000000, + 0x03F, 0x00000023, + 0x033, 0x00000001, + 0x03F, 0x00000023, + 0x0EE, 0x00000000, + 0x0EF, 0x00004000, + 0x033, 0x00000000, + 0x03F, 0x0000000F, + 0x033, 0x00000002, + 0x03F, 0x00000000, + 0x0EF, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00020000, + 0x033, 0x00000000, + 0x03E, 0x00001910, + 0x03F, 0x00020000, + 0x033, 0x00000001, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000002, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000003, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000004, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000005, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000006, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000007, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000008, + 0x03E, 0x00001910, + 0x03F, 0x00020000, + 0x033, 0x00000009, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000000A, + 0x03E, 0x00000F02, 0x03F, 0x00020000, 0x033, 0x0000000B, 0x03E, 0x00000F00, @@ -6085,9 +8592,9 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00020000, 0x033, 0x0000000F, 0x03E, 0x00000000, - 0x03F, 0x0002F81C, + 0x03F, 0x0002C010, 0x033, 0x00000010, - 0x03E, 0x00001C86, + 0x03E, 0x00001910, 0x03F, 0x00020000, 0x033, 0x00000011, 0x03E, 0x00001C02, @@ -6111,7 +8618,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x033, 0x00000018, - 0x03E, 0x00001C86, + 0x03E, 0x00001910, 0x03F, 0x00020000, 0x033, 0x00000019, 0x03E, 0x00001C02, @@ -6135,7 +8642,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x033, 0x00000020, - 0x03E, 0x00001C86, + 0x03E, 0x00001910, 0x03F, 0x00020000, 0x033, 0x00000021, 0x03E, 0x00001C02, @@ -6159,7 +8666,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x033, 0x00000028, - 0x03E, 0x00001C86, + 0x03E, 0x00001910, 0x03F, 0x00020000, 0x033, 0x00000029, 0x03E, 0x00001C02, @@ -6183,10 +8690,10 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, - 0x03E, 0x00001C86, + 0x03E, 0x00001910, 0x03F, 0x00020000, 0x033, 0x00000001, 0x03E, 0x00001C02, @@ -6208,10 +8715,10 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00020000, 0x033, 0x00000007, 0x03E, 0x00000000, - 0x03F, 0x0002F81C, + 0x03F, 0x0002C010, 0x033, 0x00000008, - 0x03E, 0x00000000, - 0x03F, 0x0002F81C, + 0x03E, 0x00001910, + 0x03F, 0x00020000, 0x033, 0x00000009, 0x03E, 0x00001C02, 0x03F, 0x00020000, @@ -6232,9 +8739,9 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00020000, 0x033, 0x0000000F, 0x03E, 0x00000000, - 0x03F, 0x0002F81C, + 0x03F, 0x0002C010, 0x033, 0x00000010, - 0x03E, 0x00001C86, + 0x03E, 0x00001910, 0x03F, 0x00020000, 0x033, 0x00000011, 0x03E, 0x00001C02, @@ -6258,7 +8765,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x033, 0x00000018, - 0x03E, 0x00001C86, + 0x03E, 0x00001910, 0x03F, 0x00020000, 0x033, 0x00000019, 0x03E, 0x00001C02, @@ -6282,7 +8789,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x033, 0x00000020, - 0x03E, 0x00001C86, + 0x03E, 0x00001910, 0x03F, 0x00020000, 0x033, 0x00000021, 0x03E, 0x00001C02, @@ -6306,7 +8813,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x033, 0x00000028, - 0x03E, 0x00001C86, + 0x03E, 0x00001910, 0x03F, 0x00020000, 0x033, 0x00000029, 0x03E, 0x00001C02, @@ -6330,7 +8837,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -6477,7 +8984,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -6624,7 +9131,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -6771,7 +9278,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -6918,7 +9425,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -7065,7 +9572,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x93000002, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -7212,7 +9719,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x93000003, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -7359,7 +9866,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x93000004, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -7506,7 +10013,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -7653,7 +10160,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -7800,7 +10307,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -7947,7 +10454,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x93000016, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -8094,7 +10601,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -8241,7 +10748,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -8388,7 +10895,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x94000003, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -8535,7 +11042,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x94000004, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -8682,10 +11189,10 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0xA0000000, 0x00000000, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, - 0x03E, 0x00001910, + 0x03E, 0x00001C86, 0x03F, 0x00020000, 0x033, 0x00000001, 0x03E, 0x00001C02, @@ -8707,10 +11214,10 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00020000, 0x033, 0x00000007, 0x03E, 0x00000000, - 0x03F, 0x0002C010, + 0x03F, 0x0002F81C, 0x033, 0x00000008, - 0x03E, 0x00001910, - 0x03F, 0x00020000, + 0x03E, 0x00000000, + 0x03F, 0x0002F81C, 0x033, 0x00000009, 0x03E, 0x00001C02, 0x03F, 0x00020000, @@ -8731,9 +11238,156 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00020000, 0x033, 0x0000000F, 0x03E, 0x00000000, + 0x03F, 0x0002F81C, + 0x033, 0x00000010, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000011, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000012, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000013, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000014, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000015, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000016, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000017, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000018, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000019, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000001A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000001B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000001C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000001D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000001E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000001F, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000020, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000021, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000022, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000023, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000024, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000025, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000026, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000027, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000028, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000029, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000002A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000002B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000002C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000002D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000002E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000002F, + 0x03E, 0x00000000, 0x03F, 0x0002C010, + 0x0EF, 0x00000000, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00020000, + 0x033, 0x00000000, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000001, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000002, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000003, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000004, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000005, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000006, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000007, + 0x03E, 0x00000000, + 0x03F, 0x0002F81C, + 0x033, 0x00000008, + 0x03E, 0x00000000, + 0x03F, 0x0002F81C, + 0x033, 0x00000009, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000000A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000000B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000000C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000000D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000000E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000000F, + 0x03E, 0x00000000, + 0x03F, 0x0002F81C, 0x033, 0x00000010, - 0x03E, 0x00001910, + 0x03E, 0x00001C86, 0x03F, 0x00020000, 0x033, 0x00000011, 0x03E, 0x00001C02, @@ -8757,7 +11411,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x033, 0x00000018, - 0x03E, 0x00001910, + 0x03E, 0x00001C86, 0x03F, 0x00020000, 0x033, 0x00000019, 0x03E, 0x00001C02, @@ -8781,7 +11435,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x033, 0x00000020, - 0x03E, 0x00001910, + 0x03E, 0x00001C86, 0x03F, 0x00020000, 0x033, 0x00000021, 0x03E, 0x00001C02, @@ -8805,7 +11459,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x033, 0x00000028, - 0x03E, 0x00001910, + 0x03E, 0x00001C86, 0x03F, 0x00020000, 0x033, 0x00000029, 0x03E, 0x00001C02, @@ -8829,216 +11483,2478 @@ static const u32 rtw8822c_rf_a[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0xB0000000, 0x00000000, - 0x0FE, 0x00000000, - 0x01B, 0x00003A40, - 0x061, 0x0000D233, - 0x062, 0x0004D232, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, - 0x063, 0x00000002, - 0x91000002, 0x00000000, 0x40000000, 0x00000000, - 0x063, 0x00000002, - 0x92000001, 0x00000000, 0x40000000, 0x00000000, - 0x063, 0x00000002, - 0x92000002, 0x00000000, 0x40000000, 0x00000000, - 0x063, 0x00000002, - 0x93000001, 0x00000000, 0x40000000, 0x00000000, - 0x063, 0x00000002, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x063, 0x00000002, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x063, 0x00000002, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x063, 0x00000002, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x063, 0x00000002, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x063, 0x00000002, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x063, 0x00000002, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x063, 0x00000002, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x063, 0x00000002, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x063, 0x00000002, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x063, 0x00000002, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x063, 0x00000002, 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x063, 0x00000002, + 0x0EF, 0x00020000, + 0x033, 0x00000000, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000001, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000002, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000003, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000004, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000005, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000006, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000007, + 0x03E, 0x00000000, + 0x03F, 0x0002F81C, + 0x033, 0x00000008, + 0x03E, 0x00000000, + 0x03F, 0x0002F81C, + 0x033, 0x00000009, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000000A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000000B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000000C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000000D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000000E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000000F, + 0x03E, 0x00000000, + 0x03F, 0x0002F81C, + 0x033, 0x00000010, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000011, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000012, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000013, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000014, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000015, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000016, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000017, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000018, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000019, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000001A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000001B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000001C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000001D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000001E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000001F, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000020, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000021, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000022, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000023, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000024, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000025, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000026, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000027, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000028, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000029, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000002A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000002B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000002C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000002D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000002E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000002F, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x0EF, 0x00000000, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x063, 0x00000002, - 0xA0000000, 0x00000000, - 0x063, 0x00000C02, - 0xB0000000, 0x00000000, - 0x0EF, 0x00000200, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, - 0x030, 0x00000237, - 0x030, 0x00001237, - 0x030, 0x00002237, - 0x030, 0x00003237, - 0x030, 0x00004207, - 0x030, 0x00005237, - 0x030, 0x00006237, - 0x030, 0x00007237, - 0x030, 0x00008207, - 0x030, 0x00009237, - 0x030, 0x0000A237, - 0x030, 0x0000B237, - 0x030, 0x0000C237, - 0x030, 0x0000D237, - 0x030, 0x0000E207, - 0x030, 0x0000F237, - 0x030, 0x00010237, - 0x030, 0x00011237, - 0x030, 0x00012207, - 0x030, 0x00013237, - 0x030, 0x00014237, - 0x030, 0x00015237, - 0x030, 0x00016207, - 0x030, 0x00017237, - 0x030, 0x00018207, - 0x030, 0x00019237, - 0x91000002, 0x00000000, 0x40000000, 0x00000000, - 0x030, 0x00000237, - 0x030, 0x00001237, - 0x030, 0x00002237, - 0x030, 0x00003237, - 0x030, 0x00004207, - 0x030, 0x00005237, - 0x030, 0x00006237, - 0x030, 0x00007237, - 0x030, 0x00008207, - 0x030, 0x00009237, - 0x030, 0x0000A237, - 0x030, 0x0000B237, - 0x030, 0x0000C237, - 0x030, 0x0000D237, - 0x030, 0x0000E207, - 0x030, 0x0000F237, - 0x030, 0x00010237, - 0x030, 0x00011237, - 0x030, 0x00012207, - 0x030, 0x00013237, - 0x030, 0x00014237, - 0x030, 0x00015237, - 0x030, 0x00016207, - 0x030, 0x00017237, - 0x030, 0x00018207, - 0x030, 0x00019237, - 0x92000001, 0x00000000, 0x40000000, 0x00000000, - 0x030, 0x00000237, - 0x030, 0x00001237, - 0x030, 0x00002237, - 0x030, 0x00003237, - 0x030, 0x00004207, - 0x030, 0x00005237, - 0x030, 0x00006237, - 0x030, 0x00007237, - 0x030, 0x00008207, - 0x030, 0x00009237, - 0x030, 0x0000A237, - 0x030, 0x0000B237, - 0x030, 0x0000C237, - 0x030, 0x0000D237, - 0x030, 0x0000E207, - 0x030, 0x0000F237, - 0x030, 0x00010237, - 0x030, 0x00011237, - 0x030, 0x00012207, - 0x030, 0x00013237, - 0x030, 0x00014237, - 0x030, 0x00015237, - 0x030, 0x00016207, - 0x030, 0x00017237, - 0x030, 0x00018207, - 0x030, 0x00019237, - 0x92000002, 0x00000000, 0x40000000, 0x00000000, - 0x030, 0x00000237, - 0x030, 0x00001237, - 0x030, 0x00002237, - 0x030, 0x00003237, - 0x030, 0x00004207, - 0x030, 0x00005237, - 0x030, 0x00006237, - 0x030, 0x00007237, - 0x030, 0x00008207, - 0x030, 0x00009237, - 0x030, 0x0000A237, - 0x030, 0x0000B237, - 0x030, 0x0000C237, - 0x030, 0x0000D237, - 0x030, 0x0000E207, - 0x030, 0x0000F237, - 0x030, 0x00010237, - 0x030, 0x00011237, - 0x030, 0x00012207, - 0x030, 0x00013237, - 0x030, 0x00014237, - 0x030, 0x00015237, - 0x030, 0x00016207, - 0x030, 0x00017237, - 0x030, 0x00018207, - 0x030, 0x00019237, - 0x93000001, 0x00000000, 0x40000000, 0x00000000, - 0x030, 0x00000238, - 0x030, 0x00001238, - 0x030, 0x00002238, - 0x030, 0x00003238, - 0x030, 0x00004228, - 0x030, 0x00005238, - 0x030, 0x00006238, - 0x030, 0x00007238, - 0x030, 0x00008228, - 0x030, 0x00009238, - 0x030, 0x0000A238, - 0x030, 0x0000B238, - 0x030, 0x0000C238, - 0x030, 0x0000D238, - 0x030, 0x0000E228, - 0x030, 0x0000F238, - 0x030, 0x00010238, - 0x030, 0x00011238, - 0x030, 0x00012228, - 0x030, 0x00013238, - 0x030, 0x00014238, - 0x030, 0x00015238, - 0x030, 0x00016228, - 0x030, 0x00017238, - 0x030, 0x00018228, - 0x030, 0x00019238, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x030, 0x00000238, - 0x030, 0x00001238, - 0x030, 0x00002238, - 0x030, 0x00003238, - 0x030, 0x00004228, - 0x030, 0x00005238, - 0x030, 0x00006238, - 0x030, 0x00007238, - 0x030, 0x00008228, - 0x030, 0x00009238, - 0x030, 0x0000A238, - 0x030, 0x0000B238, - 0x030, 0x0000C238, - 0x030, 0x0000D238, - 0x030, 0x0000E228, - 0x030, 0x0000F238, - 0x030, 0x00010238, - 0x030, 0x00011238, - 0x030, 0x00012228, - 0x030, 0x00013238, - 0x030, 0x00014238, - 0x030, 0x00015238, - 0x030, 0x00016228, - 0x030, 0x00017238, - 0x030, 0x00018228, - 0x030, 0x00019238, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x030, 0x00000239, - 0x030, 0x00001239, + 0x0EF, 0x00020000, + 0x033, 0x00000000, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000001, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000002, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000003, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000004, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000005, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000006, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000007, + 0x03E, 0x00000000, + 0x03F, 0x0002F81C, + 0x033, 0x00000008, + 0x03E, 0x00000000, + 0x03F, 0x0002F81C, + 0x033, 0x00000009, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000000A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000000B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000000C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000000D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000000E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000000F, + 0x03E, 0x00000000, + 0x03F, 0x0002F81C, + 0x033, 0x00000010, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000011, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000012, + 0x03E, 0x00000F02, + 0x03F, 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+ 0x030, 0x00003239, + 0x030, 0x00004239, + 0x030, 0x00005239, + 0x030, 0x00006239, + 0x030, 0x00007239, + 0x030, 0x00008239, + 0x030, 0x00009239, + 0x030, 0x0000A239, + 0x030, 0x0000B239, + 0x030, 0x0000C239, + 0x030, 0x0000D239, + 0x030, 0x0000E209, + 0x030, 0x0000F239, + 0x030, 0x00010239, + 0x030, 0x00011239, + 0x030, 0x00012209, + 0x030, 0x00013239, + 0x030, 0x00014239, + 0x030, 0x00015239, + 0x030, 0x00016209, + 0x030, 0x00017239, + 0x030, 0x00018209, + 0x030, 0x00019239, + 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000239, + 0x030, 0x00001239, + 0x030, 0x00002239, + 0x030, 0x00003239, + 0x030, 0x00004239, + 0x030, 0x00005239, + 0x030, 0x00006239, + 0x030, 0x00007239, + 0x030, 0x00008239, + 0x030, 0x00009239, + 0x030, 0x0000A239, + 0x030, 0x0000B239, + 0x030, 0x0000C239, + 0x030, 0x0000D239, + 0x030, 0x0000E209, + 0x030, 0x0000F239, + 0x030, 0x00010239, + 0x030, 0x00011239, + 0x030, 0x00012209, + 0x030, 0x00013239, + 0x030, 0x00014239, + 0x030, 0x00015239, + 0x030, 0x00016209, + 0x030, 0x00017239, + 0x030, 0x00018209, + 0x030, 0x00019239, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000238, + 0x030, 0x00001238, + 0x030, 0x00002238, + 0x030, 0x00003238, + 0x030, 0x00004228, + 0x030, 0x00005238, + 0x030, 0x00006238, + 0x030, 0x00007238, + 0x030, 0x00008228, + 0x030, 0x00009238, + 0x030, 0x0000A238, + 0x030, 0x0000B238, + 0x030, 0x0000C238, + 0x030, 0x0000D238, + 0x030, 0x0000E228, + 0x030, 0x0000F238, + 0x030, 0x00010238, + 0x030, 0x00011238, + 0x030, 0x00012228, + 0x030, 0x00013238, + 0x030, 0x00014238, + 0x030, 0x00015238, + 0x030, 0x00016228, + 0x030, 0x00017238, + 0x030, 0x00018228, + 0x030, 0x00019238, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000238, + 0x030, 0x00001238, + 0x030, 0x00002238, + 0x030, 0x00003238, + 0x030, 0x00004228, + 0x030, 0x00005238, + 0x030, 0x00006238, + 0x030, 0x00007238, + 0x030, 0x00008228, + 0x030, 0x00009238, + 0x030, 0x0000A238, + 0x030, 0x0000B238, + 0x030, 0x0000C238, + 0x030, 0x0000D238, + 0x030, 0x0000E228, + 0x030, 0x0000F238, + 0x030, 0x00010238, + 0x030, 0x00011238, + 0x030, 0x00012228, + 0x030, 0x00013238, + 0x030, 0x00014238, + 0x030, 0x00015238, + 0x030, 0x00016228, + 0x030, 0x00017238, + 0x030, 0x00018228, + 0x030, 0x00019238, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000239, + 0x030, 0x00001239, + 0x030, 0x00002239, + 0x030, 0x00003239, + 0x030, 0x00004239, + 0x030, 0x00005239, + 0x030, 0x00006239, + 0x030, 0x00007239, + 0x030, 0x00008239, + 0x030, 0x00009239, + 0x030, 0x0000A239, + 0x030, 0x0000B239, + 0x030, 0x0000C239, + 0x030, 0x0000D239, + 0x030, 0x0000E209, + 0x030, 0x0000F239, + 0x030, 0x00010239, + 0x030, 0x00011239, + 0x030, 0x00012209, + 0x030, 0x00013239, + 0x030, 0x00014239, + 0x030, 0x00015239, + 0x030, 0x00016209, + 0x030, 0x00017239, + 0x030, 0x00018209, + 0x030, 0x00019239, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000239, + 0x030, 0x00001239, + 0x030, 0x00002239, + 0x030, 0x00003239, + 0x030, 0x00004239, + 0x030, 0x00005239, + 0x030, 0x00006239, + 0x030, 0x00007239, + 0x030, 0x00008239, + 0x030, 0x00009239, + 0x030, 0x0000A239, + 0x030, 0x0000B239, + 0x030, 0x0000C239, + 0x030, 0x0000D239, + 0x030, 0x0000E209, + 0x030, 0x0000F239, + 0x030, 0x00010239, + 0x030, 0x00011239, + 0x030, 0x00012209, + 0x030, 0x00013239, + 0x030, 0x00014239, + 0x030, 0x00015239, + 0x030, 0x00016209, + 0x030, 0x00017239, + 0x030, 0x00018209, + 0x030, 0x00019239, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000238, + 0x030, 0x00001238, + 0x030, 0x00002238, + 0x030, 0x00003238, + 0x030, 0x00004228, + 0x030, 0x00005238, + 0x030, 0x00006238, + 0x030, 0x00007238, + 0x030, 0x00008228, + 0x030, 0x00009238, + 0x030, 0x0000A238, + 0x030, 0x0000B238, + 0x030, 0x0000C238, + 0x030, 0x0000D238, + 0x030, 0x0000E228, + 0x030, 0x0000F238, + 0x030, 0x00010238, + 0x030, 0x00011238, + 0x030, 0x00012228, + 0x030, 0x00013238, + 0x030, 0x00014238, + 0x030, 0x00015238, + 0x030, 0x00016228, + 0x030, 0x00017238, + 0x030, 0x00018228, + 0x030, 0x00019238, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000238, + 0x030, 0x00001238, + 0x030, 0x00002238, + 0x030, 0x00003238, + 0x030, 0x00004228, + 0x030, 0x00005238, + 0x030, 0x00006238, + 0x030, 0x00007238, + 0x030, 0x00008228, + 0x030, 0x00009238, + 0x030, 0x0000A238, + 0x030, 0x0000B238, + 0x030, 0x0000C238, + 0x030, 0x0000D238, + 0x030, 0x0000E228, + 0x030, 0x0000F238, + 0x030, 0x00010238, + 0x030, 0x00011238, + 0x030, 0x00012228, + 0x030, 0x00013238, + 0x030, 0x00014238, + 0x030, 0x00015238, + 0x030, 0x00016228, + 0x030, 0x00017238, + 0x030, 0x00018228, + 0x030, 0x00019238, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000239, + 0x030, 0x00001239, + 0x030, 0x00002239, + 0x030, 0x00003239, + 0x030, 0x00004239, + 0x030, 0x00005239, + 0x030, 0x00006239, + 0x030, 0x00007239, + 0x030, 0x00008239, + 0x030, 0x00009239, + 0x030, 0x0000A239, + 0x030, 0x0000B239, + 0x030, 0x0000C239, + 0x030, 0x0000D239, + 0x030, 0x0000E209, + 0x030, 0x0000F239, + 0x030, 0x00010239, + 0x030, 0x00011239, + 0x030, 0x00012209, + 0x030, 0x00013239, + 0x030, 0x00014239, + 0x030, 0x00015239, + 0x030, 0x00016209, + 0x030, 0x00017239, + 0x030, 0x00018209, + 0x030, 0x00019239, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000239, + 0x030, 0x00001239, + 0x030, 0x00002239, + 0x030, 0x00003239, + 0x030, 0x00004239, + 0x030, 0x00005239, + 0x030, 0x00006239, + 0x030, 0x00007239, + 0x030, 0x00008239, + 0x030, 0x00009239, + 0x030, 0x0000A239, + 0x030, 0x0000B239, + 0x030, 0x0000C239, + 0x030, 0x0000D239, + 0x030, 0x0000E209, + 0x030, 0x0000F239, + 0x030, 0x00010239, + 0x030, 0x00011239, + 0x030, 0x00012209, + 0x030, 0x00013239, + 0x030, 0x00014239, + 0x030, 0x00015239, + 0x030, 0x00016209, + 0x030, 0x00017239, + 0x030, 0x00018209, + 0x030, 0x00019239, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000238, + 0x030, 0x00001238, + 0x030, 0x00002238, + 0x030, 0x00003238, + 0x030, 0x00004228, + 0x030, 0x00005238, + 0x030, 0x00006238, + 0x030, 0x00007238, + 0x030, 0x00008228, + 0x030, 0x00009238, + 0x030, 0x0000A238, + 0x030, 0x0000B238, + 0x030, 0x0000C238, + 0x030, 0x0000D238, + 0x030, 0x0000E228, + 0x030, 0x0000F238, + 0x030, 0x00010238, + 0x030, 0x00011238, + 0x030, 0x00012228, + 0x030, 0x00013238, + 0x030, 0x00014238, + 0x030, 0x00015238, + 0x030, 0x00016228, + 0x030, 0x00017238, + 0x030, 0x00018228, + 0x030, 0x00019238, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000238, + 0x030, 0x00001238, + 0x030, 0x00002238, + 0x030, 0x00003238, + 0x030, 0x00004228, + 0x030, 0x00005238, + 0x030, 0x00006238, + 0x030, 0x00007238, + 0x030, 0x00008228, + 0x030, 0x00009238, + 0x030, 0x0000A238, + 0x030, 0x0000B238, + 0x030, 0x0000C238, + 0x030, 0x0000D238, + 0x030, 0x0000E228, + 0x030, 0x0000F238, + 0x030, 0x00010238, + 0x030, 0x00011238, + 0x030, 0x00012228, + 0x030, 0x00013238, + 0x030, 0x00014238, + 0x030, 0x00015238, + 0x030, 0x00016228, + 0x030, 0x00017238, + 0x030, 0x00018228, + 0x030, 0x00019238, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000239, + 0x030, 0x00001239, + 0x030, 0x00002239, + 0x030, 0x00003239, + 0x030, 0x00004239, + 0x030, 0x00005239, + 0x030, 0x00006239, + 0x030, 0x00007239, + 0x030, 0x00008239, + 0x030, 0x00009239, + 0x030, 0x0000A239, + 0x030, 0x0000B239, + 0x030, 0x0000C239, + 0x030, 0x0000D239, + 0x030, 0x0000E209, + 0x030, 0x0000F239, + 0x030, 0x00010239, + 0x030, 0x00011239, + 0x030, 0x00012209, + 0x030, 0x00013239, + 0x030, 0x00014239, + 0x030, 0x00015239, + 0x030, 0x00016209, + 0x030, 0x00017239, + 0x030, 0x00018209, + 0x030, 0x00019239, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000239, + 0x030, 0x00001239, 0x030, 0x00002239, 0x030, 0x00003239, 0x030, 0x00004239, @@ -9063,827 +13979,2362 @@ static const u32 rtw8822c_rf_a[] = { 0x030, 0x00017239, 0x030, 0x00018209, 0x030, 0x00019239, + 0xA0000000, 0x00000000, + 0x030, 0x00000233, + 0x030, 0x00001233, + 0x030, 0x00002233, + 0x030, 0x00003233, + 0x030, 0x00004203, + 0x030, 0x00005233, + 0x030, 0x00006233, + 0x030, 0x00007233, + 0x030, 0x00008203, + 0x030, 0x00009233, + 0x030, 0x0000A233, + 0x030, 0x0000B233, + 0x030, 0x0000C233, + 0x030, 0x0000D233, + 0x030, 0x0000E203, + 0x030, 0x0000F233, + 0x030, 0x00010233, + 0x030, 0x00011233, + 0x030, 0x00012203, + 0x030, 0x00013233, + 0x030, 0x00014233, + 0x030, 0x00015233, + 0x030, 0x00016203, + 0x030, 0x00017233, + 0x030, 0x00018203, + 0x030, 0x00019233, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x0EF, 0x00000080, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000232, + 0x030, 0x00001232, + 0x030, 0x00002232, + 0x030, 0x00003232, + 0x030, 0x00004232, + 0x030, 0x00005232, + 0x030, 0x00006232, + 0x030, 0x00007232, + 0x030, 0x00008232, + 0x030, 0x00009232, + 0x030, 0x0000A232, + 0x030, 0x0000B232, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000232, + 0x030, 0x00001232, + 0x030, 0x00002232, + 0x030, 0x00003232, + 0x030, 0x00004232, + 0x030, 0x00005232, + 0x030, 0x00006232, + 0x030, 0x00007232, + 0x030, 0x00008232, + 0x030, 0x00009232, + 0x030, 0x0000A232, + 0x030, 0x0000B232, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000334, + 0x030, 0x00001334, + 0x030, 0x00002334, + 0x030, 0x00003334, + 0x030, 0x00004334, + 0x030, 0x00005334, + 0x030, 0x00006334, + 0x030, 0x00007334, + 0x030, 0x00008334, + 0x030, 0x00009334, + 0x030, 0x0000A334, + 0x030, 0x0000B334, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000334, + 0x030, 0x00001334, + 0x030, 0x00002334, + 0x030, 0x00003334, + 0x030, 0x00004334, + 0x030, 0x00005334, + 0x030, 0x00006334, + 0x030, 0x00007334, + 0x030, 0x00008334, + 0x030, 0x00009334, + 0x030, 0x0000A334, + 0x030, 0x0000B334, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000334, + 0x030, 0x00001334, + 0x030, 0x00002334, + 0x030, 0x00003334, + 0x030, 0x00004334, + 0x030, 0x00005334, + 0x030, 0x00006334, + 0x030, 0x00007334, + 0x030, 0x00008334, + 0x030, 0x00009334, + 0x030, 0x0000A334, + 0x030, 0x0000B334, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000334, + 0x030, 0x00001334, + 0x030, 0x00002334, + 0x030, 0x00003334, + 0x030, 0x00004334, + 0x030, 0x00005334, + 0x030, 0x00006334, + 0x030, 0x00007334, + 0x030, 0x00008334, + 0x030, 0x00009334, + 0x030, 0x0000A334, + 0x030, 0x0000B334, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000334, + 0x030, 0x00001334, + 0x030, 0x00002334, + 0x030, 0x00003334, + 0x030, 0x00004334, + 0x030, 0x00005334, + 0x030, 0x00006334, + 0x030, 0x00007334, + 0x030, 0x00008334, + 0x030, 0x00009334, + 0x030, 0x0000A334, + 0x030, 0x0000B334, + 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000334, + 0x030, 0x00001334, + 0x030, 0x00002334, + 0x030, 0x00003334, + 0x030, 0x00004334, + 0x030, 0x00005334, + 0x030, 0x00006334, + 0x030, 0x00007334, + 0x030, 0x00008334, + 0x030, 0x00009334, + 0x030, 0x0000A334, + 0x030, 0x0000B334, + 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000334, + 0x030, 0x00001334, + 0x030, 0x00002334, + 0x030, 0x00003334, + 0x030, 0x00004334, + 0x030, 0x00005334, + 0x030, 0x00006334, + 0x030, 0x00007334, + 0x030, 0x00008334, + 0x030, 0x00009334, + 0x030, 0x0000A334, + 0x030, 0x0000B334, + 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000334, + 0x030, 0x00001334, + 0x030, 0x00002334, + 0x030, 0x00003334, + 0x030, 0x00004334, + 0x030, 0x00005334, + 0x030, 0x00006334, + 0x030, 0x00007334, + 0x030, 0x00008334, + 0x030, 0x00009334, + 0x030, 0x0000A334, + 0x030, 0x0000B334, + 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000334, + 0x030, 0x00001334, + 0x030, 0x00002334, + 0x030, 0x00003334, + 0x030, 0x00004334, + 0x030, 0x00005334, + 0x030, 0x00006334, + 0x030, 0x00007334, + 0x030, 0x00008334, + 0x030, 0x00009334, + 0x030, 0x0000A334, + 0x030, 0x0000B334, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000334, + 0x030, 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0x03F, 0x00000CF4, - 0x033, 0x0000020A, + 0x033, 0x0000030A, 0x03F, 0x00000CF7, - 0xB0000000, 0x00000000, - 0x83000015, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x00000280, + 0x0EE, 0x00000000, + 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, 0x03F, 0x00000005, - 0x033, 0x00000281, + 0x033, 0x00000301, 0x03F, 0x00000008, - 0x033, 0x00000282, + 0x033, 0x00000302, 0x03F, 0x0000000B, - 0x033, 0x00000283, + 0x033, 0x00000303, 0x03F, 0x0000000E, - 0x033, 0x00000284, + 0x033, 0x00000304, 0x03F, 0x0000002B, - 0x033, 0x00000285, + 0x033, 0x00000305, 0x03F, 0x0000002E, - 0x033, 0x00000286, - 0x03F, 0x0000006B, - 0x033, 0x00000287, - 0x03F, 0x0000006E, - 0x033, 0x00000288, - 0x03F, 0x00000071, - 0x033, 0x00000289, - 0x03F, 0x00000074, - 0x033, 0x0000028A, - 0x03F, 0x00000077, + 0x033, 0x00000306, + 0x03F, 0x00000031, + 0x033, 0x00000307, + 0x03F, 0x00000034, + 0x033, 0x00000308, + 0x03F, 0x00000053, + 0x033, 0x00000309, + 0x03F, 0x00000056, + 0x033, 0x0000030A, + 0x03F, 0x000000D1, + 0x0EE, 0x00000000, 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x00000280, - 0x03F, 0x00000005, - 0x033, 0x00000281, - 0x03F, 0x00000008, - 0x033, 0x00000282, - 0x03F, 0x0000000B, - 0x033, 0x00000283, - 0x03F, 0x0000000E, - 0x033, 0x00000284, - 0x03F, 0x0000002B, - 0x033, 0x00000285, - 0x03F, 0x0000002E, - 0x033, 0x00000286, - 0x03F, 0x0000006B, - 0x033, 0x00000287, - 0x03F, 0x0000006E, - 0x033, 0x00000288, - 0x03F, 0x00000071, - 0x033, 0x00000289, - 0x03F, 0x00000074, - 0x033, 0x0000028A, - 0x03F, 0x00000077, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x00000280, - 0x03F, 0x00000005, - 0x033, 0x00000281, - 0x03F, 0x00000008, - 0x033, 0x00000282, - 0x03F, 0x0000000B, - 0x033, 0x00000283, - 0x03F, 0x0000000E, - 0x033, 0x00000284, - 0x03F, 0x0000002B, - 0x033, 0x00000285, - 0x03F, 0x0000002E, - 0x033, 0x00000286, - 0x03F, 0x0000006B, - 0x033, 0x00000287, - 0x03F, 0x0000006E, - 0x033, 0x00000288, - 0x03F, 0x00000071, - 0x033, 0x00000289, - 0x03F, 0x00000074, - 0x033, 0x0000028A, - 0x03F, 0x00000077, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x00000280, + 0x033, 0x00000300, 0x03F, 0x00000005, - 0x033, 0x00000281, + 0x033, 0x00000301, 0x03F, 0x00000008, - 0x033, 0x00000282, + 0x033, 0x00000302, 0x03F, 0x0000000B, - 0x033, 0x00000283, + 0x033, 0x00000303, 0x03F, 0x0000000E, - 0x033, 0x00000284, + 0x033, 0x00000304, 0x03F, 0x0000002B, - 0x033, 0x00000285, + 0x033, 0x00000305, 0x03F, 0x0000002E, - 0x033, 0x00000286, - 0x03F, 0x0000006B, - 0x033, 0x00000287, - 0x03F, 0x0000006E, - 0x033, 0x00000288, - 0x03F, 0x00000071, - 0x033, 0x00000289, - 0x03F, 0x00000074, - 0x033, 0x0000028A, - 0x03F, 0x00000077, - 0xA0000000, 0x00000000, - 0x033, 0x00000280, + 0x033, 0x00000306, + 0x03F, 0x00000031, + 0x033, 0x00000307, + 0x03F, 0x00000034, + 0x033, 0x00000308, + 0x03F, 0x00000053, + 0x033, 0x00000309, + 0x03F, 0x00000056, + 0x033, 0x0000030A, + 0x03F, 0x000000D1, + 0x0EE, 0x00000000, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, 0x03F, 0x0000006A, - 0x033, 0x00000281, + 0x033, 0x00000301, 0x03F, 0x0000006D, - 0x033, 0x00000282, + 0x033, 0x00000302, 0x03F, 0x0000046A, - 0x033, 0x00000283, + 0x033, 0x00000303, 0x03F, 0x0000086A, - 0x033, 0x00000284, + 0x033, 0x00000304, 0x03F, 0x00000C89, - 0x033, 0x00000285, + 0x033, 0x00000305, 0x03F, 0x00000CE8, - 0x033, 0x00000286, + 0x033, 0x00000306, 0x03F, 0x00000CEB, - 0x033, 0x00000287, + 0x033, 0x00000307, 0x03F, 0x00000CEE, - 0x033, 0x00000288, + 0x033, 0x00000308, 0x03F, 0x00000CF1, - 0x033, 0x00000289, + 0x033, 0x00000309, 0x03F, 0x00000CF4, - 0x033, 0x0000028A, + 0x033, 0x0000030A, 0x03F, 0x00000CF7, - 0xB0000000, 0x00000000, - 0x83000015, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000000, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000300, 0x03F, 0x00000005, 0x033, 0x00000301, @@ -9907,7 +16358,7 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x0000030A, 0x03F, 0x000000D1, 0x0EE, 0x00000000, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000300, 0x03F, 0x00000005, 0x033, 0x00000301, @@ -9931,7 +16382,151 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x0000030A, 0x03F, 0x000000D1, 0x0EE, 0x00000000, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000300, 0x03F, 0x00000005, 0x033, 0x00000301, @@ -9955,7 +16550,7 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x0000030A, 0x03F, 0x000000D1, 0x0EE, 0x00000000, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000300, 0x03F, 0x00000005, 0x033, 0x00000301, @@ -10005,7 +16600,11 @@ static const u32 rtw8822c_rf_a[] = { 0x0EE, 0x00000000, 0xB0000000, 0x00000000, 0x051, 0x0003C800, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000942CA, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000942CA, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x052, 0x000902CA, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x052, 0x000902CA, @@ -10023,6 +16622,8 @@ static const u32 rtw8822c_rf_a[] = { 0x052, 0x000902CA, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x052, 0x000902CA, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x052, 0x000902CA, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10037,10 +16638,28 @@ static const u32 rtw8822c_rf_a[] = { 0x052, 0x000902CA, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x052, 0x000902CA, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x052, 0x000902CA, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x052, 0x000902CA, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, 0xA0000000, 0x00000000, 0x052, 0x000942CA, 0xB0000000, 0x00000000, @@ -10050,7 +16669,11 @@ static const u32 rtw8822c_rf_a[] = { 0x0EF, 0x00000020, 0x033, 0x00000000, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, @@ -10068,6 +16691,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10082,16 +16707,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000001, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, @@ -10109,6 +16756,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10123,16 +16772,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000002, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, @@ -10141,39 +16812,63 @@ static const u32 rtw8822c_rf_a[] = { 0x92000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00030246, + 0x03F, 0x0003D646, 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00030246, + 0x03F, 0x0003D646, 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00030246, + 0x03F, 0x0003D646, 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00030246, + 0x03F, 0x0003D646, 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00030246, + 0x03F, 0x0003D646, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00030246, + 0x03F, 0x0003D646, 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00030246, + 0x03F, 0x0003D646, 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00030246, + 0x03F, 0x0003D646, 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00030246, + 0x03F, 0x0003D646, 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00030246, + 0x03F, 0x0003D646, 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00030246, + 0x03F, 0x0003D646, 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00030246, + 0x03F, 0x0003D646, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00030246, + 0x03F, 0x0003D646, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00030246, + 0x03F, 0x0003D646, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000003, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, @@ -10191,6 +16886,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10205,16 +16902,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000004, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, @@ -10232,6 +16951,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10246,16 +16967,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000005, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, @@ -10273,6 +17016,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00030246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10287,16 +17032,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00030246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000006, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, @@ -10314,6 +17081,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10328,16 +17097,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000007, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, @@ -10355,6 +17146,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10369,16 +17162,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000008, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, @@ -10396,6 +17211,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00030246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10410,16 +17227,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00030246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000009, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, @@ -10437,6 +17276,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10451,16 +17292,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x0000000A, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, @@ -10478,6 +17341,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10492,16 +17357,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x0000000B, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, @@ -10519,6 +17406,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00030246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10533,16 +17422,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00030246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x0000000C, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, @@ -10560,6 +17471,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10574,16 +17487,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x0000000D, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, @@ -10601,6 +17536,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10615,16 +17552,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00028246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00028246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00028246, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x0000000E, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00010E46, @@ -10642,6 +17601,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00030246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10656,16 +17617,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00030246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00030246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030246, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x0000000F, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -10683,6 +17666,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10697,16 +17682,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000010, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -10724,6 +17731,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10738,16 +17747,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000011, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -10765,6 +17796,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00031E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10779,16 +17812,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00031E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000012, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -10806,6 +17861,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10820,16 +17877,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000013, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -10847,6 +17926,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10861,16 +17942,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000014, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -10888,6 +17991,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00031E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10902,16 +18007,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00031E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000015, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -10929,6 +18056,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10943,16 +18072,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000016, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -10970,6 +18121,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -10984,16 +18137,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000017, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11011,6 +18186,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00031E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -11025,16 +18202,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00031E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000018, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11052,6 +18251,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -11066,16 +18267,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000019, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11093,6 +18316,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -11107,16 +18332,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x0000001A, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11134,6 +18381,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00031E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -11148,16 +18397,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00031E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x0000001B, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11175,6 +18446,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -11189,16 +18462,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x0000001C, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11216,6 +18511,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -11230,16 +18527,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x0000001D, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11257,6 +18576,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00031E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -11271,16 +18592,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00031E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00031E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00031E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x0000001E, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11298,6 +18641,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -11312,16 +18657,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x0000001F, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11339,6 +18706,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -11353,16 +18722,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000020, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11371,39 +18762,63 @@ static const u32 rtw8822c_rf_a[] = { 0x92000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000021, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11421,6 +18836,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -11435,16 +18852,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000022, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11462,6 +18901,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -11476,16 +18917,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000023, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11494,39 +18957,63 @@ static const u32 rtw8822c_rf_a[] = { 0x92000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000024, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11544,6 +19031,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -11558,16 +19047,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000025, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11585,6 +19096,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -11599,16 +19112,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000026, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11617,39 +19152,63 @@ static const u32 rtw8822c_rf_a[] = { 0x92000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000027, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11667,6 +19226,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -11681,16 +19242,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000028, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11708,6 +19291,8 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -11722,16 +19307,38 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00025E46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00025E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00025E46, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x00000029, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11740,39 +19347,63 @@ static const u32 rtw8822c_rf_a[] = { 0x92000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00031E46, + 0x03F, 0x0003D646, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0003D646, 0xA0000000, 0x00000000, 0x03F, 0x00002A46, 0xB0000000, 0x00000000, 0x033, 0x0000002A, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00002A46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0000EA46, @@ -11790,122 +19421,418 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00021E46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00021E46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00021E46, + 0xA0000000, 0x00000000, + 0x03F, 0x00002A46, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x0EE, 0x00010000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000487, + 0x033, 0x00000061, + 0x03F, 0x00000887, + 0x033, 0x00000062, + 0x03F, 0x00000947, + 0x033, 0x00000063, + 0x03F, 0x00000D48, + 0x033, 0x00000064, + 0x03F, 0x00000D88, + 0x033, 0x00000065, + 0x03F, 0x00000DE8, + 0x033, 0x00000066, + 0x03F, 0x00000DEB, + 0x033, 0x00000067, + 0x03F, 0x00000DEE, + 0x033, 0x00000068, + 0x03F, 0x00000DF1, + 0x033, 0x00000069, + 0x03F, 0x00000DF4, + 0x033, 0x0000006A, + 0x03F, 0x00000DF7, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000487, + 0x033, 0x00000061, + 0x03F, 0x00000887, + 0x033, 0x00000062, + 0x03F, 0x00000947, + 0x033, 0x00000063, + 0x03F, 0x00000D48, + 0x033, 0x00000064, + 0x03F, 0x00000D88, + 0x033, 0x00000065, + 0x03F, 0x00000DE8, + 0x033, 0x00000066, + 0x03F, 0x00000DEB, + 0x033, 0x00000067, + 0x03F, 0x00000DEE, + 0x033, 0x00000068, + 0x03F, 0x00000DF1, + 0x033, 0x00000069, + 0x03F, 0x00000DF4, + 0x033, 0x0000006A, + 0x03F, 0x00000DF7, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000468, + 0x033, 0x00000061, + 0x03F, 0x00000868, + 0x033, 0x00000062, + 0x03F, 0x00000909, + 0x033, 0x00000063, + 0x03F, 0x00000D0A, + 0x033, 0x00000064, + 0x03F, 0x00000D4A, + 0x033, 0x00000065, + 0x03F, 0x00000D8B, + 0x033, 0x00000066, + 0x03F, 0x00000DEB, + 0x033, 0x00000067, + 0x03F, 0x00000DEE, + 0x033, 0x00000068, + 0x03F, 0x00000DF1, + 0x033, 0x00000069, + 0x03F, 0x00000DF4, + 0x033, 0x0000006A, + 0x03F, 0x00000DF7, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000468, + 0x033, 0x00000061, + 0x03F, 0x00000868, + 0x033, 0x00000062, + 0x03F, 0x00000909, + 0x033, 0x00000063, + 0x03F, 0x00000D0A, + 0x033, 0x00000064, + 0x03F, 0x00000D4A, + 0x033, 0x00000065, + 0x03F, 0x00000D8B, + 0x033, 0x00000066, + 0x03F, 0x00000DEB, + 0x033, 0x00000067, + 0x03F, 0x00000DEE, + 0x033, 0x00000068, + 0x03F, 0x00000DF1, + 0x033, 0x00000069, + 0x03F, 0x00000DF4, + 0x033, 0x0000006A, + 0x03F, 0x00000DF7, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000468, + 0x033, 0x00000061, + 0x03F, 0x00000868, + 0x033, 0x00000062, + 0x03F, 0x00000909, + 0x033, 0x00000063, + 0x03F, 0x00000D0A, + 0x033, 0x00000064, + 0x03F, 0x00000D4A, + 0x033, 0x00000065, + 0x03F, 0x00000D8B, + 0x033, 0x00000066, + 0x03F, 0x00000DEB, + 0x033, 0x00000067, + 0x03F, 0x00000DEE, + 0x033, 0x00000068, + 0x03F, 0x00000DF1, + 0x033, 0x00000069, + 0x03F, 0x00000DF4, + 0x033, 0x0000006A, + 0x03F, 0x00000DF7, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000468, + 0x033, 0x00000061, + 0x03F, 0x00000868, + 0x033, 0x00000062, + 0x03F, 0x00000909, + 0x033, 0x00000063, + 0x03F, 0x00000D0A, + 0x033, 0x00000064, + 0x03F, 0x00000D4A, + 0x033, 0x00000065, + 0x03F, 0x00000D8B, + 0x033, 0x00000066, + 0x03F, 0x00000DEB, + 0x033, 0x00000067, + 0x03F, 0x00000DEE, + 0x033, 0x00000068, + 0x03F, 0x00000DF1, + 0x033, 0x00000069, + 0x03F, 0x00000DF4, + 0x033, 0x0000006A, + 0x03F, 0x00000DF7, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000467, + 0x033, 0x00000061, + 0x03F, 0x00000867, + 0x033, 0x00000062, + 0x03F, 0x00000908, + 0x033, 0x00000063, + 0x03F, 0x000008C8, + 0x033, 0x00000064, + 0x03F, 0x000008CB, + 0x033, 0x00000065, + 0x03F, 0x000008CE, + 0x033, 0x00000066, + 0x03F, 0x000008D1, + 0x033, 0x00000067, + 0x03F, 0x000008D4, + 0x033, 0x00000068, + 0x03F, 0x00000DD1, + 0x033, 0x00000069, + 0x03F, 0x00000DD4, + 0x033, 0x0000006A, + 0x03F, 0x00000DD7, + 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000467, + 0x033, 0x00000061, + 0x03F, 0x00000867, + 0x033, 0x00000062, + 0x03F, 0x00000908, + 0x033, 0x00000063, + 0x03F, 0x000008C8, + 0x033, 0x00000064, + 0x03F, 0x000008CB, + 0x033, 0x00000065, + 0x03F, 0x000008CE, + 0x033, 0x00000066, + 0x03F, 0x000008D1, + 0x033, 0x00000067, + 0x03F, 0x000008D4, + 0x033, 0x00000068, + 0x03F, 0x00000DD1, + 0x033, 0x00000069, + 0x03F, 0x00000DD4, + 0x033, 0x0000006A, + 0x03F, 0x00000DD7, + 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000467, + 0x033, 0x00000061, + 0x03F, 0x00000867, + 0x033, 0x00000062, + 0x03F, 0x00000908, + 0x033, 0x00000063, + 0x03F, 0x000008C8, + 0x033, 0x00000064, + 0x03F, 0x000008CB, + 0x033, 0x00000065, + 0x03F, 0x000008CE, + 0x033, 0x00000066, + 0x03F, 0x000008D1, + 0x033, 0x00000067, + 0x03F, 0x000008D4, + 0x033, 0x00000068, + 0x03F, 0x00000DD1, + 0x033, 0x00000069, + 0x03F, 0x00000DD4, + 0x033, 0x0000006A, + 0x03F, 0x00000DD7, + 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000467, + 0x033, 0x00000061, + 0x03F, 0x00000867, + 0x033, 0x00000062, + 0x03F, 0x00000908, + 0x033, 0x00000063, + 0x03F, 0x000008C8, + 0x033, 0x00000064, + 0x03F, 0x000008CB, + 0x033, 0x00000065, + 0x03F, 0x000008CE, + 0x033, 0x00000066, + 0x03F, 0x000008D1, + 0x033, 0x00000067, + 0x03F, 0x000008D4, + 0x033, 0x00000068, + 0x03F, 0x00000DD1, + 0x033, 0x00000069, + 0x03F, 0x00000DD4, + 0x033, 0x0000006A, + 0x03F, 0x00000DD7, + 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000467, + 0x033, 0x00000061, + 0x03F, 0x00000867, + 0x033, 0x00000062, + 0x03F, 0x00000908, + 0x033, 0x00000063, + 0x03F, 0x000008C8, + 0x033, 0x00000064, + 0x03F, 0x000008CB, + 0x033, 0x00000065, + 0x03F, 0x000008CE, + 0x033, 0x00000066, + 0x03F, 0x000008D1, + 0x033, 0x00000067, + 0x03F, 0x000008D4, + 0x033, 0x00000068, + 0x03F, 0x00000DD1, + 0x033, 0x00000069, + 0x03F, 0x00000DD4, + 0x033, 0x0000006A, + 0x03F, 0x00000DD7, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000467, + 0x033, 0x00000061, + 0x03F, 0x00000867, + 0x033, 0x00000062, + 0x03F, 0x00000908, + 0x033, 0x00000063, + 0x03F, 0x000008C8, + 0x033, 0x00000064, + 0x03F, 0x000008CB, + 0x033, 0x00000065, + 0x03F, 0x000008CE, + 0x033, 0x00000066, + 0x03F, 0x000008D1, + 0x033, 0x00000067, + 0x03F, 0x000008D4, + 0x033, 0x00000068, + 0x03F, 0x00000DD1, + 0x033, 0x00000069, + 0x03F, 0x00000DD4, + 0x033, 0x0000006A, + 0x03F, 0x00000DD7, 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00021E46, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00021E46, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00021E46, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00021E46, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00021E46, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00021E46, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00021E46, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00021E46, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00021E46, - 0xA0000000, 0x00000000, - 0x03F, 0x00002A46, - 0xB0000000, 0x00000000, - 0x0EF, 0x00000000, - 0x0EE, 0x00010000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, - 0x03F, 0x00000468, + 0x03F, 0x00000467, 0x033, 0x00000061, - 0x03F, 0x00000868, + 0x03F, 0x00000867, 0x033, 0x00000062, - 0x03F, 0x00000909, + 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D0A, + 0x03F, 0x000008C8, 0x033, 0x00000064, - 0x03F, 0x00000D4A, + 0x03F, 0x000008CB, 0x033, 0x00000065, - 0x03F, 0x00000D8B, + 0x03F, 0x000008CE, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x000008D1, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x000008D4, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000DD1, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x93000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, - 0x03F, 0x00000468, + 0x03F, 0x00000467, 0x033, 0x00000061, - 0x03F, 0x00000868, + 0x03F, 0x00000867, 0x033, 0x00000062, - 0x03F, 0x00000909, + 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D0A, + 0x03F, 0x000008C8, 0x033, 0x00000064, - 0x03F, 0x00000D4A, + 0x03F, 0x000008CB, 0x033, 0x00000065, - 0x03F, 0x00000D8B, + 0x03F, 0x000008CE, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x000008D1, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x000008D4, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000DD1, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, - 0x03F, 0x00000468, + 0x03F, 0x00000467, 0x033, 0x00000061, - 0x03F, 0x00000868, + 0x03F, 0x00000867, 0x033, 0x00000062, - 0x03F, 0x00000909, + 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D0A, + 0x03F, 0x000008C8, 0x033, 0x00000064, - 0x03F, 0x00000D4A, + 0x03F, 0x000008CB, 0x033, 0x00000065, - 0x03F, 0x00000D8B, + 0x03F, 0x000008CE, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x000008D1, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x000008D4, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000DD1, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, - 0x03F, 0x00000468, + 0x03F, 0x00000467, 0x033, 0x00000061, - 0x03F, 0x00000868, + 0x03F, 0x00000867, 0x033, 0x00000062, - 0x03F, 0x00000909, + 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D0A, + 0x03F, 0x000008C8, 0x033, 0x00000064, - 0x03F, 0x00000D4A, + 0x03F, 0x000008CB, 0x033, 0x00000065, - 0x03F, 0x00000D8B, + 0x03F, 0x000008CE, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x000008D1, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x000008D4, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000DD1, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x94000003, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -11913,22 +19840,22 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x000008C8, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x000008CB, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x000008CE, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x000008D1, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x000008D4, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000DD1, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x94000004, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -11936,22 +19863,22 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x000008C8, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x000008CB, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x000008CE, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x000008D1, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x000008D4, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000DD1, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -11959,22 +19886,22 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x000008C8, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x000008CB, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x000008CE, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x000008D1, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x000008D4, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000DD1, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -11982,22 +19909,22 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x000008C8, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x000008CB, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x000008CE, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x000008D1, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x000008D4, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000DD1, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -12005,22 +19932,22 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x000008C8, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x000008CB, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x000008CE, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x000008D1, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x000008D4, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000DD1, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -12028,22 +19955,22 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x000008C8, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x000008CB, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x000008CE, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x000008D1, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x000008D4, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000DD1, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -12051,22 +19978,22 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x000008C8, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x000008CB, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x000008CE, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x000008D1, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x000008D4, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000DD1, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -12074,22 +20001,22 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x000008C8, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x000008CB, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x000008CE, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x000008D1, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x000008D4, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000DD1, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -12097,22 +20024,22 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x000008C8, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x000008CB, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x000008CE, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x000008D1, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x000008D4, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000DD1, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -12120,22 +20047,22 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x000008C8, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x000008CB, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x000008CE, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x000008D1, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x000008D4, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000DD1, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -12143,22 +20070,22 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x000008C8, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x000008CB, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x000008CE, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x000008D1, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x000008D4, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000DD1, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -12166,22 +20093,22 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x000008C8, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x000008CB, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x000008CE, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x000008D1, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x000008D4, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000DD1, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -12189,22 +20116,22 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x000008C8, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x000008CB, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x000008CE, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x000008D1, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x000008D4, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000DD1, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -12212,21 +20139,21 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x000008C8, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x000008CB, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x000008CE, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x000008D1, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x000008D4, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000DD1, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, + 0x03F, 0x00000DD7, 0xA0000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000487, @@ -12251,7 +20178,53 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x0000006A, 0x03F, 0x00000DF7, 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000487, + 0x033, 0x00000021, + 0x03F, 0x00000887, + 0x033, 0x00000022, + 0x03F, 0x00000947, + 0x033, 0x00000023, + 0x03F, 0x00000D48, + 0x033, 0x00000024, + 0x03F, 0x00000D88, + 0x033, 0x00000025, + 0x03F, 0x00000DE8, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000487, + 0x033, 0x00000021, + 0x03F, 0x00000887, + 0x033, 0x00000022, + 0x03F, 0x00000947, + 0x033, 0x00000023, + 0x03F, 0x00000D48, + 0x033, 0x00000024, + 0x03F, 0x00000D88, + 0x033, 0x00000025, + 0x03F, 0x00000DE8, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000020, 0x03F, 0x00000468, 0x033, 0x00000021, @@ -12458,6 +20431,29 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000DF4, 0x033, 0x0000002A, 0x03F, 0x00000DF7, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000020, 0x03F, 0x00000467, @@ -12504,7 +20500,214 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000DF4, 0x033, 0x0000002A, 0x03F, 0x00000DF7, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000020, 0x03F, 0x00000467, 0x033, 0x00000021, @@ -12527,7 +20730,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000DF4, 0x033, 0x0000002A, 0x03F, 0x00000DF7, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000020, 0x03F, 0x00000467, 0x033, 0x00000021, @@ -12550,7 +20753,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000DF4, 0x033, 0x0000002A, 0x03F, 0x00000DF7, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000020, 0x03F, 0x00000467, 0x033, 0x00000021, @@ -12573,7 +20776,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000DF4, 0x033, 0x0000002A, 0x03F, 0x00000DF7, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000020, 0x03F, 0x00000467, 0x033, 0x00000021, @@ -12596,7 +20799,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000DF4, 0x033, 0x0000002A, 0x03F, 0x00000DF7, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000020, 0x03F, 0x00000467, 0x033, 0x00000021, @@ -12619,7 +20822,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000DF4, 0x033, 0x0000002A, 0x03F, 0x00000DF7, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000020, 0x03F, 0x00000467, 0x033, 0x00000021, @@ -12642,7 +20845,7 @@ static const u32 rtw8822c_rf_a[] = { 0x03F, 0x00000DF4, 0x033, 0x0000002A, 0x03F, 0x00000DF7, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000020, 0x03F, 0x00000467, 0x033, 0x00000021, @@ -12698,7 +20901,11 @@ static const u32 rtw8822c_rf_a[] = { 0x0B0, 0x0001F0FC, 0x0B1, 0x0007DBE4, 0x0B2, 0x00022400, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x0007C760, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x0007C760, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x0007C760, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x0007C760, @@ -12716,6 +20923,8 @@ static const u32 rtw8822c_rf_a[] = { 0x0B3, 0x000FC760, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x000FC760, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x000FC760, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -12730,31 +20939,93 @@ static const u32 rtw8822c_rf_a[] = { 0x0B3, 0x000FC760, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x000FC760, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x000FC760, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x000FC760, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, 0xA0000000, 0x00000000, 0x0B3, 0x0007C760, 0xB0000000, 0x00000000, 0x0B4, 0x00099D40, 0x0B5, 0x0004103F, - 0x83000003, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000187F8, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000187F8, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000187F8, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000187F8, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000187F8, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000187F8, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000187F8, + 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000187F8, + 0x93000003, 0x00000000, 0x40000000, 0x00000000, 0x0B6, 0x000387F8, 0x93000004, 0x00000000, 0x40000000, 0x00000000, 0x0B6, 0x000387F8, + 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000187F8, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000187F8, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x0B6, 0x000387F8, 0x93000016, 0x00000000, 0x40000000, 0x00000000, 0x0B6, 0x000387F8, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000187F8, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000187F8, 0x94000003, 0x00000000, 0x40000000, 0x00000000, 0x0B6, 0x000387F8, 0x94000004, 0x00000000, 0x40000000, 0x00000000, 0x0B6, 0x000387F8, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000187F8, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000187F8, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x0B6, 0x000387F8, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x0B6, 0x000387F8, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000187F8, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000187F8, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000387F8, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000387F8, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000187F8, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000187F8, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000387F8, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x0B6, 0x000387F8, 0xA0000000, 0x00000000, 0x0B6, 0x000187F8, 0xB0000000, 0x00000000, @@ -12769,7 +21040,11 @@ static const u32 rtw8822c_rf_a[] = { 0x0CA, 0x00080001, 0x0FE, 0x00000000, 0x0B0, 0x0001F0F8, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x0007C700, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x0007C700, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x0007C700, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x0007C700, @@ -12787,6 +21062,8 @@ static const u32 rtw8822c_rf_a[] = { 0x0B3, 0x000FC760, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x000FC760, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x000FC760, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -12801,10 +21078,28 @@ static const u32 rtw8822c_rf_a[] = { 0x0B3, 0x000FC760, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x000FC760, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x000FC760, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x000FC760, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, 0xA0000000, 0x00000000, 0x0B3, 0x0007C700, 0xB0000000, 0x00000000, @@ -12812,7 +21107,11 @@ static const u32 rtw8822c_rf_a[] = { 0xFFE, 0x00000000, 0xFFE, 0x00000000, 0xFFE, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x0007C760, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x0007C760, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x0007C760, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x0007C760, @@ -12830,6 +21129,8 @@ static const u32 rtw8822c_rf_a[] = { 0x0B3, 0x000FC760, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x000FC760, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x000FC760, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -12844,10 +21145,28 @@ static const u32 rtw8822c_rf_a[] = { 0x0B3, 0x000FC760, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x000FC760, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x000FC760, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x0B3, 0x000FC760, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x0B3, 0x000FC760, 0xA0000000, 0x00000000, 0x0B3, 0x0007C760, 0xB0000000, 0x00000000, @@ -12871,7 +21190,19 @@ static const u32 rtw8822c_rf_a[] = { 0x033, 0x00000001, 0x03F, 0x0000000F, 0x0ED, 0x00000000, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x0DD, 0x00000500, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x0DD, 0x00000500, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x0DD, 0x00000500, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x0DD, 0x00000500, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x0DD, 0x00000500, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x0DD, 0x00000500, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, 0x0DD, 0x00000540, 0x93000002, 0x00000000, 0x40000000, 0x00000000, 0x0DD, 0x00000540, @@ -12881,6 +21212,8 @@ static const u32 rtw8822c_rf_a[] = { 0x0DD, 0x00000540, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x0DD, 0x00000540, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x0DD, 0x00000540, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x0DD, 0x00000540, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -12895,10 +21228,28 @@ static const u32 rtw8822c_rf_a[] = { 0x0DD, 0x00000540, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x0DD, 0x00000540, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x0DD, 0x00000540, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x0DD, 0x00000540, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x0DD, 0x00000540, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x0DD, 0x00000540, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x0DD, 0x00000540, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x0DD, 0x00000540, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x0DD, 0x00000540, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x0DD, 0x00000540, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x0DD, 0x00000540, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x0DD, 0x00000540, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x0DD, 0x00000540, 0xA0000000, 0x00000000, 0x0DD, 0x00000500, 0xB0000000, 0x00000000, @@ -13008,7 +21359,19 @@ static const u32 rtw8822c_rf_b[] = { 0x093, 0x0008483F, 0x0EF, 0x00080000, 0x033, 0x00000001, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00091230, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00091230, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00091230, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00091230, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00091230, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00091230, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0009123E, 0x93000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0009123E, @@ -13018,6 +21381,8 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0009123E, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0009123E, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0009123E, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0009123E, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -13032,16 +21397,38 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0009123E, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0009123E, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0009123E, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0009123E, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0009123E, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0009123E, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0009123E, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0009123E, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0009123E, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0009123E, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0009123E, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0009123E, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0009123E, 0xA0000000, 0x00000000, 0x03F, 0x00091230, 0xB0000000, 0x00000000, 0x0EF, 0x00000000, 0x0DE, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x08E, 0x000B9140, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x08E, 0x000B9140, @@ -13059,6 +21446,8 @@ static const u32 rtw8822c_rf_b[] = { 0x08E, 0x000A5540, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x08E, 0x000A5540, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x08E, 0x000A5540, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -13073,10 +21462,28 @@ static const u32 rtw8822c_rf_b[] = { 0x08E, 0x000A5540, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x08E, 0x000A5540, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x08E, 0x000A5540, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x08E, 0x000A5540, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x08E, 0x000A5540, 0xA0000000, 0x00000000, 0x08E, 0x000A5540, 0xB0000000, 0x00000000, @@ -13084,7 +21491,25 @@ static const u32 rtw8822c_rf_b[] = { 0x081, 0x0002FC01, 0x081, 0x0003FC01, 0x085, 0x0006A06C, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000003F, + 0x033, 0x00000001, + 0x03F, 0x0000003F, + 0x033, 0x00000002, + 0x03F, 0x0000003F, + 0x0EE, 0x00000000, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000003F, + 0x033, 0x00000001, + 0x03F, 0x0000003F, + 0x033, 0x00000002, + 0x03F, 0x0000003F, + 0x0EE, 0x00000000, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x0EE, 0x00000010, 0x033, 0x00000001, 0x03F, 0x0000002A, @@ -13130,133 +21555,691 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0000002A, 0x0EE, 0x00000000, 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x0EE, 0x00000010, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000002, - 0x03F, 0x0000002A, - 0x0EE, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000001, + 0x03F, 0x0000002A, + 0x033, 0x00000002, + 0x03F, 0x0000002A, + 0x0EE, 0x00000000, + 0xA0000000, 0x00000000, + 0x0EE, 0x00000010, + 0x033, 0x00000001, + 0x03F, 0x0000003F, + 0x033, 0x00000001, + 0x03F, 0x0000003F, + 0x033, 0x00000002, + 0x03F, 0x0000003F, + 0x0EE, 0x00000000, + 0xB0000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773E8, + 0x033, 0x0000000E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000D, + 0x03F, 0x00000380, + 0x033, 0x0000000C, + 0x03F, 0x000FF380, + 0x033, 0x0000000B, + 0x03F, 0x00000300, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773E8, + 0x033, 0x0000000E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000D, + 0x03F, 0x00000380, + 0x033, 0x0000000C, + 0x03F, 0x000FF380, + 0x033, 0x0000000B, + 0x03F, 0x00000300, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x0EE, 0x00000010, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000002, - 0x03F, 0x0000002A, - 0x0EE, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x00000287, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000207, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x0EE, 0x00000010, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000002, - 0x03F, 0x0000002A, - 0x0EE, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x00000287, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000207, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x0EE, 0x00000010, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000002, - 0x03F, 0x0000002A, - 0x0EE, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x0EE, 0x00000010, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000002, - 0x03F, 0x0000002A, - 0x0EE, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x00000287, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000207, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x0EE, 0x00000010, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000002, - 0x03F, 0x0000002A, - 0x0EE, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x00000287, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000207, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x0EE, 0x00000010, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000002, - 0x03F, 0x0000002A, - 0x0EE, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x0EE, 0x00000010, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000002, - 0x03F, 0x0000002A, - 0x0EE, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x0EE, 0x00000010, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000002, - 0x03F, 0x0000002A, - 0x0EE, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x00000287, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000207, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x0EE, 0x00000010, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000002, - 0x03F, 0x0000002A, - 0x0EE, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x00000287, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000207, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x0EE, 0x00000010, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000002, - 0x03F, 0x0000002A, - 0x0EE, 0x00000000, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x0EE, 0x00000010, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000002, - 0x03F, 0x0000002A, - 0x0EE, 0x00000000, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x0EE, 0x00000010, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000001, - 0x03F, 0x0000002A, - 0x033, 0x00000002, - 0x03F, 0x0000002A, - 0x0EE, 0x00000000, - 0xA0000000, 0x00000000, - 0x0EE, 0x00000010, - 0x033, 0x00000001, - 0x03F, 0x0000003F, - 0x033, 0x00000001, - 0x03F, 0x0000003F, - 0x033, 0x00000002, - 0x03F, 0x0000003F, - 0x0EE, 0x00000000, - 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00010000, 0x033, 0x0000000F, 0x03F, 0x000773C0, @@ -13282,7 +22265,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000004, 0x03F, 0x00000040, - 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00010000, 0x033, 0x0000000F, 0x03F, 0x000773C0, @@ -13308,7 +22291,85 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000004, 0x03F, 0x00000040, - 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x00000287, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000207, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x00000287, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000207, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000280, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00010000, 0x033, 0x0000000F, 0x03F, 0x000773C0, @@ -13334,7 +22395,33 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000004, 0x03F, 0x00000040, - 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00010000, + 0x033, 0x0000000F, + 0x03F, 0x000773C0, + 0x033, 0x0000000E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000000D, + 0x03F, 0x000773E8, + 0x033, 0x0000000C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000000B, + 0x03F, 0x00000287, + 0x033, 0x0000000A, + 0x03F, 0x000002A8, + 0x033, 0x00000009, + 0x03F, 0x00000207, + 0x033, 0x00000008, + 0x03F, 0x000FF280, + 0x033, 0x00000007, + 0x03F, 0x00000200, + 0x033, 0x00000006, + 0x03F, 0x000001C0, + 0x033, 0x00000005, + 0x03F, 0x00000180, + 0x033, 0x00000004, + 0x03F, 0x00000040, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00010000, 0x033, 0x0000000F, 0x03F, 0x000773C0, @@ -13345,11 +22432,11 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000000C, 0x03F, 0x000FF3E8, 0x033, 0x0000000B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000287, 0x033, 0x0000000A, 0x03F, 0x000002A8, 0x033, 0x00000009, - 0x03F, 0x00000280, + 0x03F, 0x00000207, 0x033, 0x00000008, 0x03F, 0x000FF280, 0x033, 0x00000007, @@ -13360,7 +22447,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000004, 0x03F, 0x00000040, - 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00010000, 0x033, 0x0000000F, 0x03F, 0x000773C0, @@ -13386,7 +22473,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000004, 0x03F, 0x00000040, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00010000, 0x033, 0x0000000F, 0x03F, 0x000773C0, @@ -13412,7 +22499,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000004, 0x03F, 0x00000040, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00010000, 0x033, 0x0000000F, 0x03F, 0x000773C0, @@ -13438,7 +22525,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000004, 0x03F, 0x00000040, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00010000, 0x033, 0x0000000F, 0x03F, 0x000773C0, @@ -13464,18 +22551,18 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000004, 0x03F, 0x00000040, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0xA0000000, 0x00000000, 0x0EF, 0x00010000, 0x033, 0x0000000F, - 0x03F, 0x000773C0, + 0x03F, 0x000773E8, 0x033, 0x0000000E, - 0x03F, 0x000FF3C0, + 0x03F, 0x000FF3A0, 0x033, 0x0000000D, - 0x03F, 0x000773E8, + 0x03F, 0x00000380, 0x033, 0x0000000C, - 0x03F, 0x000FF3E8, + 0x03F, 0x000FF380, 0x033, 0x0000000B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000300, 0x033, 0x0000000A, 0x03F, 0x000002A8, 0x033, 0x00000009, @@ -13490,270 +22577,560 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000004, 0x03F, 0x00000040, + 0xB0000000, 0x00000000, + 0x033, 0x00000003, + 0x03F, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773E8, + 0x033, 0x0000001E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001D, + 0x03F, 0x00000380, + 0x033, 0x0000001C, + 0x03F, 0x000FF380, + 0x033, 0x0000001B, + 0x03F, 0x00000300, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773E8, + 0x033, 0x0000001E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001D, + 0x03F, 0x00000380, + 0x033, 0x0000001C, + 0x03F, 0x000FF380, + 0x033, 0x0000001B, + 0x03F, 0x00000300, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x00000287, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000207, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x00000287, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000207, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00010000, - 0x033, 0x0000000F, + 0x033, 0x0000001F, 0x03F, 0x000773C0, - 0x033, 0x0000000E, + 0x033, 0x0000001E, 0x03F, 0x000FF3C0, - 0x033, 0x0000000D, + 0x033, 0x0000001D, 0x03F, 0x000773E8, - 0x033, 0x0000000C, + 0x033, 0x0000001C, 0x03F, 0x000FF3E8, - 0x033, 0x0000000B, + 0x033, 0x0000001B, 0x03F, 0x00000287, - 0x033, 0x0000000A, + 0x033, 0x0000001A, 0x03F, 0x000002A8, - 0x033, 0x00000009, + 0x033, 0x00000019, 0x03F, 0x00000207, - 0x033, 0x00000008, + 0x033, 0x00000018, 0x03F, 0x000FF280, - 0x033, 0x00000007, + 0x033, 0x00000017, 0x03F, 0x00000200, - 0x033, 0x00000006, + 0x033, 0x00000016, 0x03F, 0x000001C0, - 0x033, 0x00000005, + 0x033, 0x00000015, 0x03F, 0x00000180, - 0x033, 0x00000004, + 0x033, 0x00000014, 0x03F, 0x00000040, 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00010000, - 0x033, 0x0000000F, + 0x033, 0x0000001F, 0x03F, 0x000773C0, - 0x033, 0x0000000E, + 0x033, 0x0000001E, 0x03F, 0x000FF3C0, - 0x033, 0x0000000D, + 0x033, 0x0000001D, 0x03F, 0x000773E8, - 0x033, 0x0000000C, + 0x033, 0x0000001C, 0x03F, 0x000FF3E8, - 0x033, 0x0000000B, + 0x033, 0x0000001B, 0x03F, 0x00000287, - 0x033, 0x0000000A, + 0x033, 0x0000001A, 0x03F, 0x000002A8, - 0x033, 0x00000009, + 0x033, 0x00000019, 0x03F, 0x00000207, - 0x033, 0x00000008, + 0x033, 0x00000018, 0x03F, 0x000FF280, - 0x033, 0x00000007, + 0x033, 0x00000017, 0x03F, 0x00000200, - 0x033, 0x00000006, + 0x033, 0x00000016, 0x03F, 0x000001C0, - 0x033, 0x00000005, + 0x033, 0x00000015, 0x03F, 0x00000180, - 0x033, 0x00000004, + 0x033, 0x00000014, 0x03F, 0x00000040, 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00010000, - 0x033, 0x0000000F, + 0x033, 0x0000001F, 0x03F, 0x000773C0, - 0x033, 0x0000000E, + 0x033, 0x0000001E, 0x03F, 0x000FF3C0, - 0x033, 0x0000000D, + 0x033, 0x0000001D, 0x03F, 0x000773E8, - 0x033, 0x0000000C, + 0x033, 0x0000001C, 0x03F, 0x000FF3E8, - 0x033, 0x0000000B, + 0x033, 0x0000001B, 0x03F, 0x000FF3A0, - 0x033, 0x0000000A, + 0x033, 0x0000001A, 0x03F, 0x000002A8, - 0x033, 0x00000009, + 0x033, 0x00000019, 0x03F, 0x00000280, - 0x033, 0x00000008, + 0x033, 0x00000018, 0x03F, 0x000FF280, - 0x033, 0x00000007, + 0x033, 0x00000017, 0x03F, 0x00000200, - 0x033, 0x00000006, + 0x033, 0x00000016, 0x03F, 0x000001C0, - 0x033, 0x00000005, + 0x033, 0x00000015, 0x03F, 0x00000180, - 0x033, 0x00000004, + 0x033, 0x00000014, 0x03F, 0x00000040, 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00010000, - 0x033, 0x0000000F, + 0x033, 0x0000001F, 0x03F, 0x000773C0, - 0x033, 0x0000000E, + 0x033, 0x0000001E, 0x03F, 0x000FF3C0, - 0x033, 0x0000000D, + 0x033, 0x0000001D, 0x03F, 0x000773E8, - 0x033, 0x0000000C, + 0x033, 0x0000001C, 0x03F, 0x000FF3E8, - 0x033, 0x0000000B, + 0x033, 0x0000001B, 0x03F, 0x000FF3A0, - 0x033, 0x0000000A, + 0x033, 0x0000001A, 0x03F, 0x000002A8, - 0x033, 0x00000009, + 0x033, 0x00000019, 0x03F, 0x00000280, - 0x033, 0x00000008, + 0x033, 0x00000018, 0x03F, 0x000FF280, - 0x033, 0x00000007, + 0x033, 0x00000017, 0x03F, 0x00000200, - 0x033, 0x00000006, + 0x033, 0x00000016, 0x03F, 0x000001C0, - 0x033, 0x00000005, + 0x033, 0x00000015, 0x03F, 0x00000180, - 0x033, 0x00000004, + 0x033, 0x00000014, 0x03F, 0x00000040, 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00010000, - 0x033, 0x0000000F, + 0x033, 0x0000001F, 0x03F, 0x000773C0, - 0x033, 0x0000000E, + 0x033, 0x0000001E, 0x03F, 0x000FF3C0, - 0x033, 0x0000000D, + 0x033, 0x0000001D, 0x03F, 0x000773E8, - 0x033, 0x0000000C, + 0x033, 0x0000001C, 0x03F, 0x000FF3E8, - 0x033, 0x0000000B, + 0x033, 0x0000001B, 0x03F, 0x00000287, - 0x033, 0x0000000A, + 0x033, 0x0000001A, 0x03F, 0x000002A8, - 0x033, 0x00000009, + 0x033, 0x00000019, 0x03F, 0x00000207, - 0x033, 0x00000008, + 0x033, 0x00000018, 0x03F, 0x000FF280, - 0x033, 0x00000007, + 0x033, 0x00000017, 0x03F, 0x00000200, - 0x033, 0x00000006, + 0x033, 0x00000016, 0x03F, 0x000001C0, - 0x033, 0x00000005, + 0x033, 0x00000015, 0x03F, 0x00000180, - 0x033, 0x00000004, + 0x033, 0x00000014, 0x03F, 0x00000040, 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00010000, - 0x033, 0x0000000F, + 0x033, 0x0000001F, 0x03F, 0x000773C0, - 0x033, 0x0000000E, + 0x033, 0x0000001E, 0x03F, 0x000FF3C0, - 0x033, 0x0000000D, + 0x033, 0x0000001D, 0x03F, 0x000773E8, - 0x033, 0x0000000C, + 0x033, 0x0000001C, 0x03F, 0x000FF3E8, - 0x033, 0x0000000B, + 0x033, 0x0000001B, 0x03F, 0x00000287, - 0x033, 0x0000000A, + 0x033, 0x0000001A, 0x03F, 0x000002A8, - 0x033, 0x00000009, + 0x033, 0x00000019, 0x03F, 0x00000207, - 0x033, 0x00000008, + 0x033, 0x00000018, 0x03F, 0x000FF280, - 0x033, 0x00000007, + 0x033, 0x00000017, 0x03F, 0x00000200, - 0x033, 0x00000006, + 0x033, 0x00000016, 0x03F, 0x000001C0, - 0x033, 0x00000005, + 0x033, 0x00000015, 0x03F, 0x00000180, - 0x033, 0x00000004, + 0x033, 0x00000014, 0x03F, 0x00000040, 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00010000, - 0x033, 0x0000000F, + 0x033, 0x0000001F, 0x03F, 0x000773C0, - 0x033, 0x0000000E, + 0x033, 0x0000001E, 0x03F, 0x000FF3C0, - 0x033, 0x0000000D, + 0x033, 0x0000001D, 0x03F, 0x000773E8, - 0x033, 0x0000000C, + 0x033, 0x0000001C, 0x03F, 0x000FF3E8, - 0x033, 0x0000000B, + 0x033, 0x0000001B, 0x03F, 0x000FF3A0, - 0x033, 0x0000000A, + 0x033, 0x0000001A, 0x03F, 0x000002A8, - 0x033, 0x00000009, + 0x033, 0x00000019, 0x03F, 0x00000280, - 0x033, 0x00000008, + 0x033, 0x00000018, 0x03F, 0x000FF280, - 0x033, 0x00000007, + 0x033, 0x00000017, + 0x03F, 0x00000200, + 0x033, 0x00000016, + 0x03F, 0x000001C0, + 0x033, 0x00000015, + 0x03F, 0x00000180, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x03F, 0x000773C0, + 0x033, 0x0000001E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000001D, + 0x03F, 0x000773E8, + 0x033, 0x0000001C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000001B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000001A, + 0x03F, 0x000002A8, + 0x033, 0x00000019, + 0x03F, 0x00000280, + 0x033, 0x00000018, + 0x03F, 0x000FF280, + 0x033, 0x00000017, 0x03F, 0x00000200, - 0x033, 0x00000006, + 0x033, 0x00000016, 0x03F, 0x000001C0, - 0x033, 0x00000005, + 0x033, 0x00000015, 0x03F, 0x00000180, - 0x033, 0x00000004, + 0x033, 0x00000014, 0x03F, 0x00000040, 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00010000, - 0x033, 0x0000000F, + 0x033, 0x0000001F, 0x03F, 0x000773C0, - 0x033, 0x0000000E, + 0x033, 0x0000001E, 0x03F, 0x000FF3C0, - 0x033, 0x0000000D, + 0x033, 0x0000001D, 0x03F, 0x000773E8, - 0x033, 0x0000000C, + 0x033, 0x0000001C, 0x03F, 0x000FF3E8, - 0x033, 0x0000000B, + 0x033, 0x0000001B, 0x03F, 0x00000287, - 0x033, 0x0000000A, + 0x033, 0x0000001A, 0x03F, 0x000002A8, - 0x033, 0x00000009, + 0x033, 0x00000019, 0x03F, 0x00000207, - 0x033, 0x00000008, + 0x033, 0x00000018, 0x03F, 0x000FF280, - 0x033, 0x00000007, + 0x033, 0x00000017, 0x03F, 0x00000200, - 0x033, 0x00000006, + 0x033, 0x00000016, 0x03F, 0x000001C0, - 0x033, 0x00000005, + 0x033, 0x00000015, 0x03F, 0x00000180, - 0x033, 0x00000004, + 0x033, 0x00000014, 0x03F, 0x00000040, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x0EF, 0x00010000, - 0x033, 0x0000000F, + 0x033, 0x0000001F, 0x03F, 0x000773C0, - 0x033, 0x0000000E, + 0x033, 0x0000001E, 0x03F, 0x000FF3C0, - 0x033, 0x0000000D, + 0x033, 0x0000001D, 0x03F, 0x000773E8, - 0x033, 0x0000000C, + 0x033, 0x0000001C, 0x03F, 0x000FF3E8, - 0x033, 0x0000000B, + 0x033, 0x0000001B, 0x03F, 0x00000287, - 0x033, 0x0000000A, + 0x033, 0x0000001A, 0x03F, 0x000002A8, - 0x033, 0x00000009, + 0x033, 0x00000019, 0x03F, 0x00000207, - 0x033, 0x00000008, - 0x03F, 0x000FF280, - 0x033, 0x00000007, - 0x03F, 0x00000200, - 0x033, 0x00000006, - 0x03F, 0x000001C0, - 0x033, 0x00000005, - 0x03F, 0x00000180, - 0x033, 0x00000004, - 0x03F, 0x00000040, - 0xA0000000, 0x00000000, - 0x0EF, 0x00010000, - 0x033, 0x0000000F, - 0x03F, 0x000773E8, - 0x033, 0x0000000E, - 0x03F, 0x000FF3A0, - 0x033, 0x0000000D, - 0x03F, 0x00000380, - 0x033, 0x0000000C, - 0x03F, 0x000FF380, - 0x033, 0x0000000B, - 0x03F, 0x00000300, - 0x033, 0x0000000A, - 0x03F, 0x000002A8, - 0x033, 0x00000009, - 0x03F, 0x00000280, - 0x033, 0x00000008, + 0x033, 0x00000018, 0x03F, 0x000FF280, - 0x033, 0x00000007, + 0x033, 0x00000017, 0x03F, 0x00000200, - 0x033, 0x00000006, + 0x033, 0x00000016, 0x03F, 0x000001C0, - 0x033, 0x00000005, + 0x033, 0x00000015, 0x03F, 0x00000180, - 0x033, 0x00000004, + 0x033, 0x00000014, 0x03F, 0x00000040, - 0xB0000000, 0x00000000, - 0x033, 0x00000003, - 0x03F, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000001F, 0x03F, 0x000773C0, 0x033, 0x0000001E, @@ -13778,7 +23155,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000014, 0x03F, 0x00000040, - 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000001F, 0x03F, 0x000773C0, 0x033, 0x0000001E, @@ -13803,7 +23180,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000014, 0x03F, 0x00000040, - 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000001F, 0x03F, 0x000773C0, 0x033, 0x0000001E, @@ -13813,11 +23190,11 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000001C, 0x03F, 0x000FF3E8, 0x033, 0x0000001B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000287, 0x033, 0x0000001A, 0x03F, 0x000002A8, 0x033, 0x00000019, - 0x03F, 0x00000280, + 0x03F, 0x00000207, 0x033, 0x00000018, 0x03F, 0x000FF280, 0x033, 0x00000017, @@ -13828,7 +23205,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000014, 0x03F, 0x00000040, - 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000001F, 0x03F, 0x000773C0, 0x033, 0x0000001E, @@ -13838,11 +23215,11 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000001C, 0x03F, 0x000FF3E8, 0x033, 0x0000001B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000287, 0x033, 0x0000001A, 0x03F, 0x000002A8, 0x033, 0x00000019, - 0x03F, 0x00000280, + 0x03F, 0x00000207, 0x033, 0x00000018, 0x03F, 0x000FF280, 0x033, 0x00000017, @@ -13853,7 +23230,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000014, 0x03F, 0x00000040, - 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000001F, 0x03F, 0x000773C0, 0x033, 0x0000001E, @@ -13878,7 +23255,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000014, 0x03F, 0x00000040, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000001F, 0x03F, 0x000773C0, 0x033, 0x0000001E, @@ -13903,7 +23280,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000014, 0x03F, 0x00000040, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000001F, 0x03F, 0x000773C0, 0x033, 0x0000001E, @@ -13928,7 +23305,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000014, 0x03F, 0x00000040, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000001F, 0x03F, 0x000773C0, 0x033, 0x0000001E, @@ -13953,17 +23330,17 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000014, 0x03F, 0x00000040, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0xA0000000, 0x00000000, 0x033, 0x0000001F, - 0x03F, 0x000773C0, + 0x03F, 0x000773E8, 0x033, 0x0000001E, - 0x03F, 0x000FF3C0, + 0x03F, 0x000FF3A0, 0x033, 0x0000001D, - 0x03F, 0x000773E8, + 0x03F, 0x00000380, 0x033, 0x0000001C, - 0x03F, 0x000FF3E8, + 0x03F, 0x000FF380, 0x033, 0x0000001B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000300, 0x033, 0x0000001A, 0x03F, 0x000002A8, 0x033, 0x00000019, @@ -13976,262 +23353,662 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x000001C0, 0x033, 0x00000015, 0x03F, 0x00000180, - 0x033, 0x00000014, + 0x033, 0x00000014, + 0x03F, 0x00000040, + 0xB0000000, 0x00000000, + 0x033, 0x00000013, + 0x03F, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773E8, + 0x033, 0x0000002E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002D, + 0x03F, 0x00000380, + 0x033, 0x0000002C, + 0x03F, 0x000FF380, + 0x033, 0x0000002B, + 0x03F, 0x00000300, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773E8, + 0x033, 0x0000002E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002D, + 0x03F, 0x00000380, + 0x033, 0x0000002C, + 0x03F, 0x000FF380, + 0x033, 0x0000002B, + 0x03F, 0x00000300, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x00000287, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000207, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x00000287, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000207, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x00000287, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000207, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x00000287, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000207, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, + 0x03F, 0x00000040, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, + 0x03F, 0x000773E8, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, + 0x03F, 0x000002A8, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, + 0x03F, 0x000FF280, + 0x033, 0x00000027, + 0x03F, 0x00000200, + 0x033, 0x00000026, + 0x03F, 0x000001C0, + 0x033, 0x00000025, + 0x03F, 0x00000180, + 0x033, 0x00000024, 0x03F, 0x00000040, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000001F, + 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, 0x03F, 0x000773C0, - 0x033, 0x0000001E, + 0x033, 0x0000002E, 0x03F, 0x000FF3C0, - 0x033, 0x0000001D, + 0x033, 0x0000002D, 0x03F, 0x000773E8, - 0x033, 0x0000001C, + 0x033, 0x0000002C, 0x03F, 0x000FF3E8, - 0x033, 0x0000001B, + 0x033, 0x0000002B, 0x03F, 0x00000287, - 0x033, 0x0000001A, + 0x033, 0x0000002A, 0x03F, 0x000002A8, - 0x033, 0x00000019, + 0x033, 0x00000029, 0x03F, 0x00000207, - 0x033, 0x00000018, + 0x033, 0x00000028, 0x03F, 0x000FF280, - 0x033, 0x00000017, + 0x033, 0x00000027, 0x03F, 0x00000200, - 0x033, 0x00000016, + 0x033, 0x00000026, 0x03F, 0x000001C0, - 0x033, 0x00000015, + 0x033, 0x00000025, 0x03F, 0x00000180, - 0x033, 0x00000014, + 0x033, 0x00000024, 0x03F, 0x00000040, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000001F, + 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, 0x03F, 0x000773C0, - 0x033, 0x0000001E, + 0x033, 0x0000002E, 0x03F, 0x000FF3C0, - 0x033, 0x0000001D, + 0x033, 0x0000002D, 0x03F, 0x000773E8, - 0x033, 0x0000001C, + 0x033, 0x0000002C, 0x03F, 0x000FF3E8, - 0x033, 0x0000001B, + 0x033, 0x0000002B, 0x03F, 0x00000287, - 0x033, 0x0000001A, + 0x033, 0x0000002A, 0x03F, 0x000002A8, - 0x033, 0x00000019, + 0x033, 0x00000029, 0x03F, 0x00000207, - 0x033, 0x00000018, + 0x033, 0x00000028, 0x03F, 0x000FF280, - 0x033, 0x00000017, + 0x033, 0x00000027, 0x03F, 0x00000200, - 0x033, 0x00000016, + 0x033, 0x00000026, 0x03F, 0x000001C0, - 0x033, 0x00000015, + 0x033, 0x00000025, 0x03F, 0x00000180, - 0x033, 0x00000014, + 0x033, 0x00000024, 0x03F, 0x00000040, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000001F, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, 0x03F, 0x000773C0, - 0x033, 0x0000001E, + 0x033, 0x0000002E, 0x03F, 0x000FF3C0, - 0x033, 0x0000001D, + 0x033, 0x0000002D, 0x03F, 0x000773E8, - 0x033, 0x0000001C, + 0x033, 0x0000002C, 0x03F, 0x000FF3E8, - 0x033, 0x0000001B, + 0x033, 0x0000002B, 0x03F, 0x000FF3A0, - 0x033, 0x0000001A, + 0x033, 0x0000002A, 0x03F, 0x000002A8, - 0x033, 0x00000019, + 0x033, 0x00000029, 0x03F, 0x00000280, - 0x033, 0x00000018, + 0x033, 0x00000028, 0x03F, 0x000FF280, - 0x033, 0x00000017, + 0x033, 0x00000027, 0x03F, 0x00000200, - 0x033, 0x00000016, + 0x033, 0x00000026, 0x03F, 0x000001C0, - 0x033, 0x00000015, + 0x033, 0x00000025, 0x03F, 0x00000180, - 0x033, 0x00000014, + 0x033, 0x00000024, 0x03F, 0x00000040, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000001F, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, 0x03F, 0x000773C0, - 0x033, 0x0000001E, + 0x033, 0x0000002E, 0x03F, 0x000FF3C0, - 0x033, 0x0000001D, + 0x033, 0x0000002D, 0x03F, 0x000773E8, - 0x033, 0x0000001C, + 0x033, 0x0000002C, 0x03F, 0x000FF3E8, - 0x033, 0x0000001B, + 0x033, 0x0000002B, 0x03F, 0x000FF3A0, - 0x033, 0x0000001A, + 0x033, 0x0000002A, 0x03F, 0x000002A8, - 0x033, 0x00000019, + 0x033, 0x00000029, 0x03F, 0x00000280, - 0x033, 0x00000018, + 0x033, 0x00000028, 0x03F, 0x000FF280, - 0x033, 0x00000017, + 0x033, 0x00000027, 0x03F, 0x00000200, - 0x033, 0x00000016, + 0x033, 0x00000026, 0x03F, 0x000001C0, - 0x033, 0x00000015, + 0x033, 0x00000025, 0x03F, 0x00000180, - 0x033, 0x00000014, + 0x033, 0x00000024, 0x03F, 0x00000040, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000001F, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, 0x03F, 0x000773C0, - 0x033, 0x0000001E, + 0x033, 0x0000002E, 0x03F, 0x000FF3C0, - 0x033, 0x0000001D, + 0x033, 0x0000002D, 0x03F, 0x000773E8, - 0x033, 0x0000001C, + 0x033, 0x0000002C, 0x03F, 0x000FF3E8, - 0x033, 0x0000001B, + 0x033, 0x0000002B, 0x03F, 0x00000287, - 0x033, 0x0000001A, + 0x033, 0x0000002A, 0x03F, 0x000002A8, - 0x033, 0x00000019, + 0x033, 0x00000029, 0x03F, 0x00000207, - 0x033, 0x00000018, + 0x033, 0x00000028, 0x03F, 0x000FF280, - 0x033, 0x00000017, + 0x033, 0x00000027, 0x03F, 0x00000200, - 0x033, 0x00000016, + 0x033, 0x00000026, 0x03F, 0x000001C0, - 0x033, 0x00000015, + 0x033, 0x00000025, 0x03F, 0x00000180, - 0x033, 0x00000014, + 0x033, 0x00000024, 0x03F, 0x00000040, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000001F, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, 0x03F, 0x000773C0, - 0x033, 0x0000001E, + 0x033, 0x0000002E, 0x03F, 0x000FF3C0, - 0x033, 0x0000001D, + 0x033, 0x0000002D, 0x03F, 0x000773E8, - 0x033, 0x0000001C, + 0x033, 0x0000002C, 0x03F, 0x000FF3E8, - 0x033, 0x0000001B, + 0x033, 0x0000002B, 0x03F, 0x00000287, - 0x033, 0x0000001A, + 0x033, 0x0000002A, 0x03F, 0x000002A8, - 0x033, 0x00000019, + 0x033, 0x00000029, 0x03F, 0x00000207, - 0x033, 0x00000018, + 0x033, 0x00000028, 0x03F, 0x000FF280, - 0x033, 0x00000017, + 0x033, 0x00000027, 0x03F, 0x00000200, - 0x033, 0x00000016, + 0x033, 0x00000026, 0x03F, 0x000001C0, - 0x033, 0x00000015, + 0x033, 0x00000025, 0x03F, 0x00000180, - 0x033, 0x00000014, + 0x033, 0x00000024, 0x03F, 0x00000040, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000001F, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, 0x03F, 0x000773C0, - 0x033, 0x0000001E, + 0x033, 0x0000002E, 0x03F, 0x000FF3C0, - 0x033, 0x0000001D, + 0x033, 0x0000002D, 0x03F, 0x000773E8, - 0x033, 0x0000001C, + 0x033, 0x0000002C, 0x03F, 0x000FF3E8, - 0x033, 0x0000001B, + 0x033, 0x0000002B, 0x03F, 0x000FF3A0, - 0x033, 0x0000001A, + 0x033, 0x0000002A, 0x03F, 0x000002A8, - 0x033, 0x00000019, + 0x033, 0x00000029, 0x03F, 0x00000280, - 0x033, 0x00000018, + 0x033, 0x00000028, 0x03F, 0x000FF280, - 0x033, 0x00000017, + 0x033, 0x00000027, 0x03F, 0x00000200, - 0x033, 0x00000016, + 0x033, 0x00000026, 0x03F, 0x000001C0, - 0x033, 0x00000015, + 0x033, 0x00000025, 0x03F, 0x00000180, - 0x033, 0x00000014, + 0x033, 0x00000024, 0x03F, 0x00000040, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000001F, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, 0x03F, 0x000773C0, - 0x033, 0x0000001E, + 0x033, 0x0000002E, 0x03F, 0x000FF3C0, - 0x033, 0x0000001D, + 0x033, 0x0000002D, 0x03F, 0x000773E8, - 0x033, 0x0000001C, + 0x033, 0x0000002C, 0x03F, 0x000FF3E8, - 0x033, 0x0000001B, - 0x03F, 0x00000287, - 0x033, 0x0000001A, + 0x033, 0x0000002B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000002A, 0x03F, 0x000002A8, - 0x033, 0x00000019, - 0x03F, 0x00000207, - 0x033, 0x00000018, + 0x033, 0x00000029, + 0x03F, 0x00000280, + 0x033, 0x00000028, 0x03F, 0x000FF280, - 0x033, 0x00000017, + 0x033, 0x00000027, 0x03F, 0x00000200, - 0x033, 0x00000016, + 0x033, 0x00000026, 0x03F, 0x000001C0, - 0x033, 0x00000015, + 0x033, 0x00000025, 0x03F, 0x00000180, - 0x033, 0x00000014, + 0x033, 0x00000024, 0x03F, 0x00000040, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000001F, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, 0x03F, 0x000773C0, - 0x033, 0x0000001E, + 0x033, 0x0000002E, 0x03F, 0x000FF3C0, - 0x033, 0x0000001D, + 0x033, 0x0000002D, 0x03F, 0x000773E8, - 0x033, 0x0000001C, + 0x033, 0x0000002C, 0x03F, 0x000FF3E8, - 0x033, 0x0000001B, + 0x033, 0x0000002B, 0x03F, 0x00000287, - 0x033, 0x0000001A, + 0x033, 0x0000002A, 0x03F, 0x000002A8, - 0x033, 0x00000019, + 0x033, 0x00000029, 0x03F, 0x00000207, - 0x033, 0x00000018, + 0x033, 0x00000028, 0x03F, 0x000FF280, - 0x033, 0x00000017, + 0x033, 0x00000027, 0x03F, 0x00000200, - 0x033, 0x00000016, + 0x033, 0x00000026, 0x03F, 0x000001C0, - 0x033, 0x00000015, + 0x033, 0x00000025, 0x03F, 0x00000180, - 0x033, 0x00000014, + 0x033, 0x00000024, 0x03F, 0x00000040, - 0xA0000000, 0x00000000, - 0x033, 0x0000001F, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000002F, + 0x03F, 0x000773C0, + 0x033, 0x0000002E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000002D, 0x03F, 0x000773E8, - 0x033, 0x0000001E, - 0x03F, 0x000FF3A0, - 0x033, 0x0000001D, - 0x03F, 0x00000380, - 0x033, 0x0000001C, - 0x03F, 0x000FF380, - 0x033, 0x0000001B, - 0x03F, 0x00000300, - 0x033, 0x0000001A, + 0x033, 0x0000002C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000002B, + 0x03F, 0x00000287, + 0x033, 0x0000002A, 0x03F, 0x000002A8, - 0x033, 0x00000019, - 0x03F, 0x00000280, - 0x033, 0x00000018, + 0x033, 0x00000029, + 0x03F, 0x00000207, + 0x033, 0x00000028, 0x03F, 0x000FF280, - 0x033, 0x00000017, + 0x033, 0x00000027, 0x03F, 0x00000200, - 0x033, 0x00000016, + 0x033, 0x00000026, 0x03F, 0x000001C0, - 0x033, 0x00000015, + 0x033, 0x00000025, 0x03F, 0x00000180, - 0x033, 0x00000014, + 0x033, 0x00000024, 0x03F, 0x00000040, - 0xB0000000, 0x00000000, - 0x033, 0x00000013, - 0x03F, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000002F, 0x03F, 0x000773C0, 0x033, 0x0000002E, @@ -14256,7 +24033,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000024, 0x03F, 0x00000040, - 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000002F, 0x03F, 0x000773C0, 0x033, 0x0000002E, @@ -14281,7 +24058,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000024, 0x03F, 0x00000040, - 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000002F, 0x03F, 0x000773C0, 0x033, 0x0000002E, @@ -14291,11 +24068,11 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000002C, 0x03F, 0x000FF3E8, 0x033, 0x0000002B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000287, 0x033, 0x0000002A, 0x03F, 0x000002A8, 0x033, 0x00000029, - 0x03F, 0x00000280, + 0x03F, 0x00000207, 0x033, 0x00000028, 0x03F, 0x000FF280, 0x033, 0x00000027, @@ -14306,7 +24083,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000024, 0x03F, 0x00000040, - 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000002F, 0x03F, 0x000773C0, 0x033, 0x0000002E, @@ -14316,11 +24093,11 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000002C, 0x03F, 0x000FF3E8, 0x033, 0x0000002B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000287, 0x033, 0x0000002A, 0x03F, 0x000002A8, 0x033, 0x00000029, - 0x03F, 0x00000280, + 0x03F, 0x00000207, 0x033, 0x00000028, 0x03F, 0x000FF280, 0x033, 0x00000027, @@ -14331,17 +24108,17 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000024, 0x03F, 0x00000040, - 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0xA0000000, 0x00000000, 0x033, 0x0000002F, - 0x03F, 0x000773C0, + 0x03F, 0x000773E8, 0x033, 0x0000002E, - 0x03F, 0x000FF3C0, + 0x03F, 0x000FF3A0, 0x033, 0x0000002D, - 0x03F, 0x000773E8, + 0x03F, 0x00000380, 0x033, 0x0000002C, - 0x03F, 0x000FF3E8, + 0x03F, 0x000FF380, 0x033, 0x0000002B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000300, 0x033, 0x0000002A, 0x03F, 0x000002A8, 0x033, 0x00000029, @@ -14356,360 +24133,560 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000024, 0x03F, 0x00000040, + 0xB0000000, 0x00000000, + 0x033, 0x00000023, + 0x03F, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773E8, + 0x033, 0x0000003E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000003D, + 0x03F, 0x00000380, + 0x033, 0x0000003C, + 0x03F, 0x000FF380, + 0x033, 0x0000003B, + 0x03F, 0x00000300, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000280, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773E8, + 0x033, 0x0000003E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000003D, + 0x03F, 0x00000380, + 0x033, 0x0000003C, + 0x03F, 0x000FF380, + 0x033, 0x0000003B, + 0x03F, 0x00000300, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000280, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, + 0x03F, 0x000773E8, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000280, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, + 0x03F, 0x000773E8, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000280, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, + 0x03F, 0x000773E8, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000280, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, + 0x03F, 0x000773E8, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000280, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, + 0x03F, 0x000773E8, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000280, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000002F, + 0x033, 0x0000003F, 0x03F, 0x000773C0, - 0x033, 0x0000002E, + 0x033, 0x0000003E, 0x03F, 0x000FF3C0, - 0x033, 0x0000002D, + 0x033, 0x0000003D, 0x03F, 0x000773E8, - 0x033, 0x0000002C, + 0x033, 0x0000003C, 0x03F, 0x000FF3E8, - 0x033, 0x0000002B, + 0x033, 0x0000003B, 0x03F, 0x000FF3A0, - 0x033, 0x0000002A, + 0x033, 0x0000003A, 0x03F, 0x000002A8, - 0x033, 0x00000029, + 0x033, 0x00000039, 0x03F, 0x00000280, - 0x033, 0x00000028, + 0x033, 0x00000038, + 0x03F, 0x000FF280, + 0x033, 0x00000037, + 0x03F, 0x00000200, + 0x033, 0x00000036, + 0x03F, 0x000001C0, + 0x033, 0x00000035, + 0x03F, 0x00000180, + 0x033, 0x00000034, + 0x03F, 0x00000040, + 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, + 0x03F, 0x000773E8, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x00000287, + 0x033, 0x0000003A, + 0x03F, 0x000002A8, + 0x033, 0x00000039, + 0x03F, 0x00000207, + 0x033, 0x00000038, 0x03F, 0x000FF280, - 0x033, 0x00000027, + 0x033, 0x00000037, 0x03F, 0x00000200, - 0x033, 0x00000026, + 0x033, 0x00000036, 0x03F, 0x000001C0, - 0x033, 0x00000025, + 0x033, 0x00000035, 0x03F, 0x00000180, - 0x033, 0x00000024, + 0x033, 0x00000034, 0x03F, 0x00000040, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000002F, + 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, 0x03F, 0x000773C0, - 0x033, 0x0000002E, + 0x033, 0x0000003E, 0x03F, 0x000FF3C0, - 0x033, 0x0000002D, + 0x033, 0x0000003D, 0x03F, 0x000773E8, - 0x033, 0x0000002C, + 0x033, 0x0000003C, 0x03F, 0x000FF3E8, - 0x033, 0x0000002B, + 0x033, 0x0000003B, 0x03F, 0x00000287, - 0x033, 0x0000002A, + 0x033, 0x0000003A, 0x03F, 0x000002A8, - 0x033, 0x00000029, + 0x033, 0x00000039, 0x03F, 0x00000207, - 0x033, 0x00000028, + 0x033, 0x00000038, 0x03F, 0x000FF280, - 0x033, 0x00000027, + 0x033, 0x00000037, 0x03F, 0x00000200, - 0x033, 0x00000026, + 0x033, 0x00000036, 0x03F, 0x000001C0, - 0x033, 0x00000025, + 0x033, 0x00000035, 0x03F, 0x00000180, - 0x033, 0x00000024, + 0x033, 0x00000034, 0x03F, 0x00000040, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000002F, + 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, 0x03F, 0x000773C0, - 0x033, 0x0000002E, + 0x033, 0x0000003E, 0x03F, 0x000FF3C0, - 0x033, 0x0000002D, + 0x033, 0x0000003D, 0x03F, 0x000773E8, - 0x033, 0x0000002C, + 0x033, 0x0000003C, 0x03F, 0x000FF3E8, - 0x033, 0x0000002B, - 0x03F, 0x00000287, - 0x033, 0x0000002A, + 0x033, 0x0000003B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000003A, 0x03F, 0x000002A8, - 0x033, 0x00000029, - 0x03F, 0x00000207, - 0x033, 0x00000028, + 0x033, 0x00000039, + 0x03F, 0x00000280, + 0x033, 0x00000038, 0x03F, 0x000FF280, - 0x033, 0x00000027, + 0x033, 0x00000037, 0x03F, 0x00000200, - 0x033, 0x00000026, + 0x033, 0x00000036, 0x03F, 0x000001C0, - 0x033, 0x00000025, + 0x033, 0x00000035, 0x03F, 0x00000180, - 0x033, 0x00000024, + 0x033, 0x00000034, 0x03F, 0x00000040, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000002F, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, 0x03F, 0x000773C0, - 0x033, 0x0000002E, + 0x033, 0x0000003E, 0x03F, 0x000FF3C0, - 0x033, 0x0000002D, + 0x033, 0x0000003D, 0x03F, 0x000773E8, - 0x033, 0x0000002C, + 0x033, 0x0000003C, 0x03F, 0x000FF3E8, - 0x033, 0x0000002B, + 0x033, 0x0000003B, 0x03F, 0x000FF3A0, - 0x033, 0x0000002A, + 0x033, 0x0000003A, 0x03F, 0x000002A8, - 0x033, 0x00000029, + 0x033, 0x00000039, 0x03F, 0x00000280, - 0x033, 0x00000028, + 0x033, 0x00000038, 0x03F, 0x000FF280, - 0x033, 0x00000027, + 0x033, 0x00000037, 0x03F, 0x00000200, - 0x033, 0x00000026, + 0x033, 0x00000036, 0x03F, 0x000001C0, - 0x033, 0x00000025, + 0x033, 0x00000035, 0x03F, 0x00000180, - 0x033, 0x00000024, + 0x033, 0x00000034, 0x03F, 0x00000040, 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000002F, + 0x033, 0x0000003F, 0x03F, 0x000773C0, - 0x033, 0x0000002E, + 0x033, 0x0000003E, 0x03F, 0x000FF3C0, - 0x033, 0x0000002D, + 0x033, 0x0000003D, 0x03F, 0x000773E8, - 0x033, 0x0000002C, + 0x033, 0x0000003C, 0x03F, 0x000FF3E8, - 0x033, 0x0000002B, + 0x033, 0x0000003B, 0x03F, 0x00000287, - 0x033, 0x0000002A, + 0x033, 0x0000003A, 0x03F, 0x000002A8, - 0x033, 0x00000029, + 0x033, 0x00000039, 0x03F, 0x00000207, - 0x033, 0x00000028, + 0x033, 0x00000038, 0x03F, 0x000FF280, - 0x033, 0x00000027, + 0x033, 0x00000037, 0x03F, 0x00000200, - 0x033, 0x00000026, + 0x033, 0x00000036, 0x03F, 0x000001C0, - 0x033, 0x00000025, + 0x033, 0x00000035, 0x03F, 0x00000180, - 0x033, 0x00000024, + 0x033, 0x00000034, 0x03F, 0x00000040, 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000002F, + 0x033, 0x0000003F, 0x03F, 0x000773C0, - 0x033, 0x0000002E, + 0x033, 0x0000003E, 0x03F, 0x000FF3C0, - 0x033, 0x0000002D, + 0x033, 0x0000003D, 0x03F, 0x000773E8, - 0x033, 0x0000002C, + 0x033, 0x0000003C, 0x03F, 0x000FF3E8, - 0x033, 0x0000002B, + 0x033, 0x0000003B, 0x03F, 0x00000287, - 0x033, 0x0000002A, + 0x033, 0x0000003A, 0x03F, 0x000002A8, - 0x033, 0x00000029, + 0x033, 0x00000039, 0x03F, 0x00000207, - 0x033, 0x00000028, + 0x033, 0x00000038, 0x03F, 0x000FF280, - 0x033, 0x00000027, + 0x033, 0x00000037, 0x03F, 0x00000200, - 0x033, 0x00000026, + 0x033, 0x00000036, 0x03F, 0x000001C0, - 0x033, 0x00000025, + 0x033, 0x00000035, 0x03F, 0x00000180, - 0x033, 0x00000024, + 0x033, 0x00000034, 0x03F, 0x00000040, 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000002F, + 0x033, 0x0000003F, 0x03F, 0x000773C0, - 0x033, 0x0000002E, + 0x033, 0x0000003E, 0x03F, 0x000FF3C0, - 0x033, 0x0000002D, + 0x033, 0x0000003D, 0x03F, 0x000773E8, - 0x033, 0x0000002C, + 0x033, 0x0000003C, 0x03F, 0x000FF3E8, - 0x033, 0x0000002B, + 0x033, 0x0000003B, 0x03F, 0x000FF3A0, - 0x033, 0x0000002A, + 0x033, 0x0000003A, 0x03F, 0x000002A8, - 0x033, 0x00000029, + 0x033, 0x00000039, 0x03F, 0x00000280, - 0x033, 0x00000028, + 0x033, 0x00000038, 0x03F, 0x000FF280, - 0x033, 0x00000027, + 0x033, 0x00000037, 0x03F, 0x00000200, - 0x033, 0x00000026, + 0x033, 0x00000036, 0x03F, 0x000001C0, - 0x033, 0x00000025, + 0x033, 0x00000035, 0x03F, 0x00000180, - 0x033, 0x00000024, + 0x033, 0x00000034, 0x03F, 0x00000040, 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000002F, + 0x033, 0x0000003F, 0x03F, 0x000773C0, - 0x033, 0x0000002E, + 0x033, 0x0000003E, 0x03F, 0x000FF3C0, - 0x033, 0x0000002D, + 0x033, 0x0000003D, 0x03F, 0x000773E8, - 0x033, 0x0000002C, + 0x033, 0x0000003C, 0x03F, 0x000FF3E8, - 0x033, 0x0000002B, + 0x033, 0x0000003B, 0x03F, 0x000FF3A0, - 0x033, 0x0000002A, + 0x033, 0x0000003A, 0x03F, 0x000002A8, - 0x033, 0x00000029, + 0x033, 0x00000039, 0x03F, 0x00000280, - 0x033, 0x00000028, + 0x033, 0x00000038, 0x03F, 0x000FF280, - 0x033, 0x00000027, + 0x033, 0x00000037, 0x03F, 0x00000200, - 0x033, 0x00000026, + 0x033, 0x00000036, 0x03F, 0x000001C0, - 0x033, 0x00000025, + 0x033, 0x00000035, 0x03F, 0x00000180, - 0x033, 0x00000024, + 0x033, 0x00000034, 0x03F, 0x00000040, 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000002F, + 0x033, 0x0000003F, 0x03F, 0x000773C0, - 0x033, 0x0000002E, + 0x033, 0x0000003E, 0x03F, 0x000FF3C0, - 0x033, 0x0000002D, + 0x033, 0x0000003D, 0x03F, 0x000773E8, - 0x033, 0x0000002C, + 0x033, 0x0000003C, 0x03F, 0x000FF3E8, - 0x033, 0x0000002B, + 0x033, 0x0000003B, 0x03F, 0x00000287, - 0x033, 0x0000002A, + 0x033, 0x0000003A, 0x03F, 0x000002A8, - 0x033, 0x00000029, + 0x033, 0x00000039, 0x03F, 0x00000207, - 0x033, 0x00000028, + 0x033, 0x00000038, 0x03F, 0x000FF280, - 0x033, 0x00000027, + 0x033, 0x00000037, 0x03F, 0x00000200, - 0x033, 0x00000026, + 0x033, 0x00000036, 0x03F, 0x000001C0, - 0x033, 0x00000025, + 0x033, 0x00000035, 0x03F, 0x00000180, - 0x033, 0x00000024, + 0x033, 0x00000034, 0x03F, 0x00000040, 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000002F, + 0x033, 0x0000003F, 0x03F, 0x000773C0, - 0x033, 0x0000002E, + 0x033, 0x0000003E, 0x03F, 0x000FF3C0, - 0x033, 0x0000002D, + 0x033, 0x0000003D, 0x03F, 0x000773E8, - 0x033, 0x0000002C, + 0x033, 0x0000003C, 0x03F, 0x000FF3E8, - 0x033, 0x0000002B, + 0x033, 0x0000003B, 0x03F, 0x00000287, - 0x033, 0x0000002A, + 0x033, 0x0000003A, 0x03F, 0x000002A8, - 0x033, 0x00000029, + 0x033, 0x00000039, 0x03F, 0x00000207, - 0x033, 0x00000028, + 0x033, 0x00000038, 0x03F, 0x000FF280, - 0x033, 0x00000027, + 0x033, 0x00000037, 0x03F, 0x00000200, - 0x033, 0x00000026, + 0x033, 0x00000036, 0x03F, 0x000001C0, - 0x033, 0x00000025, + 0x033, 0x00000035, 0x03F, 0x00000180, - 0x033, 0x00000024, + 0x033, 0x00000034, 0x03F, 0x00000040, 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000002F, + 0x033, 0x0000003F, 0x03F, 0x000773C0, - 0x033, 0x0000002E, + 0x033, 0x0000003E, 0x03F, 0x000FF3C0, - 0x033, 0x0000002D, + 0x033, 0x0000003D, 0x03F, 0x000773E8, - 0x033, 0x0000002C, + 0x033, 0x0000003C, 0x03F, 0x000FF3E8, - 0x033, 0x0000002B, + 0x033, 0x0000003B, 0x03F, 0x000FF3A0, - 0x033, 0x0000002A, + 0x033, 0x0000003A, 0x03F, 0x000002A8, - 0x033, 0x00000029, + 0x033, 0x00000039, 0x03F, 0x00000280, - 0x033, 0x00000028, + 0x033, 0x00000038, 0x03F, 0x000FF280, - 0x033, 0x00000027, + 0x033, 0x00000037, 0x03F, 0x00000200, - 0x033, 0x00000026, + 0x033, 0x00000036, 0x03F, 0x000001C0, - 0x033, 0x00000025, + 0x033, 0x00000035, 0x03F, 0x00000180, - 0x033, 0x00000024, + 0x033, 0x00000034, 0x03F, 0x00000040, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000002F, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, 0x03F, 0x000773C0, - 0x033, 0x0000002E, + 0x033, 0x0000003E, 0x03F, 0x000FF3C0, - 0x033, 0x0000002D, + 0x033, 0x0000003D, 0x03F, 0x000773E8, - 0x033, 0x0000002C, + 0x033, 0x0000003C, 0x03F, 0x000FF3E8, - 0x033, 0x0000002B, - 0x03F, 0x00000287, - 0x033, 0x0000002A, + 0x033, 0x0000003B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000003A, 0x03F, 0x000002A8, - 0x033, 0x00000029, - 0x03F, 0x00000207, - 0x033, 0x00000028, + 0x033, 0x00000039, + 0x03F, 0x00000280, + 0x033, 0x00000038, 0x03F, 0x000FF280, - 0x033, 0x00000027, + 0x033, 0x00000037, 0x03F, 0x00000200, - 0x033, 0x00000026, + 0x033, 0x00000036, 0x03F, 0x000001C0, - 0x033, 0x00000025, + 0x033, 0x00000035, 0x03F, 0x00000180, - 0x033, 0x00000024, + 0x033, 0x00000034, 0x03F, 0x00000040, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000002F, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, 0x03F, 0x000773C0, - 0x033, 0x0000002E, + 0x033, 0x0000003E, 0x03F, 0x000FF3C0, - 0x033, 0x0000002D, + 0x033, 0x0000003D, 0x03F, 0x000773E8, - 0x033, 0x0000002C, + 0x033, 0x0000003C, 0x03F, 0x000FF3E8, - 0x033, 0x0000002B, + 0x033, 0x0000003B, 0x03F, 0x00000287, - 0x033, 0x0000002A, + 0x033, 0x0000003A, 0x03F, 0x000002A8, - 0x033, 0x00000029, + 0x033, 0x00000039, 0x03F, 0x00000207, - 0x033, 0x00000028, + 0x033, 0x00000038, 0x03F, 0x000FF280, - 0x033, 0x00000027, + 0x033, 0x00000037, 0x03F, 0x00000200, - 0x033, 0x00000026, + 0x033, 0x00000036, 0x03F, 0x000001C0, - 0x033, 0x00000025, + 0x033, 0x00000035, 0x03F, 0x00000180, - 0x033, 0x00000024, + 0x033, 0x00000034, 0x03F, 0x00000040, - 0xA0000000, 0x00000000, - 0x033, 0x0000002F, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000003F, + 0x03F, 0x000773C0, + 0x033, 0x0000003E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000003D, 0x03F, 0x000773E8, - 0x033, 0x0000002E, - 0x03F, 0x000FF3A0, - 0x033, 0x0000002D, - 0x03F, 0x00000380, - 0x033, 0x0000002C, - 0x03F, 0x000FF380, - 0x033, 0x0000002B, - 0x03F, 0x00000300, - 0x033, 0x0000002A, + 0x033, 0x0000003C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000003B, + 0x03F, 0x00000287, + 0x033, 0x0000003A, 0x03F, 0x000002A8, - 0x033, 0x00000029, - 0x03F, 0x00000280, - 0x033, 0x00000028, + 0x033, 0x00000039, + 0x03F, 0x00000207, + 0x033, 0x00000038, 0x03F, 0x000FF280, - 0x033, 0x00000027, + 0x033, 0x00000037, 0x03F, 0x00000200, - 0x033, 0x00000026, + 0x033, 0x00000036, 0x03F, 0x000001C0, - 0x033, 0x00000025, + 0x033, 0x00000035, 0x03F, 0x00000180, - 0x033, 0x00000024, + 0x033, 0x00000034, 0x03F, 0x00000040, - 0xB0000000, 0x00000000, - 0x033, 0x00000023, - 0x03F, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -14734,7 +24711,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -14759,7 +24736,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -14769,11 +24746,11 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000003C, 0x03F, 0x000FF3E8, 0x033, 0x0000003B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000287, 0x033, 0x0000003A, 0x03F, 0x000002A8, 0x033, 0x00000039, - 0x03F, 0x00000280, + 0x03F, 0x00000207, 0x033, 0x00000038, 0x03F, 0x000FF280, 0x033, 0x00000037, @@ -14784,7 +24761,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -14794,11 +24771,11 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000003C, 0x03F, 0x000FF3E8, 0x033, 0x0000003B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000287, 0x033, 0x0000003A, 0x03F, 0x000002A8, 0x033, 0x00000039, - 0x03F, 0x00000280, + 0x03F, 0x00000207, 0x033, 0x00000038, 0x03F, 0x000FF280, 0x033, 0x00000037, @@ -14809,7 +24786,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -14834,7 +24811,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -14859,7 +24836,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -14884,7 +24861,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000003F, 0x03F, 0x000773C0, 0x033, 0x0000003E, @@ -14909,17 +24886,17 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0xA0000000, 0x00000000, 0x033, 0x0000003F, - 0x03F, 0x000773C0, + 0x03F, 0x000773E8, 0x033, 0x0000003E, - 0x03F, 0x000FF3C0, + 0x03F, 0x000FF3A0, 0x033, 0x0000003D, - 0x03F, 0x000773E8, + 0x03F, 0x00000380, 0x033, 0x0000003C, - 0x03F, 0x000FF3E8, + 0x03F, 0x000FF380, 0x033, 0x0000003B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000300, 0x033, 0x0000003A, 0x03F, 0x000002A8, 0x033, 0x00000039, @@ -14934,260 +24911,385 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000034, 0x03F, 0x00000040, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000003F, + 0xB0000000, 0x00000000, + 0x033, 0x00000033, + 0x03F, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, + 0x03F, 0x000773E8, + 0x033, 0x0000004E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000004D, + 0x03F, 0x00000380, + 0x033, 0x0000004C, + 0x03F, 0x000FF380, + 0x033, 0x0000004B, + 0x03F, 0x00000300, + 0x033, 0x0000004A, + 0x03F, 0x000002A8, + 0x033, 0x00000049, + 0x03F, 0x00000280, + 0x033, 0x00000048, + 0x03F, 0x000FF280, + 0x033, 0x00000047, + 0x03F, 0x00000200, + 0x033, 0x00000046, + 0x03F, 0x000001C0, + 0x033, 0x00000045, + 0x03F, 0x00000180, + 0x033, 0x00000044, + 0x03F, 0x00000040, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, + 0x03F, 0x000773E8, + 0x033, 0x0000004E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000004D, + 0x03F, 0x00000380, + 0x033, 0x0000004C, + 0x03F, 0x000FF380, + 0x033, 0x0000004B, + 0x03F, 0x00000300, + 0x033, 0x0000004A, + 0x03F, 0x000002A8, + 0x033, 0x00000049, + 0x03F, 0x00000280, + 0x033, 0x00000048, + 0x03F, 0x000FF280, + 0x033, 0x00000047, + 0x03F, 0x00000200, + 0x033, 0x00000046, + 0x03F, 0x000001C0, + 0x033, 0x00000045, + 0x03F, 0x00000180, + 0x033, 0x00000044, + 0x03F, 0x00000040, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, 0x03F, 0x000773C0, - 0x033, 0x0000003E, + 0x033, 0x0000004E, 0x03F, 0x000FF3C0, - 0x033, 0x0000003D, + 0x033, 0x0000004D, + 0x03F, 0x000773E8, + 0x033, 0x0000004C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000004B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000004A, + 0x03F, 0x000002A8, + 0x033, 0x00000049, + 0x03F, 0x00000280, + 0x033, 0x00000048, + 0x03F, 0x000FF280, + 0x033, 0x00000047, + 0x03F, 0x00000200, + 0x033, 0x00000046, + 0x03F, 0x000001C0, + 0x033, 0x00000045, + 0x03F, 0x00000180, + 0x033, 0x00000044, + 0x03F, 0x00000040, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, + 0x03F, 0x000773C0, + 0x033, 0x0000004E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000004D, + 0x03F, 0x000773E8, + 0x033, 0x0000004C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000004B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000004A, + 0x03F, 0x000002A8, + 0x033, 0x00000049, + 0x03F, 0x00000280, + 0x033, 0x00000048, + 0x03F, 0x000FF280, + 0x033, 0x00000047, + 0x03F, 0x00000200, + 0x033, 0x00000046, + 0x03F, 0x000001C0, + 0x033, 0x00000045, + 0x03F, 0x00000180, + 0x033, 0x00000044, + 0x03F, 0x00000040, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, + 0x03F, 0x000773C0, + 0x033, 0x0000004E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000004D, + 0x03F, 0x000773E8, + 0x033, 0x0000004C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000004B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000004A, + 0x03F, 0x000002A8, + 0x033, 0x00000049, + 0x03F, 0x00000280, + 0x033, 0x00000048, + 0x03F, 0x000FF280, + 0x033, 0x00000047, + 0x03F, 0x00000200, + 0x033, 0x00000046, + 0x03F, 0x000001C0, + 0x033, 0x00000045, + 0x03F, 0x00000180, + 0x033, 0x00000044, + 0x03F, 0x00000040, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, + 0x03F, 0x000773C0, + 0x033, 0x0000004E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000004D, 0x03F, 0x000773E8, - 0x033, 0x0000003C, + 0x033, 0x0000004C, 0x03F, 0x000FF3E8, - 0x033, 0x0000003B, - 0x03F, 0x00000287, - 0x033, 0x0000003A, + 0x033, 0x0000004B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000004A, 0x03F, 0x000002A8, - 0x033, 0x00000039, - 0x03F, 0x00000207, - 0x033, 0x00000038, + 0x033, 0x00000049, + 0x03F, 0x00000280, + 0x033, 0x00000048, 0x03F, 0x000FF280, - 0x033, 0x00000037, + 0x033, 0x00000047, 0x03F, 0x00000200, - 0x033, 0x00000036, + 0x033, 0x00000046, 0x03F, 0x000001C0, - 0x033, 0x00000035, + 0x033, 0x00000045, 0x03F, 0x00000180, - 0x033, 0x00000034, + 0x033, 0x00000044, 0x03F, 0x00000040, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000003F, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, 0x03F, 0x000773C0, - 0x033, 0x0000003E, + 0x033, 0x0000004E, 0x03F, 0x000FF3C0, - 0x033, 0x0000003D, + 0x033, 0x0000004D, 0x03F, 0x000773E8, - 0x033, 0x0000003C, + 0x033, 0x0000004C, 0x03F, 0x000FF3E8, - 0x033, 0x0000003B, - 0x03F, 0x00000287, - 0x033, 0x0000003A, + 0x033, 0x0000004B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000004A, 0x03F, 0x000002A8, - 0x033, 0x00000039, - 0x03F, 0x00000207, - 0x033, 0x00000038, + 0x033, 0x00000049, + 0x03F, 0x00000280, + 0x033, 0x00000048, 0x03F, 0x000FF280, - 0x033, 0x00000037, + 0x033, 0x00000047, 0x03F, 0x00000200, - 0x033, 0x00000036, + 0x033, 0x00000046, 0x03F, 0x000001C0, - 0x033, 0x00000035, + 0x033, 0x00000045, 0x03F, 0x00000180, - 0x033, 0x00000034, + 0x033, 0x00000044, 0x03F, 0x00000040, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000003F, + 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, 0x03F, 0x000773C0, - 0x033, 0x0000003E, + 0x033, 0x0000004E, 0x03F, 0x000FF3C0, - 0x033, 0x0000003D, + 0x033, 0x0000004D, 0x03F, 0x000773E8, - 0x033, 0x0000003C, + 0x033, 0x0000004C, 0x03F, 0x000FF3E8, - 0x033, 0x0000003B, + 0x033, 0x0000004B, 0x03F, 0x000FF3A0, - 0x033, 0x0000003A, + 0x033, 0x0000004A, 0x03F, 0x000002A8, - 0x033, 0x00000039, + 0x033, 0x00000049, 0x03F, 0x00000280, - 0x033, 0x00000038, + 0x033, 0x00000048, 0x03F, 0x000FF280, - 0x033, 0x00000037, + 0x033, 0x00000047, 0x03F, 0x00000200, - 0x033, 0x00000036, + 0x033, 0x00000046, 0x03F, 0x000001C0, - 0x033, 0x00000035, + 0x033, 0x00000045, 0x03F, 0x00000180, - 0x033, 0x00000034, + 0x033, 0x00000044, 0x03F, 0x00000040, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000003F, + 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, 0x03F, 0x000773C0, - 0x033, 0x0000003E, + 0x033, 0x0000004E, 0x03F, 0x000FF3C0, - 0x033, 0x0000003D, + 0x033, 0x0000004D, 0x03F, 0x000773E8, - 0x033, 0x0000003C, + 0x033, 0x0000004C, 0x03F, 0x000FF3E8, - 0x033, 0x0000003B, - 0x03F, 0x000FF3A0, - 0x033, 0x0000003A, + 0x033, 0x0000004B, + 0x03F, 0x00000287, + 0x033, 0x0000004A, 0x03F, 0x000002A8, - 0x033, 0x00000039, - 0x03F, 0x00000280, - 0x033, 0x00000038, + 0x033, 0x00000049, + 0x03F, 0x00000207, + 0x033, 0x00000048, 0x03F, 0x000FF280, - 0x033, 0x00000037, + 0x033, 0x00000047, 0x03F, 0x00000200, - 0x033, 0x00000036, + 0x033, 0x00000046, 0x03F, 0x000001C0, - 0x033, 0x00000035, + 0x033, 0x00000045, 0x03F, 0x00000180, - 0x033, 0x00000034, + 0x033, 0x00000044, 0x03F, 0x00000040, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000003F, + 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, 0x03F, 0x000773C0, - 0x033, 0x0000003E, + 0x033, 0x0000004E, 0x03F, 0x000FF3C0, - 0x033, 0x0000003D, + 0x033, 0x0000004D, 0x03F, 0x000773E8, - 0x033, 0x0000003C, + 0x033, 0x0000004C, 0x03F, 0x000FF3E8, - 0x033, 0x0000003B, + 0x033, 0x0000004B, 0x03F, 0x00000287, - 0x033, 0x0000003A, + 0x033, 0x0000004A, 0x03F, 0x000002A8, - 0x033, 0x00000039, + 0x033, 0x00000049, 0x03F, 0x00000207, - 0x033, 0x00000038, + 0x033, 0x00000048, 0x03F, 0x000FF280, - 0x033, 0x00000037, + 0x033, 0x00000047, 0x03F, 0x00000200, - 0x033, 0x00000036, + 0x033, 0x00000046, 0x03F, 0x000001C0, - 0x033, 0x00000035, + 0x033, 0x00000045, 0x03F, 0x00000180, - 0x033, 0x00000034, + 0x033, 0x00000044, 0x03F, 0x00000040, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000003F, + 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, 0x03F, 0x000773C0, - 0x033, 0x0000003E, + 0x033, 0x0000004E, 0x03F, 0x000FF3C0, - 0x033, 0x0000003D, + 0x033, 0x0000004D, 0x03F, 0x000773E8, - 0x033, 0x0000003C, + 0x033, 0x0000004C, 0x03F, 0x000FF3E8, - 0x033, 0x0000003B, - 0x03F, 0x00000287, - 0x033, 0x0000003A, + 0x033, 0x0000004B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000004A, 0x03F, 0x000002A8, - 0x033, 0x00000039, - 0x03F, 0x00000207, - 0x033, 0x00000038, + 0x033, 0x00000049, + 0x03F, 0x00000280, + 0x033, 0x00000048, 0x03F, 0x000FF280, - 0x033, 0x00000037, + 0x033, 0x00000047, 0x03F, 0x00000200, - 0x033, 0x00000036, + 0x033, 0x00000046, 0x03F, 0x000001C0, - 0x033, 0x00000035, + 0x033, 0x00000045, 0x03F, 0x00000180, - 0x033, 0x00000034, + 0x033, 0x00000044, 0x03F, 0x00000040, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000003F, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, 0x03F, 0x000773C0, - 0x033, 0x0000003E, + 0x033, 0x0000004E, 0x03F, 0x000FF3C0, - 0x033, 0x0000003D, + 0x033, 0x0000004D, 0x03F, 0x000773E8, - 0x033, 0x0000003C, + 0x033, 0x0000004C, 0x03F, 0x000FF3E8, - 0x033, 0x0000003B, + 0x033, 0x0000004B, 0x03F, 0x000FF3A0, - 0x033, 0x0000003A, + 0x033, 0x0000004A, 0x03F, 0x000002A8, - 0x033, 0x00000039, + 0x033, 0x00000049, 0x03F, 0x00000280, - 0x033, 0x00000038, + 0x033, 0x00000048, 0x03F, 0x000FF280, - 0x033, 0x00000037, + 0x033, 0x00000047, 0x03F, 0x00000200, - 0x033, 0x00000036, + 0x033, 0x00000046, 0x03F, 0x000001C0, - 0x033, 0x00000035, + 0x033, 0x00000045, 0x03F, 0x00000180, - 0x033, 0x00000034, + 0x033, 0x00000044, 0x03F, 0x00000040, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000003F, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, 0x03F, 0x000773C0, - 0x033, 0x0000003E, + 0x033, 0x0000004E, 0x03F, 0x000FF3C0, - 0x033, 0x0000003D, + 0x033, 0x0000004D, 0x03F, 0x000773E8, - 0x033, 0x0000003C, + 0x033, 0x0000004C, 0x03F, 0x000FF3E8, - 0x033, 0x0000003B, + 0x033, 0x0000004B, 0x03F, 0x00000287, - 0x033, 0x0000003A, + 0x033, 0x0000004A, 0x03F, 0x000002A8, - 0x033, 0x00000039, + 0x033, 0x00000049, 0x03F, 0x00000207, - 0x033, 0x00000038, + 0x033, 0x00000048, 0x03F, 0x000FF280, - 0x033, 0x00000037, + 0x033, 0x00000047, 0x03F, 0x00000200, - 0x033, 0x00000036, + 0x033, 0x00000046, 0x03F, 0x000001C0, - 0x033, 0x00000035, + 0x033, 0x00000045, 0x03F, 0x00000180, - 0x033, 0x00000034, + 0x033, 0x00000044, 0x03F, 0x00000040, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000003F, + 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, 0x03F, 0x000773C0, - 0x033, 0x0000003E, + 0x033, 0x0000004E, 0x03F, 0x000FF3C0, - 0x033, 0x0000003D, + 0x033, 0x0000004D, 0x03F, 0x000773E8, - 0x033, 0x0000003C, + 0x033, 0x0000004C, 0x03F, 0x000FF3E8, - 0x033, 0x0000003B, + 0x033, 0x0000004B, 0x03F, 0x00000287, - 0x033, 0x0000003A, + 0x033, 0x0000004A, 0x03F, 0x000002A8, - 0x033, 0x00000039, + 0x033, 0x00000049, 0x03F, 0x00000207, - 0x033, 0x00000038, + 0x033, 0x00000048, 0x03F, 0x000FF280, - 0x033, 0x00000037, + 0x033, 0x00000047, 0x03F, 0x00000200, - 0x033, 0x00000036, + 0x033, 0x00000046, 0x03F, 0x000001C0, - 0x033, 0x00000035, + 0x033, 0x00000045, 0x03F, 0x00000180, - 0x033, 0x00000034, + 0x033, 0x00000044, 0x03F, 0x00000040, - 0xA0000000, 0x00000000, - 0x033, 0x0000003F, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000004F, + 0x03F, 0x000773C0, + 0x033, 0x0000004E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000004D, 0x03F, 0x000773E8, - 0x033, 0x0000003E, + 0x033, 0x0000004C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000004B, 0x03F, 0x000FF3A0, - 0x033, 0x0000003D, - 0x03F, 0x00000380, - 0x033, 0x0000003C, - 0x03F, 0x000FF380, - 0x033, 0x0000003B, - 0x03F, 0x00000300, - 0x033, 0x0000003A, + 0x033, 0x0000004A, 0x03F, 0x000002A8, - 0x033, 0x00000039, + 0x033, 0x00000049, 0x03F, 0x00000280, - 0x033, 0x00000038, + 0x033, 0x00000048, 0x03F, 0x000FF280, - 0x033, 0x00000037, + 0x033, 0x00000047, 0x03F, 0x00000200, - 0x033, 0x00000036, + 0x033, 0x00000046, 0x03F, 0x000001C0, - 0x033, 0x00000035, + 0x033, 0x00000045, 0x03F, 0x00000180, - 0x033, 0x00000034, + 0x033, 0x00000044, 0x03F, 0x00000040, - 0xB0000000, 0x00000000, - 0x033, 0x00000033, - 0x03F, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, 0x033, 0x0000004E, @@ -15212,7 +25314,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, - 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x94000003, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, 0x033, 0x0000004E, @@ -15222,11 +25324,11 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000004C, 0x03F, 0x000FF3E8, 0x033, 0x0000004B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000287, 0x033, 0x0000004A, 0x03F, 0x000002A8, 0x033, 0x00000049, - 0x03F, 0x00000280, + 0x03F, 0x00000207, 0x033, 0x00000048, 0x03F, 0x000FF280, 0x033, 0x00000047, @@ -15237,7 +25339,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, - 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x94000004, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, 0x033, 0x0000004E, @@ -15247,11 +25349,11 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000004C, 0x03F, 0x000FF3E8, 0x033, 0x0000004B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000287, 0x033, 0x0000004A, 0x03F, 0x000002A8, 0x033, 0x00000049, - 0x03F, 0x00000280, + 0x03F, 0x00000207, 0x033, 0x00000048, 0x03F, 0x000FF280, 0x033, 0x00000047, @@ -15262,7 +25364,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, - 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, 0x033, 0x0000004E, @@ -15287,7 +25389,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, - 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, 0x033, 0x0000004E, @@ -15312,7 +25414,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, 0x033, 0x0000004E, @@ -15322,11 +25424,11 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000004C, 0x03F, 0x000FF3E8, 0x033, 0x0000004B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000287, 0x033, 0x0000004A, 0x03F, 0x000002A8, 0x033, 0x00000049, - 0x03F, 0x00000280, + 0x03F, 0x00000207, 0x033, 0x00000048, 0x03F, 0x000FF280, 0x033, 0x00000047, @@ -15337,7 +25439,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, 0x033, 0x0000004E, @@ -15362,7 +25464,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, 0x033, 0x0000004E, @@ -15372,11 +25474,11 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000004C, 0x03F, 0x000FF3E8, 0x033, 0x0000004B, - 0x03F, 0x00000287, + 0x03F, 0x000FF3A0, 0x033, 0x0000004A, 0x03F, 0x000002A8, 0x033, 0x00000049, - 0x03F, 0x00000207, + 0x03F, 0x00000280, 0x033, 0x00000048, 0x03F, 0x000FF280, 0x033, 0x00000047, @@ -15387,7 +25489,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, 0x033, 0x0000004E, @@ -15412,7 +25514,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, 0x033, 0x0000004E, @@ -15437,7 +25539,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, 0x033, 0x0000004E, @@ -15462,7 +25564,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, 0x033, 0x0000004E, @@ -15487,7 +25589,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, 0x033, 0x0000004E, @@ -15512,7 +25614,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, 0x033, 0x0000004E, @@ -15537,7 +25639,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000044, 0x03F, 0x00000040, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000004F, 0x03F, 0x000773C0, 0x033, 0x0000004E, @@ -15546,126 +25648,326 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x000773E8, 0x033, 0x0000004C, 0x03F, 0x000FF3E8, - 0x033, 0x0000004B, - 0x03F, 0x00000287, - 0x033, 0x0000004A, + 0x033, 0x0000004B, + 0x03F, 0x00000287, + 0x033, 0x0000004A, + 0x03F, 0x000002A8, + 0x033, 0x00000049, + 0x03F, 0x00000207, + 0x033, 0x00000048, + 0x03F, 0x000FF280, + 0x033, 0x00000047, + 0x03F, 0x00000200, + 0x033, 0x00000046, + 0x03F, 0x000001C0, + 0x033, 0x00000045, + 0x03F, 0x00000180, + 0x033, 0x00000044, + 0x03F, 0x00000040, + 0xA0000000, 0x00000000, + 0x033, 0x0000004F, + 0x03F, 0x000773E8, + 0x033, 0x0000004E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000004D, + 0x03F, 0x00000380, + 0x033, 0x0000004C, + 0x03F, 0x000FF380, + 0x033, 0x0000004B, + 0x03F, 0x00000300, + 0x033, 0x0000004A, + 0x03F, 0x000002A8, + 0x033, 0x00000049, + 0x03F, 0x00000280, + 0x033, 0x00000048, + 0x03F, 0x000FF280, + 0x033, 0x00000047, + 0x03F, 0x00000200, + 0x033, 0x00000046, + 0x03F, 0x000001C0, + 0x033, 0x00000045, + 0x03F, 0x00000180, + 0x033, 0x00000044, + 0x03F, 0x00000040, + 0xB0000000, 0x00000000, + 0x033, 0x00000043, + 0x03F, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773E8, + 0x033, 0x0000005E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005D, + 0x03F, 0x00000380, + 0x033, 0x0000005C, + 0x03F, 0x000FF380, + 0x033, 0x0000005B, + 0x03F, 0x00000300, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773E8, + 0x033, 0x0000005E, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005D, + 0x03F, 0x00000380, + 0x033, 0x0000005C, + 0x03F, 0x000FF380, + 0x033, 0x0000005B, + 0x03F, 0x00000300, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005A, 0x03F, 0x000002A8, - 0x033, 0x00000049, - 0x03F, 0x00000207, - 0x033, 0x00000048, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, 0x03F, 0x000FF280, - 0x033, 0x00000047, + 0x033, 0x00000057, 0x03F, 0x00000200, - 0x033, 0x00000046, + 0x033, 0x00000056, 0x03F, 0x000001C0, - 0x033, 0x00000045, + 0x033, 0x00000055, 0x03F, 0x00000180, - 0x033, 0x00000044, + 0x033, 0x00000054, 0x03F, 0x00000040, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000004F, + 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, 0x03F, 0x000773C0, - 0x033, 0x0000004E, + 0x033, 0x0000005E, 0x03F, 0x000FF3C0, - 0x033, 0x0000004D, + 0x033, 0x0000005D, 0x03F, 0x000773E8, - 0x033, 0x0000004C, + 0x033, 0x0000005C, 0x03F, 0x000FF3E8, - 0x033, 0x0000004B, + 0x033, 0x0000005B, 0x03F, 0x000FF3A0, - 0x033, 0x0000004A, + 0x033, 0x0000005A, 0x03F, 0x000002A8, - 0x033, 0x00000049, + 0x033, 0x00000059, 0x03F, 0x00000280, - 0x033, 0x00000048, + 0x033, 0x00000058, 0x03F, 0x000FF280, - 0x033, 0x00000047, + 0x033, 0x00000057, 0x03F, 0x00000200, - 0x033, 0x00000046, + 0x033, 0x00000056, 0x03F, 0x000001C0, - 0x033, 0x00000045, + 0x033, 0x00000055, 0x03F, 0x00000180, - 0x033, 0x00000044, + 0x033, 0x00000054, 0x03F, 0x00000040, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000004F, + 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, 0x03F, 0x000773C0, - 0x033, 0x0000004E, + 0x033, 0x0000005E, 0x03F, 0x000FF3C0, - 0x033, 0x0000004D, + 0x033, 0x0000005D, 0x03F, 0x000773E8, - 0x033, 0x0000004C, + 0x033, 0x0000005C, 0x03F, 0x000FF3E8, - 0x033, 0x0000004B, + 0x033, 0x0000005B, 0x03F, 0x00000287, - 0x033, 0x0000004A, + 0x033, 0x0000005A, 0x03F, 0x000002A8, - 0x033, 0x00000049, + 0x033, 0x00000059, 0x03F, 0x00000207, - 0x033, 0x00000048, + 0x033, 0x00000058, 0x03F, 0x000FF280, - 0x033, 0x00000047, + 0x033, 0x00000057, 0x03F, 0x00000200, - 0x033, 0x00000046, + 0x033, 0x00000056, 0x03F, 0x000001C0, - 0x033, 0x00000045, + 0x033, 0x00000055, 0x03F, 0x00000180, - 0x033, 0x00000044, + 0x033, 0x00000054, 0x03F, 0x00000040, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x0000004F, + 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, 0x03F, 0x000773C0, - 0x033, 0x0000004E, + 0x033, 0x0000005E, 0x03F, 0x000FF3C0, - 0x033, 0x0000004D, + 0x033, 0x0000005D, 0x03F, 0x000773E8, - 0x033, 0x0000004C, + 0x033, 0x0000005C, 0x03F, 0x000FF3E8, - 0x033, 0x0000004B, + 0x033, 0x0000005B, 0x03F, 0x00000287, - 0x033, 0x0000004A, + 0x033, 0x0000005A, 0x03F, 0x000002A8, - 0x033, 0x00000049, + 0x033, 0x00000059, 0x03F, 0x00000207, - 0x033, 0x00000048, + 0x033, 0x00000058, 0x03F, 0x000FF280, - 0x033, 0x00000047, + 0x033, 0x00000057, 0x03F, 0x00000200, - 0x033, 0x00000046, + 0x033, 0x00000056, 0x03F, 0x000001C0, - 0x033, 0x00000045, + 0x033, 0x00000055, 0x03F, 0x00000180, - 0x033, 0x00000044, + 0x033, 0x00000054, 0x03F, 0x00000040, - 0xA0000000, 0x00000000, - 0x033, 0x0000004F, + 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, 0x03F, 0x000773E8, - 0x033, 0x0000004E, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, 0x03F, 0x000FF3A0, - 0x033, 0x0000004D, - 0x03F, 0x00000380, - 0x033, 0x0000004C, - 0x03F, 0x000FF380, - 0x033, 0x0000004B, - 0x03F, 0x00000300, - 0x033, 0x0000004A, + 0x033, 0x0000005A, 0x03F, 0x000002A8, - 0x033, 0x00000049, + 0x033, 0x00000059, 0x03F, 0x00000280, - 0x033, 0x00000048, + 0x033, 0x00000058, 0x03F, 0x000FF280, - 0x033, 0x00000047, + 0x033, 0x00000057, 0x03F, 0x00000200, - 0x033, 0x00000046, + 0x033, 0x00000056, 0x03F, 0x000001C0, - 0x033, 0x00000045, + 0x033, 0x00000055, 0x03F, 0x00000180, - 0x033, 0x00000044, + 0x033, 0x00000054, 0x03F, 0x00000040, - 0xB0000000, 0x00000000, - 0x033, 0x00000043, - 0x03F, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, 0x033, 0x0000005E, @@ -15690,7 +25992,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, 0x033, 0x0000005E, @@ -15700,11 +26002,11 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000005C, 0x03F, 0x000FF3E8, 0x033, 0x0000005B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000287, 0x033, 0x0000005A, 0x03F, 0x000002A8, 0x033, 0x00000059, - 0x03F, 0x00000280, + 0x03F, 0x00000207, 0x033, 0x00000058, 0x03F, 0x000FF280, 0x033, 0x00000057, @@ -15715,7 +26017,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x93000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, 0x033, 0x0000005E, @@ -15725,11 +26027,11 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000005C, 0x03F, 0x000FF3E8, 0x033, 0x0000005B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000287, 0x033, 0x0000005A, 0x03F, 0x000002A8, 0x033, 0x00000059, - 0x03F, 0x00000280, + 0x03F, 0x00000207, 0x033, 0x00000058, 0x03F, 0x000FF280, 0x033, 0x00000057, @@ -15740,7 +26042,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, 0x033, 0x0000005E, @@ -15765,7 +26067,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, 0x033, 0x0000005E, @@ -15790,7 +26092,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x94000003, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, 0x033, 0x0000005E, @@ -15800,11 +26102,11 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000005C, 0x03F, 0x000FF3E8, 0x033, 0x0000005B, - 0x03F, 0x000FF3A0, + 0x03F, 0x00000287, 0x033, 0x0000005A, 0x03F, 0x000002A8, 0x033, 0x00000059, - 0x03F, 0x00000280, + 0x03F, 0x00000207, 0x033, 0x00000058, 0x03F, 0x000FF280, 0x033, 0x00000057, @@ -15815,7 +26117,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x94000004, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, 0x033, 0x0000005E, @@ -15840,7 +26142,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, 0x033, 0x0000005E, @@ -15850,11 +26152,11 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000005C, 0x03F, 0x000FF3E8, 0x033, 0x0000005B, - 0x03F, 0x00000287, + 0x03F, 0x000FF3A0, 0x033, 0x0000005A, 0x03F, 0x000002A8, 0x033, 0x00000059, - 0x03F, 0x00000207, + 0x03F, 0x00000280, 0x033, 0x00000058, 0x03F, 0x000FF280, 0x033, 0x00000057, @@ -15865,7 +26167,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, 0x033, 0x0000005E, @@ -15890,7 +26192,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, 0x033, 0x0000005E, @@ -15915,7 +26217,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, 0x033, 0x0000005E, @@ -15940,7 +26242,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, 0x033, 0x0000005E, @@ -15965,7 +26267,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, 0x033, 0x0000005E, @@ -15990,7 +26292,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, 0x033, 0x0000005E, @@ -16015,7 +26317,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, 0x033, 0x0000005E, @@ -16040,7 +26342,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, 0x033, 0x0000005E, @@ -16065,7 +26367,32 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000005F, + 0x03F, 0x000773C0, + 0x033, 0x0000005E, + 0x03F, 0x000FF3C0, + 0x033, 0x0000005D, + 0x03F, 0x000773E8, + 0x033, 0x0000005C, + 0x03F, 0x000FF3E8, + 0x033, 0x0000005B, + 0x03F, 0x000FF3A0, + 0x033, 0x0000005A, + 0x03F, 0x000002A8, + 0x033, 0x00000059, + 0x03F, 0x00000280, + 0x033, 0x00000058, + 0x03F, 0x000FF280, + 0x033, 0x00000057, + 0x03F, 0x00000200, + 0x033, 0x00000056, + 0x03F, 0x000001C0, + 0x033, 0x00000055, + 0x03F, 0x00000180, + 0x033, 0x00000054, + 0x03F, 0x00000040, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, 0x033, 0x0000005E, @@ -16090,7 +26417,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000180, 0x033, 0x00000054, 0x03F, 0x00000040, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x0000005F, 0x03F, 0x000773C0, 0x033, 0x0000005E, @@ -16143,60 +26470,1701 @@ static const u32 rtw8822c_rf_b[] = { 0xB0000000, 0x00000000, 0x033, 0x00000053, 0x03F, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00000000, + 0xA0000000, 0x00000000, + 0x0EF, 0x00000000, + 0xB0000000, 0x00000000, + 0x08A, 0x000E7DE3, + 0x08B, 0x0008FE00, + 0x0EE, 0x00000008, + 0x033, 0x00000000, + 0x03F, 0x00000023, + 0x033, 0x00000001, + 0x03F, 0x00000023, + 0x0EE, 0x00000000, + 0x0EF, 0x00004000, + 0x033, 0x00000000, + 0x03F, 0x0000000F, + 0x033, 0x00000002, + 0x03F, 0x00000000, + 0x0EF, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00020000, + 0x033, 0x00000000, + 0x03E, 0x00001910, + 0x03F, 0x00020000, + 0x033, 0x00000001, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000002, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000003, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000004, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000005, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000006, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000007, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000008, + 0x03E, 0x00001910, + 0x03F, 0x00020000, + 0x033, 0x00000009, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000000A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000000B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000000C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000000D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000000E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000000F, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000010, + 0x03E, 0x00001910, + 0x03F, 0x00020000, + 0x033, 0x00000011, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000012, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000013, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000014, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000015, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000016, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000017, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000018, + 0x03E, 0x00001910, + 0x03F, 0x00020000, + 0x033, 0x00000019, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000001A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000001B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000001C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000001D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000001E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000001F, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000020, + 0x03E, 0x00001910, + 0x03F, 0x00020000, + 0x033, 0x00000021, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000022, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000023, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000024, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000025, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000026, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000027, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000028, + 0x03E, 0x00001910, + 0x03F, 0x00020000, + 0x033, 0x00000029, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000002A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000002B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000002C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000002D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000002E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000002F, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 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0x033, 0x00000000, - 0x03F, 0x00000023, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, 0x033, 0x00000001, - 0x03F, 0x00000023, - 0x0EE, 0x00000000, - 0x0EF, 0x00004000, - 0x033, 0x00000000, - 0x03F, 0x0000000F, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, 0x033, 0x00000002, - 0x03F, 0x00000000, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000003, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000004, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000005, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000006, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000007, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000008, + 0x03E, 0x00000000, + 0x03F, 0x0002F81C, + 0x033, 0x00000009, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000000A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000000B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000000C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000000D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000000E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000000F, + 0x03E, 0x00000000, + 0x03F, 0x0002F81C, + 0x033, 0x00000010, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000011, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000012, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000013, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000014, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000015, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000016, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000017, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000018, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000019, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000001A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000001B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000001C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000001D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000001E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000001F, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000020, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000021, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000022, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000023, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000024, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000025, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000026, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000027, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000028, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000029, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000002A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000002B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000002C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000002D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000002E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000002F, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -16343,7 +28311,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -16368,7 +28336,154 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00020000, 0x033, 0x00000007, 0x03E, 0x00000000, + 0x03F, 0x0002F81C, + 0x033, 0x00000008, + 0x03E, 0x00000000, + 0x03F, 0x0002F81C, + 0x033, 0x00000009, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000000A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000000B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000000C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000000D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000000E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000000F, + 0x03E, 0x00000000, + 0x03F, 0x0002F81C, + 0x033, 0x00000010, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000011, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000012, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000013, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000014, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000015, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000016, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000017, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000018, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000019, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000001A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000001B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000001C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000001D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000001E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000001F, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000020, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000021, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000022, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000023, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000024, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000025, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000026, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000027, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000028, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000029, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000002A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000002B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000002C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000002D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000002E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000002F, + 0x03E, 0x00000000, 0x03F, 0x0002C010, + 0x0EF, 0x00000000, + 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00020000, + 0x033, 0x00000000, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000001, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000002, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000003, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000004, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000005, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000006, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000007, + 0x03E, 0x00000000, + 0x03F, 0x0002F81C, 0x033, 0x00000008, 0x03E, 0x00000000, 0x03F, 0x0002F81C, @@ -16490,7 +28605,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -16637,7 +28752,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -16784,7 +28899,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x94000003, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -16931,7 +29046,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x94000004, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -17078,7 +29193,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -17225,7 +29340,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -17372,7 +29487,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -17397,7 +29512,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00020000, 0x033, 0x00000007, 0x03E, 0x00000000, - 0x03F, 0x0002C010, + 0x03F, 0x0002F81C, 0x033, 0x00000008, 0x03E, 0x00000000, 0x03F, 0x0002F81C, @@ -17519,7 +29634,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -17666,7 +29781,154 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00020000, + 0x033, 0x00000000, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000001, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000002, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000003, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000004, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000005, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000006, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000007, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000008, + 0x03E, 0x00000000, + 0x03F, 0x0002F81C, + 0x033, 0x00000009, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000000A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000000B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000000C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000000D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000000E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000000F, + 0x03E, 0x00000000, + 0x03F, 0x0002F81C, + 0x033, 0x00000010, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000011, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000012, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000013, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000014, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000015, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000016, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000017, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000018, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000019, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000001A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000001B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000001C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000001D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000001E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000001F, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000020, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000021, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000022, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000023, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000024, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000025, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000026, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000027, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000028, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000029, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000002A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000002B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000002C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000002D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000002E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000002F, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x0EF, 0x00000000, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -17691,7 +29953,154 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00020000, 0x033, 0x00000007, 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000008, + 0x03E, 0x00000000, + 0x03F, 0x0002F81C, + 0x033, 0x00000009, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000000A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000000B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000000C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000000D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000000E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000000F, + 0x03E, 0x00000000, 0x03F, 0x0002F81C, + 0x033, 0x00000010, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000011, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000012, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000013, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000014, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000015, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000016, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000017, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000018, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000019, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000001A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000001B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000001C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000001D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000001E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000001F, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000020, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000021, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000022, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000023, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000024, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000025, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000026, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000027, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x033, 0x00000028, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000029, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x0000002A, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x0000002B, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x0000002C, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x0000002D, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x0000002E, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x0000002F, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, + 0x0EF, 0x00000000, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x0EF, 0x00020000, + 0x033, 0x00000000, + 0x03E, 0x00001C86, + 0x03F, 0x00020000, + 0x033, 0x00000001, + 0x03E, 0x00001C02, + 0x03F, 0x00020000, + 0x033, 0x00000002, + 0x03E, 0x00000F02, + 0x03F, 0x00020000, + 0x033, 0x00000003, + 0x03E, 0x00000F00, + 0x03F, 0x00020000, + 0x033, 0x00000004, + 0x03E, 0x00000086, + 0x03F, 0x00020000, + 0x033, 0x00000005, + 0x03E, 0x00000002, + 0x03F, 0x00020000, + 0x033, 0x00000006, + 0x03E, 0x00000000, + 0x03F, 0x00020000, + 0x033, 0x00000007, + 0x03E, 0x00000000, + 0x03F, 0x0002C010, 0x033, 0x00000008, 0x03E, 0x00000000, 0x03F, 0x0002F81C, @@ -17813,7 +30222,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -17960,7 +30369,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -18107,7 +30516,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -18254,7 +30663,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -18279,7 +30688,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00020000, 0x033, 0x00000007, 0x03E, 0x00000000, - 0x03F, 0x0002C010, + 0x03F, 0x0002F81C, 0x033, 0x00000008, 0x03E, 0x00000000, 0x03F, 0x0002F81C, @@ -18401,7 +30810,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, 0x03E, 0x00001C86, @@ -18426,7 +30835,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00020000, 0x033, 0x00000007, 0x03E, 0x00000000, - 0x03F, 0x0002C010, + 0x03F, 0x0002F81C, 0x033, 0x00000008, 0x03E, 0x00000000, 0x03F, 0x0002F81C, @@ -18548,10 +30957,10 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0xA0000000, 0x00000000, 0x0EF, 0x00020000, 0x033, 0x00000000, - 0x03E, 0x00001C86, + 0x03E, 0x00001910, 0x03F, 0x00020000, 0x033, 0x00000001, 0x03E, 0x00001C02, @@ -18573,10 +30982,10 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00020000, 0x033, 0x00000007, 0x03E, 0x00000000, - 0x03F, 0x0002F81C, + 0x03F, 0x0002C010, 0x033, 0x00000008, - 0x03E, 0x00000000, - 0x03F, 0x0002F81C, + 0x03E, 0x00001910, + 0x03F, 0x00020000, 0x033, 0x00000009, 0x03E, 0x00001C02, 0x03F, 0x00020000, @@ -18597,9 +31006,9 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00020000, 0x033, 0x0000000F, 0x03E, 0x00000000, - 0x03F, 0x0002F81C, + 0x03F, 0x0002C010, 0x033, 0x00000010, - 0x03E, 0x00001C86, + 0x03E, 0x00001910, 0x03F, 0x00020000, 0x033, 0x00000011, 0x03E, 0x00001C02, @@ -18623,7 +31032,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x033, 0x00000018, - 0x03E, 0x00001C86, + 0x03E, 0x00001910, 0x03F, 0x00020000, 0x033, 0x00000019, 0x03E, 0x00001C02, @@ -18647,7 +31056,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x033, 0x00000020, - 0x03E, 0x00001C86, + 0x03E, 0x00001910, 0x03F, 0x00020000, 0x033, 0x00000021, 0x03E, 0x00001C02, @@ -18671,7 +31080,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x033, 0x00000028, - 0x03E, 0x00001C86, + 0x03E, 0x00001910, 0x03F, 0x00020000, 0x033, 0x00000029, 0x03E, 0x00001C02, @@ -18695,1285 +31104,2691 @@ static const u32 rtw8822c_rf_b[] = { 0x03E, 0x00000000, 0x03F, 0x0002C010, 0x0EF, 0x00000000, + 0xB0000000, 0x00000000, + 0x0FE, 0x00000000, + 0x01B, 0x00003A40, + 0x061, 0x0000D233, + 0x062, 0x0004D232, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000C02, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000C02, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x00000002, + 0xA0000000, 0x00000000, + 0x063, 0x00000C02, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000200, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000233, + 0x030, 0x00001233, + 0x030, 0x00002233, + 0x030, 0x00003233, + 0x030, 0x00004203, + 0x030, 0x00005233, + 0x030, 0x00006233, + 0x030, 0x00007233, + 0x030, 0x00008203, + 0x030, 0x00009233, + 0x030, 0x0000A233, + 0x030, 0x0000B233, + 0x030, 0x0000C233, + 0x030, 0x0000D233, + 0x030, 0x0000E203, + 0x030, 0x0000F233, + 0x030, 0x00010233, + 0x030, 0x00011233, + 0x030, 0x00012203, + 0x030, 0x00013233, + 0x030, 0x00014233, + 0x030, 0x00015233, + 0x030, 0x00016203, + 0x030, 0x00017233, + 0x030, 0x00018203, + 0x030, 0x00019233, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000233, + 0x030, 0x00001233, + 0x030, 0x00002233, + 0x030, 0x00003233, + 0x030, 0x00004203, + 0x030, 0x00005233, + 0x030, 0x00006233, + 0x030, 0x00007233, + 0x030, 0x00008203, + 0x030, 0x00009233, + 0x030, 0x0000A233, + 0x030, 0x0000B233, + 0x030, 0x0000C233, + 0x030, 0x0000D233, + 0x030, 0x0000E203, + 0x030, 0x0000F233, + 0x030, 0x00010233, + 0x030, 0x00011233, + 0x030, 0x00012203, + 0x030, 0x00013233, + 0x030, 0x00014233, + 0x030, 0x00015233, + 0x030, 0x00016203, + 0x030, 0x00017233, + 0x030, 0x00018203, + 0x030, 0x00019233, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000237, + 0x030, 0x00001237, + 0x030, 0x00002237, + 0x030, 0x00003237, + 0x030, 0x00004207, + 0x030, 0x00005237, + 0x030, 0x00006237, + 0x030, 0x00007237, + 0x030, 0x00008207, + 0x030, 0x00009237, + 0x030, 0x0000A237, + 0x030, 0x0000B237, + 0x030, 0x0000C237, + 0x030, 0x0000D237, + 0x030, 0x0000E207, + 0x030, 0x0000F237, + 0x030, 0x00010237, + 0x030, 0x00011237, + 0x030, 0x00012207, + 0x030, 0x00013237, + 0x030, 0x00014237, + 0x030, 0x00015237, + 0x030, 0x00016207, + 0x030, 0x00017237, + 0x030, 0x00018207, + 0x030, 0x00019237, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000237, + 0x030, 0x00001237, + 0x030, 0x00002237, + 0x030, 0x00003237, + 0x030, 0x00004207, + 0x030, 0x00005237, + 0x030, 0x00006237, + 0x030, 0x00007237, + 0x030, 0x00008207, + 0x030, 0x00009237, + 0x030, 0x0000A237, + 0x030, 0x0000B237, + 0x030, 0x0000C237, + 0x030, 0x0000D237, + 0x030, 0x0000E207, + 0x030, 0x0000F237, + 0x030, 0x00010237, + 0x030, 0x00011237, + 0x030, 0x00012207, + 0x030, 0x00013237, + 0x030, 0x00014237, + 0x030, 0x00015237, + 0x030, 0x00016207, + 0x030, 0x00017237, + 0x030, 0x00018207, + 0x030, 0x00019237, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000237, + 0x030, 0x00001237, + 0x030, 0x00002237, + 0x030, 0x00003237, + 0x030, 0x00004207, + 0x030, 0x00005237, + 0x030, 0x00006237, + 0x030, 0x00007237, + 0x030, 0x00008207, + 0x030, 0x00009237, + 0x030, 0x0000A237, + 0x030, 0x0000B237, + 0x030, 0x0000C237, + 0x030, 0x0000D237, + 0x030, 0x0000E207, + 0x030, 0x0000F237, + 0x030, 0x00010237, + 0x030, 0x00011237, + 0x030, 0x00012207, + 0x030, 0x00013237, + 0x030, 0x00014237, + 0x030, 0x00015237, + 0x030, 0x00016207, + 0x030, 0x00017237, + 0x030, 0x00018207, + 0x030, 0x00019237, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000237, + 0x030, 0x00001237, + 0x030, 0x00002237, + 0x030, 0x00003237, + 0x030, 0x00004207, + 0x030, 0x00005237, + 0x030, 0x00006237, + 0x030, 0x00007237, + 0x030, 0x00008207, + 0x030, 0x00009237, + 0x030, 0x0000A237, + 0x030, 0x0000B237, + 0x030, 0x0000C237, + 0x030, 0x0000D237, + 0x030, 0x0000E207, + 0x030, 0x0000F237, + 0x030, 0x00010237, + 0x030, 0x00011237, + 0x030, 0x00012207, + 0x030, 0x00013237, + 0x030, 0x00014237, + 0x030, 0x00015237, + 0x030, 0x00016207, + 0x030, 0x00017237, + 0x030, 0x00018207, + 0x030, 0x00019237, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000238, + 0x030, 0x00001238, + 0x030, 0x00002238, + 0x030, 0x00003238, + 0x030, 0x00004228, + 0x030, 0x00005238, + 0x030, 0x00006238, + 0x030, 0x00007238, + 0x030, 0x00008228, + 0x030, 0x00009238, + 0x030, 0x0000A238, + 0x030, 0x0000B238, + 0x030, 0x0000C238, + 0x030, 0x0000D238, + 0x030, 0x0000E228, + 0x030, 0x0000F238, + 0x030, 0x00010238, + 0x030, 0x00011238, + 0x030, 0x00012228, + 0x030, 0x00013238, + 0x030, 0x00014238, + 0x030, 0x00015238, + 0x030, 0x00016228, + 0x030, 0x00017238, + 0x030, 0x00018228, + 0x030, 0x00019238, + 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000238, + 0x030, 0x00001238, + 0x030, 0x00002238, + 0x030, 0x00003238, + 0x030, 0x00004228, + 0x030, 0x00005238, + 0x030, 0x00006238, + 0x030, 0x00007238, + 0x030, 0x00008228, + 0x030, 0x00009238, + 0x030, 0x0000A238, + 0x030, 0x0000B238, + 0x030, 0x0000C238, + 0x030, 0x0000D238, + 0x030, 0x0000E228, + 0x030, 0x0000F238, + 0x030, 0x00010238, + 0x030, 0x00011238, + 0x030, 0x00012228, + 0x030, 0x00013238, + 0x030, 0x00014238, + 0x030, 0x00015238, + 0x030, 0x00016228, + 0x030, 0x00017238, + 0x030, 0x00018228, + 0x030, 0x00019238, + 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000239, + 0x030, 0x00001239, + 0x030, 0x00002239, + 0x030, 0x00003239, + 0x030, 0x00004239, + 0x030, 0x00005239, + 0x030, 0x00006239, + 0x030, 0x00007239, + 0x030, 0x00008239, + 0x030, 0x00009239, + 0x030, 0x0000A239, + 0x030, 0x0000B239, + 0x030, 0x0000C239, + 0x030, 0x0000D239, + 0x030, 0x0000E209, + 0x030, 0x0000F239, + 0x030, 0x00010239, + 0x030, 0x00011239, + 0x030, 0x00012209, + 0x030, 0x00013239, + 0x030, 0x00014239, + 0x030, 0x00015239, + 0x030, 0x00016209, + 0x030, 0x00017239, + 0x030, 0x00018209, + 0x030, 0x00019239, + 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x030, 0x00000239, + 0x030, 0x00001239, + 0x030, 0x00002239, + 0x030, 0x00003239, + 0x030, 0x00004239, + 0x030, 0x00005239, + 0x030, 0x00006239, + 0x030, 0x00007239, + 0x030, 0x00008239, + 0x030, 0x00009239, + 0x030, 0x0000A239, + 0x030, 0x0000B239, + 0x030, 0x0000C239, + 0x030, 0x0000D239, + 0x030, 0x0000E209, + 0x030, 0x0000F239, + 0x030, 0x00010239, + 0x030, 0x00011239, + 0x030, 0x00012209, + 0x030, 0x00013239, + 0x030, 0x00014239, + 0x030, 0x00015239, + 0x030, 0x00016209, + 0x030, 0x00017239, + 0x030, 0x00018209, + 0x030, 0x00019239, + 0x93000005, 0x00000000, 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0x00000280, 0x03F, 0x00000005, - 0x033, 0x00000201, + 0x033, 0x00000281, 0x03F, 0x00000008, - 0x033, 0x00000202, + 0x033, 0x00000282, 0x03F, 0x0000000B, - 0x033, 0x00000203, + 0x033, 0x00000283, 0x03F, 0x0000000E, - 0x033, 0x00000204, + 0x033, 0x00000284, 0x03F, 0x0000002B, - 0x033, 0x00000205, + 0x033, 0x00000285, 0x03F, 0x0000002E, - 0x033, 0x00000206, + 0x033, 0x00000286, 0x03F, 0x0000006B, - 0x033, 0x00000207, + 0x033, 0x00000287, 0x03F, 0x0000006E, - 0x033, 0x00000208, + 0x033, 0x00000288, 0x03F, 0x00000071, - 0x033, 0x00000209, + 0x033, 0x00000289, 0x03F, 0x00000074, - 0x033, 0x0000020A, + 0x033, 0x0000028A, 0x03F, 0x00000077, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000280, + 0x03F, 0x0000006A, + 0x033, 0x00000281, + 0x03F, 0x0000006D, + 0x033, 0x00000282, + 0x03F, 0x0000046A, + 0x033, 0x00000283, + 0x03F, 0x0000086A, + 0x033, 0x00000284, + 0x03F, 0x00000C89, + 0x033, 0x00000285, + 0x03F, 0x00000CE8, + 0x033, 0x00000286, + 0x03F, 0x00000CEB, + 0x033, 0x00000287, + 0x03F, 0x00000CEE, + 0x033, 0x00000288, + 0x03F, 0x00000CF1, + 0x033, 0x00000289, + 0x03F, 0x00000CF4, + 0x033, 0x0000028A, + 0x03F, 0x00000CF7, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000280, + 0x03F, 0x0000006A, + 0x033, 0x00000281, + 0x03F, 0x0000006D, + 0x033, 0x00000282, + 0x03F, 0x0000046A, + 0x033, 0x00000283, + 0x03F, 0x0000086A, + 0x033, 0x00000284, + 0x03F, 0x00000C89, + 0x033, 0x00000285, + 0x03F, 0x00000CE8, + 0x033, 0x00000286, + 0x03F, 0x00000CEB, + 0x033, 0x00000287, + 0x03F, 0x00000CEE, + 0x033, 0x00000288, + 0x03F, 0x00000CF1, + 0x033, 0x00000289, + 0x03F, 0x00000CF4, + 0x033, 0x0000028A, + 0x03F, 0x00000CF7, + 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000280, + 0x03F, 0x0000006A, + 0x033, 0x00000281, + 0x03F, 0x0000006D, + 0x033, 0x00000282, + 0x03F, 0x0000046A, + 0x033, 0x00000283, + 0x03F, 0x0000086A, + 0x033, 0x00000284, + 0x03F, 0x00000C89, + 0x033, 0x00000285, + 0x03F, 0x00000CE8, + 0x033, 0x00000286, + 0x03F, 0x00000CEB, + 0x033, 0x00000287, + 0x03F, 0x00000CEE, + 0x033, 0x00000288, + 0x03F, 0x00000CF1, + 0x033, 0x00000289, + 0x03F, 0x00000CF4, + 0x033, 0x0000028A, + 0x03F, 0x00000CF7, + 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000280, + 0x03F, 0x0000006A, + 0x033, 0x00000281, + 0x03F, 0x0000006D, + 0x033, 0x00000282, + 0x03F, 0x0000046A, + 0x033, 0x00000283, + 0x03F, 0x0000086A, + 0x033, 0x00000284, + 0x03F, 0x00000C89, + 0x033, 0x00000285, + 0x03F, 0x00000CE8, + 0x033, 0x00000286, + 0x03F, 0x00000CEB, + 0x033, 0x00000287, + 0x03F, 0x00000CEE, + 0x033, 0x00000288, + 0x03F, 0x00000CF1, + 0x033, 0x00000289, + 0x03F, 0x00000CF4, + 0x033, 0x0000028A, + 0x03F, 0x00000CF7, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000280, + 0x03F, 0x0000006A, + 0x033, 0x00000281, + 0x03F, 0x0000006D, + 0x033, 0x00000282, + 0x03F, 0x0000046A, + 0x033, 0x00000283, + 0x03F, 0x0000086A, + 0x033, 0x00000284, + 0x03F, 0x00000C89, + 0x033, 0x00000285, + 0x03F, 0x00000CE8, + 0x033, 0x00000286, + 0x03F, 0x00000CEB, + 0x033, 0x00000287, + 0x03F, 0x00000CEE, + 0x033, 0x00000288, + 0x03F, 0x00000CF1, + 0x033, 0x00000289, + 0x03F, 0x00000CF4, + 0x033, 0x0000028A, + 0x03F, 0x00000CF7, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000280, + 0x03F, 0x0000006A, + 0x033, 0x00000281, + 0x03F, 0x0000006D, + 0x033, 0x00000282, + 0x03F, 0x0000046A, + 0x033, 0x00000283, + 0x03F, 0x0000086A, + 0x033, 0x00000284, + 0x03F, 0x00000C89, + 0x033, 0x00000285, + 0x03F, 0x00000CE8, + 0x033, 0x00000286, + 0x03F, 0x00000CEB, + 0x033, 0x00000287, + 0x03F, 0x00000CEE, + 0x033, 0x00000288, + 0x03F, 0x00000CF1, + 0x033, 0x00000289, + 0x03F, 0x00000CF4, + 0x033, 0x0000028A, + 0x03F, 0x00000CF7, 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x00000200, + 0x033, 0x00000280, 0x03F, 0x00000005, - 0x033, 0x00000201, + 0x033, 0x00000281, 0x03F, 0x00000008, - 0x033, 0x00000202, + 0x033, 0x00000282, 0x03F, 0x0000000B, - 0x033, 0x00000203, + 0x033, 0x00000283, 0x03F, 0x0000000E, - 0x033, 0x00000204, + 0x033, 0x00000284, 0x03F, 0x0000002B, - 0x033, 0x00000205, + 0x033, 0x00000285, 0x03F, 0x0000002E, - 0x033, 0x00000206, + 0x033, 0x00000286, 0x03F, 0x0000006B, - 0x033, 0x00000207, + 0x033, 0x00000287, 0x03F, 0x0000006E, - 0x033, 0x00000208, + 0x033, 0x00000288, 0x03F, 0x00000071, - 0x033, 0x00000209, + 0x033, 0x00000289, 0x03F, 0x00000074, - 0x033, 0x0000020A, + 0x033, 0x0000028A, 0x03F, 0x00000077, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x033, 0x00000200, + 0x033, 0x00000280, 0x03F, 0x00000005, - 0x033, 0x00000201, + 0x033, 0x00000281, 0x03F, 0x00000008, - 0x033, 0x00000202, + 0x033, 0x00000282, 0x03F, 0x0000000B, - 0x033, 0x00000203, + 0x033, 0x00000283, 0x03F, 0x0000000E, - 0x033, 0x00000204, + 0x033, 0x00000284, 0x03F, 0x0000002B, - 0x033, 0x00000205, + 0x033, 0x00000285, 0x03F, 0x0000002E, - 0x033, 0x00000206, + 0x033, 0x00000286, 0x03F, 0x0000006B, - 0x033, 0x00000207, + 0x033, 0x00000287, 0x03F, 0x0000006E, - 0x033, 0x00000208, + 0x033, 0x00000288, 0x03F, 0x00000071, - 0x033, 0x00000209, + 0x033, 0x00000289, 0x03F, 0x00000074, - 0x033, 0x0000020A, + 0x033, 0x0000028A, 0x03F, 0x00000077, - 0xA0000000, 0x00000000, - 0x033, 0x00000200, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000280, + 0x03F, 0x0000006A, + 0x033, 0x00000281, + 0x03F, 0x0000006D, + 0x033, 0x00000282, + 0x03F, 0x0000046A, + 0x033, 0x00000283, + 0x03F, 0x0000086A, + 0x033, 0x00000284, + 0x03F, 0x00000C89, + 0x033, 0x00000285, + 0x03F, 0x00000CE8, + 0x033, 0x00000286, + 0x03F, 0x00000CEB, + 0x033, 0x00000287, + 0x03F, 0x00000CEE, + 0x033, 0x00000288, + 0x03F, 0x00000CF1, + 0x033, 0x00000289, + 0x03F, 0x00000CF4, + 0x033, 0x0000028A, + 0x03F, 0x00000CF7, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000280, + 0x03F, 0x0000006A, + 0x033, 0x00000281, + 0x03F, 0x0000006D, + 0x033, 0x00000282, + 0x03F, 0x0000046A, + 0x033, 0x00000283, + 0x03F, 0x0000086A, + 0x033, 0x00000284, + 0x03F, 0x00000C89, + 0x033, 0x00000285, + 0x03F, 0x00000CE8, + 0x033, 0x00000286, + 0x03F, 0x00000CEB, + 0x033, 0x00000287, + 0x03F, 0x00000CEE, + 0x033, 0x00000288, + 0x03F, 0x00000CF1, + 0x033, 0x00000289, + 0x03F, 0x00000CF4, + 0x033, 0x0000028A, + 0x03F, 0x00000CF7, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000280, 0x03F, 0x0000006A, - 0x033, 0x00000201, + 0x033, 0x00000281, 0x03F, 0x0000006D, - 0x033, 0x00000202, + 0x033, 0x00000282, 0x03F, 0x0000046A, - 0x033, 0x00000203, + 0x033, 0x00000283, 0x03F, 0x0000086A, - 0x033, 0x00000204, + 0x033, 0x00000284, 0x03F, 0x00000C89, - 0x033, 0x00000205, + 0x033, 0x00000285, 0x03F, 0x00000CE8, - 0x033, 0x00000206, + 0x033, 0x00000286, 0x03F, 0x00000CEB, - 0x033, 0x00000207, + 0x033, 0x00000287, 0x03F, 0x00000CEE, - 0x033, 0x00000208, + 0x033, 0x00000288, 0x03F, 0x00000CF1, - 0x033, 0x00000209, + 0x033, 0x00000289, 0x03F, 0x00000CF4, - 0x033, 0x0000020A, + 0x033, 0x0000028A, 0x03F, 0x00000CF7, - 0xB0000000, 0x00000000, - 0x83000015, 0x00000000, 0x40000000, 0x00000000, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000280, - 0x03F, 0x00000005, + 0x03F, 0x0000006A, 0x033, 0x00000281, - 0x03F, 0x00000008, + 0x03F, 0x0000006D, 0x033, 0x00000282, - 0x03F, 0x0000000B, + 0x03F, 0x0000046A, 0x033, 0x00000283, - 0x03F, 0x0000000E, + 0x03F, 0x0000086A, 0x033, 0x00000284, - 0x03F, 0x0000002B, + 0x03F, 0x00000C89, 0x033, 0x00000285, - 0x03F, 0x0000002E, + 0x03F, 0x00000CE8, 0x033, 0x00000286, - 0x03F, 0x0000006B, + 0x03F, 0x00000CEB, 0x033, 0x00000287, - 0x03F, 0x0000006E, + 0x03F, 0x00000CEE, 0x033, 0x00000288, - 0x03F, 0x00000071, + 0x03F, 0x00000CF1, 0x033, 0x00000289, - 0x03F, 0x00000074, + 0x03F, 0x00000CF4, 0x033, 0x0000028A, - 0x03F, 0x00000077, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000CF7, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000280, - 0x03F, 0x00000005, + 0x03F, 0x0000006A, 0x033, 0x00000281, - 0x03F, 0x00000008, + 0x03F, 0x0000006D, 0x033, 0x00000282, - 0x03F, 0x0000000B, + 0x03F, 0x0000046A, 0x033, 0x00000283, - 0x03F, 0x0000000E, + 0x03F, 0x0000086A, 0x033, 0x00000284, - 0x03F, 0x0000002B, + 0x03F, 0x00000C89, 0x033, 0x00000285, - 0x03F, 0x0000002E, + 0x03F, 0x00000CE8, 0x033, 0x00000286, - 0x03F, 0x0000006B, + 0x03F, 0x00000CEB, 0x033, 0x00000287, - 0x03F, 0x0000006E, + 0x03F, 0x00000CEE, 0x033, 0x00000288, - 0x03F, 0x00000071, + 0x03F, 0x00000CF1, 0x033, 0x00000289, - 0x03F, 0x00000074, + 0x03F, 0x00000CF4, 0x033, 0x0000028A, - 0x03F, 0x00000077, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000CF7, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000280, + 0x03F, 0x0000006A, + 0x033, 0x00000281, + 0x03F, 0x0000006D, + 0x033, 0x00000282, + 0x03F, 0x0000046A, + 0x033, 0x00000283, + 0x03F, 0x0000086A, + 0x033, 0x00000284, + 0x03F, 0x00000C89, + 0x033, 0x00000285, + 0x03F, 0x00000CE8, + 0x033, 0x00000286, + 0x03F, 0x00000CEB, + 0x033, 0x00000287, + 0x03F, 0x00000CEE, + 0x033, 0x00000288, + 0x03F, 0x00000CF1, + 0x033, 0x00000289, + 0x03F, 0x00000CF4, + 0x033, 0x0000028A, + 0x03F, 0x00000CF7, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000280, 0x03F, 0x00000005, 0x033, 0x00000281, @@ -19996,7 +33811,7 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000074, 0x033, 0x0000028A, 0x03F, 0x00000077, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000280, 0x03F, 0x00000005, 0x033, 0x00000281, @@ -20022,28 +33837,508 @@ static const u32 rtw8822c_rf_b[] = { 0xA0000000, 0x00000000, 0x033, 0x00000280, 0x03F, 0x0000006A, - 0x033, 0x00000281, + 0x033, 0x00000281, + 0x03F, 0x0000006D, + 0x033, 0x00000282, + 0x03F, 0x0000046A, + 0x033, 0x00000283, + 0x03F, 0x0000086A, + 0x033, 0x00000284, + 0x03F, 0x00000C89, + 0x033, 0x00000285, + 0x03F, 0x00000CE8, + 0x033, 0x00000286, + 0x03F, 0x00000CEB, + 0x033, 0x00000287, + 0x03F, 0x00000CEE, + 0x033, 0x00000288, + 0x03F, 0x00000CF1, + 0x033, 0x00000289, + 0x03F, 0x00000CF4, + 0x033, 0x0000028A, + 0x03F, 0x00000CF7, + 0xB0000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x00000005, + 0x033, 0x00000301, + 0x03F, 0x00000008, + 0x033, 0x00000302, + 0x03F, 0x0000000B, + 0x033, 0x00000303, + 0x03F, 0x0000000E, + 0x033, 0x00000304, + 0x03F, 0x0000002B, + 0x033, 0x00000305, + 0x03F, 0x0000002E, + 0x033, 0x00000306, + 0x03F, 0x00000031, + 0x033, 0x00000307, + 0x03F, 0x00000034, + 0x033, 0x00000308, + 0x03F, 0x00000053, + 0x033, 0x00000309, + 0x03F, 0x00000056, + 0x033, 0x0000030A, + 0x03F, 0x000000D1, + 0x0EE, 0x00000000, + 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x00000005, + 0x033, 0x00000301, + 0x03F, 0x00000008, + 0x033, 0x00000302, + 0x03F, 0x0000000B, + 0x033, 0x00000303, + 0x03F, 0x0000000E, + 0x033, 0x00000304, + 0x03F, 0x0000002B, + 0x033, 0x00000305, + 0x03F, 0x0000002E, + 0x033, 0x00000306, + 0x03F, 0x00000031, + 0x033, 0x00000307, + 0x03F, 0x00000034, + 0x033, 0x00000308, + 0x03F, 0x00000053, + 0x033, 0x00000309, + 0x03F, 0x00000056, + 0x033, 0x0000030A, + 0x03F, 0x000000D1, + 0x0EE, 0x00000000, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, 0x03F, 0x0000006D, - 0x033, 0x00000282, + 0x033, 0x00000302, 0x03F, 0x0000046A, - 0x033, 0x00000283, + 0x033, 0x00000303, 0x03F, 0x0000086A, - 0x033, 0x00000284, + 0x033, 0x00000304, 0x03F, 0x00000C89, - 0x033, 0x00000285, + 0x033, 0x00000305, 0x03F, 0x00000CE8, - 0x033, 0x00000286, + 0x033, 0x00000306, 0x03F, 0x00000CEB, - 0x033, 0x00000287, + 0x033, 0x00000307, 0x03F, 0x00000CEE, - 0x033, 0x00000288, + 0x033, 0x00000308, 0x03F, 0x00000CF1, - 0x033, 0x00000289, + 0x033, 0x00000309, 0x03F, 0x00000CF4, - 0x033, 0x0000028A, + 0x033, 0x0000030A, 0x03F, 0x00000CF7, - 0xB0000000, 0x00000000, - 0x83000015, 0x00000000, 0x40000000, 0x00000000, + 0x0EE, 0x00000000, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000300, 0x03F, 0x00000005, 0x033, 0x00000301, @@ -20067,7 +34362,7 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000030A, 0x03F, 0x000000D1, 0x0EE, 0x00000000, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000300, 0x03F, 0x00000005, 0x033, 0x00000301, @@ -20091,7 +34386,151 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000030A, 0x03F, 0x000000D1, 0x0EE, 0x00000000, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000300, + 0x03F, 0x0000006A, + 0x033, 0x00000301, + 0x03F, 0x0000006D, + 0x033, 0x00000302, + 0x03F, 0x0000046A, + 0x033, 0x00000303, + 0x03F, 0x0000086A, + 0x033, 0x00000304, + 0x03F, 0x00000C89, + 0x033, 0x00000305, + 0x03F, 0x00000CE8, + 0x033, 0x00000306, + 0x03F, 0x00000CEB, + 0x033, 0x00000307, + 0x03F, 0x00000CEE, + 0x033, 0x00000308, + 0x03F, 0x00000CF1, + 0x033, 0x00000309, + 0x03F, 0x00000CF4, + 0x033, 0x0000030A, + 0x03F, 0x00000CF7, + 0x0EE, 0x00000000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000300, 0x03F, 0x00000005, 0x033, 0x00000301, @@ -20115,7 +34554,7 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000030A, 0x03F, 0x000000D1, 0x0EE, 0x00000000, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000300, 0x03F, 0x00000005, 0x033, 0x00000301, @@ -20165,7 +34604,11 @@ static const u32 rtw8822c_rf_b[] = { 0x0EE, 0x00000000, 0xB0000000, 0x00000000, 0x051, 0x0003C800, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000942C0, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000942C0, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x052, 0x000902CA, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x052, 0x000902CA, @@ -20183,6 +34626,8 @@ static const u32 rtw8822c_rf_b[] = { 0x052, 0x000902CA, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x052, 0x000902CA, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x052, 0x000902CA, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -20197,10 +34642,28 @@ static const u32 rtw8822c_rf_b[] = { 0x052, 0x000902CA, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x052, 0x000902CA, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x052, 0x000902CA, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x052, 0x000902CA, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x052, 0x000902CA, 0xA0000000, 0x00000000, 0x052, 0x000942C0, 0xB0000000, 0x00000000, @@ -20209,150 +34672,202 @@ static const u32 rtw8822c_rf_b[] = { 0x057, 0x0004C80A, 0x0EF, 0x00000020, 0x033, 0x00000000, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0xA0000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x0000C246, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x0000C246, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000020, - 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00024246, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000241C6, - 0xA0000000, 0x00000000, - 0x03F, 0x0000C246, - 0xB0000000, 0x00000000, - 0x033, 0x00000001, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000241C6, 0xA0000000, 0x00000000, 0x03E, 0x00000020, + 0x03F, 0x0000C246, 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000001, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x0000C246, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x0000C246, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0xA0000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0000C246, 0xB0000000, 0x00000000, 0x033, 0x00000002, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0000C246, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0000C246, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00024246, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00024246, @@ -20370,6 +34885,8 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002C246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -20384,158 +34901,228 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002C246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, 0xA0000000, 0x00000000, 0x03F, 0x0000C246, 0xB0000000, 0x00000000, 0x033, 0x00000003, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0xA0000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x0000C246, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x0000C246, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000020, - 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00024246, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000241C6, - 0xA0000000, 0x00000000, - 0x03F, 0x0000C246, - 0xB0000000, 0x00000000, - 0x033, 0x00000004, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000241C6, 0xA0000000, 0x00000000, 0x03E, 0x00000020, + 0x03F, 0x0000C246, 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000004, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x0000C246, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x0000C246, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0xA0000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0000C246, 0xB0000000, 0x00000000, 0x033, 0x00000005, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0000C246, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0000C246, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00024246, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00024246, @@ -20553,6 +35140,8 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002C246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -20567,158 +35156,228 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002C246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, 0xA0000000, 0x00000000, 0x03F, 0x0000C246, 0xB0000000, 0x00000000, 0x033, 0x00000006, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0xA0000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x0000C246, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x0000C246, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000020, - 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00024246, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000241C6, - 0xA0000000, 0x00000000, - 0x03F, 0x0000C246, - 0xB0000000, 0x00000000, - 0x033, 0x00000007, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000241C6, 0xA0000000, 0x00000000, 0x03E, 0x00000020, + 0x03F, 0x0000C246, 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000007, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x0000C246, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x0000C246, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0xA0000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0000C246, 0xB0000000, 0x00000000, 0x033, 0x00000008, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0000C246, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0000C246, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00024246, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00024246, @@ -20736,6 +35395,8 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002C246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -20750,158 +35411,228 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002C246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, 0xA0000000, 0x00000000, 0x03F, 0x0000C246, 0xB0000000, 0x00000000, 0x033, 0x00000009, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0xA0000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000020, - 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00024246, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000241C6, - 0xA0000000, 0x00000000, - 0x03F, 0x00008E46, - 0xB0000000, 0x00000000, - 0x033, 0x0000000A, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000241C6, 0xA0000000, 0x00000000, 0x03E, 0x00000020, + 0x03F, 0x00008E46, 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000000A, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0xA0000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x0000000B, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00024246, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00024246, @@ -20919,6 +35650,8 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002C246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -20933,158 +35666,228 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002C246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, 0xA0000000, 0x00000000, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x0000000C, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0xA0000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000020, - 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00024246, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000241C6, - 0xA0000000, 0x00000000, - 0x03F, 0x00008E46, - 0xB0000000, 0x00000000, - 0x033, 0x0000000D, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000241C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000241C6, 0xA0000000, 0x00000000, 0x03E, 0x00000020, + 0x03F, 0x00008E46, 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000000D, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000241C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000241C6, 0xA0000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x0000000E, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00024246, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00024246, @@ -21102,6 +35905,8 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002C246, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -21116,158 +35921,228 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002C246, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002C246, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002C246, 0xA0000000, 0x00000000, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x0000000F, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0xA0000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000020, - 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00024246, 0x91000002, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00024246, - 0x92000001, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00024246, - 0x92000002, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x00024246, - 0x93000001, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0xA0000000, 0x00000000, - 0x03F, 0x00008E46, - 0xB0000000, 0x00000000, - 0x033, 0x00000010, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00024246, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00024246, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00024246, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0xA0000000, 0x00000000, 0x03E, 0x00000020, + 0x03F, 0x00008E46, 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000010, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00024246, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0xA0000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x00000011, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00024246, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x00024246, @@ -21285,6 +36160,8 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002CA46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -21299,158 +36176,228 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002CA46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0xA0000000, 0x00000000, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x00000012, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0xA0000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000020, - 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0xA0000000, 0x00000000, - 0x03F, 0x00008E46, - 0xB0000000, 0x00000000, - 0x033, 0x00000013, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0xA0000000, 0x00000000, 0x03E, 0x00000020, + 0x03F, 0x00008E46, 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000013, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0xA0000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x00000014, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, @@ -21468,6 +36415,8 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002CA46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -21482,158 +36431,228 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002CA46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0xA0000000, 0x00000000, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x00000015, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0xA0000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000020, - 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0xA0000000, 0x00000000, - 0x03F, 0x00008E46, - 0xB0000000, 0x00000000, - 0x033, 0x00000016, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0xA0000000, 0x00000000, 0x03E, 0x00000020, + 0x03F, 0x00008E46, 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000016, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0xA0000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x00000017, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, @@ -21651,6 +36670,8 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002CA46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -21665,158 +36686,228 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002CA46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0xA0000000, 0x00000000, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x00000018, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0xA0000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000020, - 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0xA0000000, 0x00000000, - 0x03F, 0x00008E46, - 0xB0000000, 0x00000000, - 0x033, 0x00000019, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0xA0000000, 0x00000000, 0x03E, 0x00000020, + 0x03F, 0x00008E46, 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000019, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0xA0000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x0000001A, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, @@ -21834,6 +36925,8 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002CA46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -21848,158 +36941,228 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002CA46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0xA0000000, 0x00000000, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x0000001B, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0xA0000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000020, - 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0xA0000000, 0x00000000, - 0x03F, 0x00008E46, - 0xB0000000, 0x00000000, - 0x033, 0x0000001C, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0xA0000000, 0x00000000, 0x03E, 0x00000020, + 0x03F, 0x00008E46, 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001C, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0xA0000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x0000001D, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, @@ -22017,6 +37180,8 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002CA46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -22031,158 +37196,228 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002CA46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0xA0000000, 0x00000000, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x0000001E, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0xA0000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000020, - 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0xA0000000, 0x00000000, - 0x03F, 0x00008E46, - 0xB0000000, 0x00000000, - 0x033, 0x0000001F, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0xA0000000, 0x00000000, 0x03E, 0x00000020, + 0x03F, 0x00008E46, 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x0000001F, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0xA0000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x00000020, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, @@ -22200,6 +37435,8 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002CA46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -22214,371 +37451,513 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002CA46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0xA0000000, 0x00000000, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x00000021, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0xA0000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000020, - 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000015, 0x00000000, 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0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0xA0000000, 0x00000000, 0x03E, 0x00000020, + 0x03F, 0x00008E46, 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000025, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0xA0000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x00000026, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, @@ -22596,6 +37975,8 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002CA46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -22610,158 +37991,228 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002CA46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0xA0000000, 0x00000000, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x00000027, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0xA0000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000020, - 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x000209C6, - 0xA0000000, 0x00000000, - 0x03F, 0x00008E46, - 0xB0000000, 0x00000000, - 0x033, 0x00000028, - 0x83000001, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03E, 0x00000030, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x000209C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x03E, 0x00000030, + 0x03F, 0x000209C6, 0xA0000000, 0x00000000, 0x03E, 0x00000020, + 0x03F, 0x00008E46, 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000028, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x0001CA46, 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, + 0x03F, 0x000209C6, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03E, 0x00000030, 0x03F, 0x000209C6, 0xA0000000, 0x00000000, + 0x03E, 0x00000020, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x00000029, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, @@ -22779,6 +38230,8 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002CA46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, 0x93000016, 0x00000000, 0x40000000, 0x00000000, @@ -22793,16 +38246,38 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x0002CA46, 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0002CA46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0002CA46, 0xA0000000, 0x00000000, 0x03F, 0x00008E46, 0xB0000000, 0x00000000, 0x033, 0x0000002A, 0x03E, 0x00000020, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00008E46, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, 0x91000002, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, @@ -22819,123 +38294,419 @@ static const u32 rtw8822c_rf_b[] = { 0x93000004, 0x00000000, 0x40000000, 0x00000000, 0x03F, 0x0001CA46, 0x93000005, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x0001CA46, + 0x03F, 0x0001CA46, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x0001CA46, + 0xA0000000, 0x00000000, + 0x03F, 0x00008E46, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x0EE, 0x00010000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000487, + 0x033, 0x00000061, + 0x03F, 0x00000887, + 0x033, 0x00000062, + 0x03F, 0x00000947, + 0x033, 0x00000063, + 0x03F, 0x00000D48, + 0x033, 0x00000064, + 0x03F, 0x00000D88, + 0x033, 0x00000065, + 0x03F, 0x00000DE8, + 0x033, 0x00000066, + 0x03F, 0x00000DEB, + 0x033, 0x00000067, + 0x03F, 0x00000DEE, + 0x033, 0x00000068, + 0x03F, 0x00000DF1, + 0x033, 0x00000069, + 0x03F, 0x00000DF4, + 0x033, 0x0000006A, + 0x03F, 0x00000DF7, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000487, + 0x033, 0x00000061, + 0x03F, 0x00000887, + 0x033, 0x00000062, + 0x03F, 0x00000947, + 0x033, 0x00000063, + 0x03F, 0x00000D48, + 0x033, 0x00000064, + 0x03F, 0x00000D88, + 0x033, 0x00000065, + 0x03F, 0x00000DE8, + 0x033, 0x00000066, + 0x03F, 0x00000DEB, + 0x033, 0x00000067, + 0x03F, 0x00000DEE, + 0x033, 0x00000068, + 0x03F, 0x00000DF1, + 0x033, 0x00000069, + 0x03F, 0x00000DF4, + 0x033, 0x0000006A, + 0x03F, 0x00000DF7, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000468, + 0x033, 0x00000061, + 0x03F, 0x00000868, + 0x033, 0x00000062, + 0x03F, 0x00000909, + 0x033, 0x00000063, + 0x03F, 0x00000D0A, + 0x033, 0x00000064, + 0x03F, 0x00000D4A, + 0x033, 0x00000065, + 0x03F, 0x00000D8B, + 0x033, 0x00000066, + 0x03F, 0x00000DEB, + 0x033, 0x00000067, + 0x03F, 0x00000DEE, + 0x033, 0x00000068, + 0x03F, 0x00000DF1, + 0x033, 0x00000069, + 0x03F, 0x00000DF4, + 0x033, 0x0000006A, + 0x03F, 0x00000DF7, + 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000468, + 0x033, 0x00000061, + 0x03F, 0x00000868, + 0x033, 0x00000062, + 0x03F, 0x00000909, + 0x033, 0x00000063, + 0x03F, 0x00000D0A, + 0x033, 0x00000064, + 0x03F, 0x00000D4A, + 0x033, 0x00000065, + 0x03F, 0x00000D8B, + 0x033, 0x00000066, + 0x03F, 0x00000DEB, + 0x033, 0x00000067, + 0x03F, 0x00000DEE, + 0x033, 0x00000068, + 0x03F, 0x00000DF1, + 0x033, 0x00000069, + 0x03F, 0x00000DF4, + 0x033, 0x0000006A, + 0x03F, 0x00000DF7, + 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000468, + 0x033, 0x00000061, + 0x03F, 0x00000868, + 0x033, 0x00000062, + 0x03F, 0x00000909, + 0x033, 0x00000063, + 0x03F, 0x00000D0A, + 0x033, 0x00000064, + 0x03F, 0x00000D4A, + 0x033, 0x00000065, + 0x03F, 0x00000D8B, + 0x033, 0x00000066, + 0x03F, 0x00000DEB, + 0x033, 0x00000067, + 0x03F, 0x00000DEE, + 0x033, 0x00000068, + 0x03F, 0x00000DF1, + 0x033, 0x00000069, + 0x03F, 0x00000DF4, + 0x033, 0x0000006A, + 0x03F, 0x00000DF7, + 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000468, + 0x033, 0x00000061, + 0x03F, 0x00000868, + 0x033, 0x00000062, + 0x03F, 0x00000909, + 0x033, 0x00000063, + 0x03F, 0x00000D0A, + 0x033, 0x00000064, + 0x03F, 0x00000D4A, + 0x033, 0x00000065, + 0x03F, 0x00000D8B, + 0x033, 0x00000066, + 0x03F, 0x00000DEB, + 0x033, 0x00000067, + 0x03F, 0x00000DEE, + 0x033, 0x00000068, + 0x03F, 0x00000DF1, + 0x033, 0x00000069, + 0x03F, 0x00000DF4, + 0x033, 0x0000006A, + 0x03F, 0x00000DF7, + 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000467, + 0x033, 0x00000061, + 0x03F, 0x00000867, + 0x033, 0x00000062, + 0x03F, 0x00000908, + 0x033, 0x00000063, + 0x03F, 0x00000CC6, + 0x033, 0x00000064, + 0x03F, 0x00000CC9, + 0x033, 0x00000065, + 0x03F, 0x00000CCC, + 0x033, 0x00000066, + 0x03F, 0x00000CCF, + 0x033, 0x00000067, + 0x03F, 0x00000CD2, + 0x033, 0x00000068, + 0x03F, 0x00000CD5, + 0x033, 0x00000069, + 0x03F, 0x00000DD4, + 0x033, 0x0000006A, + 0x03F, 0x00000DD7, + 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000467, + 0x033, 0x00000061, + 0x03F, 0x00000867, + 0x033, 0x00000062, + 0x03F, 0x00000908, + 0x033, 0x00000063, + 0x03F, 0x00000CC6, + 0x033, 0x00000064, + 0x03F, 0x00000CC9, + 0x033, 0x00000065, + 0x03F, 0x00000CCC, + 0x033, 0x00000066, + 0x03F, 0x00000CCF, + 0x033, 0x00000067, + 0x03F, 0x00000CD2, + 0x033, 0x00000068, + 0x03F, 0x00000CD5, + 0x033, 0x00000069, + 0x03F, 0x00000DD4, + 0x033, 0x0000006A, + 0x03F, 0x00000DD7, + 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000467, + 0x033, 0x00000061, + 0x03F, 0x00000867, + 0x033, 0x00000062, + 0x03F, 0x00000908, + 0x033, 0x00000063, + 0x03F, 0x00000CC6, + 0x033, 0x00000064, + 0x03F, 0x00000CC9, + 0x033, 0x00000065, + 0x03F, 0x00000CCC, + 0x033, 0x00000066, + 0x03F, 0x00000CCF, + 0x033, 0x00000067, + 0x03F, 0x00000CD2, + 0x033, 0x00000068, + 0x03F, 0x00000CD5, + 0x033, 0x00000069, + 0x03F, 0x00000DD4, + 0x033, 0x0000006A, + 0x03F, 0x00000DD7, + 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000467, + 0x033, 0x00000061, + 0x03F, 0x00000867, + 0x033, 0x00000062, + 0x03F, 0x00000908, + 0x033, 0x00000063, + 0x03F, 0x00000CC6, + 0x033, 0x00000064, + 0x03F, 0x00000CC9, + 0x033, 0x00000065, + 0x03F, 0x00000CCC, + 0x033, 0x00000066, + 0x03F, 0x00000CCF, + 0x033, 0x00000067, + 0x03F, 0x00000CD2, + 0x033, 0x00000068, + 0x03F, 0x00000CD5, + 0x033, 0x00000069, + 0x03F, 0x00000DD4, + 0x033, 0x0000006A, + 0x03F, 0x00000DD7, + 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000467, + 0x033, 0x00000061, + 0x03F, 0x00000867, + 0x033, 0x00000062, + 0x03F, 0x00000908, + 0x033, 0x00000063, + 0x03F, 0x00000CC6, + 0x033, 0x00000064, + 0x03F, 0x00000CC9, + 0x033, 0x00000065, + 0x03F, 0x00000CCC, + 0x033, 0x00000066, + 0x03F, 0x00000CCF, + 0x033, 0x00000067, + 0x03F, 0x00000CD2, + 0x033, 0x00000068, + 0x03F, 0x00000CD5, + 0x033, 0x00000069, + 0x03F, 0x00000DD4, + 0x033, 0x0000006A, + 0x03F, 0x00000DD7, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000060, + 0x03F, 0x00000467, + 0x033, 0x00000061, + 0x03F, 0x00000867, + 0x033, 0x00000062, + 0x03F, 0x00000908, + 0x033, 0x00000063, + 0x03F, 0x00000CC6, + 0x033, 0x00000064, + 0x03F, 0x00000CC9, + 0x033, 0x00000065, + 0x03F, 0x00000CCC, + 0x033, 0x00000066, + 0x03F, 0x00000CCF, + 0x033, 0x00000067, + 0x03F, 0x00000CD2, + 0x033, 0x00000068, + 0x03F, 0x00000CD5, + 0x033, 0x00000069, + 0x03F, 0x00000DD4, + 0x033, 0x0000006A, + 0x03F, 0x00000DD7, 0x93000015, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x0001CA46, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x0001CA46, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x0001CA46, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x0001CA46, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x0001CA46, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x0001CA46, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x0001CA46, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x0001CA46, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, - 0x03F, 0x0001CA46, - 0xA0000000, 0x00000000, - 0x03F, 0x00008E46, - 0xB0000000, 0x00000000, - 0x0EF, 0x00000000, - 0x0EE, 0x00010000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, - 0x03F, 0x00000468, + 0x03F, 0x00000467, 0x033, 0x00000061, - 0x03F, 0x00000868, + 0x03F, 0x00000867, 0x033, 0x00000062, - 0x03F, 0x00000909, + 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D0A, + 0x03F, 0x00000CC6, 0x033, 0x00000064, - 0x03F, 0x00000D4A, + 0x03F, 0x00000CC9, 0x033, 0x00000065, - 0x03F, 0x00000D8B, + 0x03F, 0x00000CCC, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x00000CCF, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x00000CD2, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000CD5, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x91000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x93000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, - 0x03F, 0x00000468, + 0x03F, 0x00000467, 0x033, 0x00000061, - 0x03F, 0x00000868, + 0x03F, 0x00000867, 0x033, 0x00000062, - 0x03F, 0x00000909, + 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D0A, + 0x03F, 0x00000CC6, 0x033, 0x00000064, - 0x03F, 0x00000D4A, + 0x03F, 0x00000CC9, 0x033, 0x00000065, - 0x03F, 0x00000D8B, + 0x03F, 0x00000CCC, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x00000CCF, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x00000CD2, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000CD5, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x92000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x94000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, - 0x03F, 0x00000468, + 0x03F, 0x00000467, 0x033, 0x00000061, - 0x03F, 0x00000868, + 0x03F, 0x00000867, 0x033, 0x00000062, - 0x03F, 0x00000909, + 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D0A, + 0x03F, 0x00000CC6, 0x033, 0x00000064, - 0x03F, 0x00000D4A, + 0x03F, 0x00000CC9, 0x033, 0x00000065, - 0x03F, 0x00000D8B, + 0x03F, 0x00000CCC, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x00000CCF, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x00000CD2, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000CD5, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x92000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x94000002, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, - 0x03F, 0x00000468, + 0x03F, 0x00000467, 0x033, 0x00000061, - 0x03F, 0x00000868, + 0x03F, 0x00000867, 0x033, 0x00000062, - 0x03F, 0x00000909, + 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D0A, + 0x03F, 0x00000CC6, 0x033, 0x00000064, - 0x03F, 0x00000D4A, + 0x03F, 0x00000CC9, 0x033, 0x00000065, - 0x03F, 0x00000D8B, + 0x03F, 0x00000CCC, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x00000CCF, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x00000CD2, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000CD5, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x93000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x94000003, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -22943,22 +38714,22 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x00000CC6, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x00000CC9, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x00000CCC, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x00000CCF, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x00000CD2, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000CD5, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x93000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x94000004, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -22966,22 +38737,22 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x00000CC6, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x00000CC9, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x00000CCC, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x00000CCF, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x00000CD2, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000CD5, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x93000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x94000005, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -22989,22 +38760,22 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x00000CC6, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x00000CC9, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x00000CCC, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x00000CCF, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x00000CD2, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000CD5, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x93000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -23012,22 +38783,22 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x00000CC6, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x00000CC9, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x00000CCC, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x00000CCF, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x00000CD2, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000CD5, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x93000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -23035,22 +38806,22 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x00000CC6, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x00000CC9, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x00000CCC, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x00000CCF, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x00000CD2, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000CD5, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x93000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x94000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -23058,22 +38829,22 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x00000CC6, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x00000CC9, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x00000CCC, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x00000CCF, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x00000CD2, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000CD5, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x93000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -23081,22 +38852,22 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x00000CC6, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x00000CC9, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x00000CCC, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x00000CCF, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x00000CD2, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000CD5, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x94000001, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -23104,22 +38875,22 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x00000CC6, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x00000CC9, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x00000CCC, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x00000CCF, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x00000CD2, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000CD5, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x94000002, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -23127,22 +38898,22 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x00000CC6, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x00000CC9, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x00000CCC, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x00000CCF, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x00000CD2, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000CD5, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x94000003, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -23150,22 +38921,22 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x00000CC6, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x00000CC9, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x00000CCC, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x00000CCF, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x00000CD2, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000CD5, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x94000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -23173,22 +38944,22 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x00000CC6, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x00000CC9, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x00000CCC, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x00000CCF, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x00000CD2, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000CD5, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x94000005, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -23196,22 +38967,22 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x00000CC6, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x00000CC9, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x00000CCC, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x00000CCF, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x00000CD2, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000CD5, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x94000015, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -23219,22 +38990,22 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x00000CC6, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x00000CC9, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x00000CCC, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x00000CCF, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x00000CD2, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000CD5, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, - 0x94000016, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00000DD7, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000467, 0x033, 0x00000061, @@ -23242,21 +39013,21 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x00000062, 0x03F, 0x00000908, 0x033, 0x00000063, - 0x03F, 0x00000D09, + 0x03F, 0x00000CC6, 0x033, 0x00000064, - 0x03F, 0x00000D49, + 0x03F, 0x00000CC9, 0x033, 0x00000065, - 0x03F, 0x00000D8A, + 0x03F, 0x00000CCC, 0x033, 0x00000066, - 0x03F, 0x00000DEB, + 0x03F, 0x00000CCF, 0x033, 0x00000067, - 0x03F, 0x00000DEE, + 0x03F, 0x00000CD2, 0x033, 0x00000068, - 0x03F, 0x00000DF1, + 0x03F, 0x00000CD5, 0x033, 0x00000069, - 0x03F, 0x00000DF4, + 0x03F, 0x00000DD4, 0x033, 0x0000006A, - 0x03F, 0x00000DF7, + 0x03F, 0x00000DD7, 0xA0000000, 0x00000000, 0x033, 0x00000060, 0x03F, 0x00000487, @@ -23281,7 +39052,53 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x0000006A, 0x03F, 0x00000DF7, 0xB0000000, 0x00000000, - 0x81000001, 0x00000000, 0x40000000, 0x00000000, + 0x8f000000, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000487, + 0x033, 0x00000021, + 0x03F, 0x00000887, + 0x033, 0x00000022, + 0x03F, 0x00000947, + 0x033, 0x00000023, + 0x03F, 0x00000D48, + 0x033, 0x00000024, + 0x03F, 0x00000D88, + 0x033, 0x00000025, + 0x03F, 0x00000DE8, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x9f000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000487, + 0x033, 0x00000021, + 0x03F, 0x00000887, + 0x033, 0x00000022, + 0x03F, 0x00000947, + 0x033, 0x00000023, + 0x03F, 0x00000D48, + 0x033, 0x00000024, + 0x03F, 0x00000D88, + 0x033, 0x00000025, + 0x03F, 0x00000DE8, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x91000001, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000020, 0x03F, 0x00000468, 0x033, 0x00000021, @@ -23488,6 +39305,29 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000DF4, 0x033, 0x0000002A, 0x03F, 0x00000DF7, + 0x93000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, 0x93000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000020, 0x03F, 0x00000467, @@ -23649,6 +39489,29 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000DF4, 0x033, 0x0000002A, 0x03F, 0x00000DF7, + 0x94000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, 0x94000015, 0x00000000, 0x40000000, 0x00000000, 0x033, 0x00000020, 0x03F, 0x00000467, @@ -23695,6 +39558,190 @@ static const u32 rtw8822c_rf_b[] = { 0x03F, 0x00000DF4, 0x033, 0x0000002A, 0x03F, 0x00000DF7, + 0x95000001, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x95000002, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x95000003, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x95000004, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x95000005, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x95000006, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x95000015, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, + 0x95000016, 0x00000000, 0x40000000, 0x00000000, + 0x033, 0x00000020, + 0x03F, 0x00000467, + 0x033, 0x00000021, + 0x03F, 0x00000867, + 0x033, 0x00000022, + 0x03F, 0x00000908, + 0x033, 0x00000023, + 0x03F, 0x00000D09, + 0x033, 0x00000024, + 0x03F, 0x00000D49, + 0x033, 0x00000025, + 0x03F, 0x00000D8A, + 0x033, 0x00000026, + 0x03F, 0x00000DEB, + 0x033, 0x00000027, + 0x03F, 0x00000DEE, + 0x033, 0x00000028, + 0x03F, 0x00000DF1, + 0x033, 0x00000029, + 0x03F, 0x00000DF4, + 0x033, 0x0000002A, + 0x03F, 0x00000DF7, 0xA0000000, 0x00000000, 0x033, 0x00000020, 0x03F, 0x00000487, @@ -23770,10 +39817,6 @@ static const u32 rtw8822c_rf_b[] = { 0x033, 0x00000007, 0x03F, 0x00000002, 0x0EF, 0x00000000, - 0x0EF, 0x00080000, - 0x033, 0x00000001, - 0x03F, 0x000916BF, - 0x0EF, 0x00000000, }; RTW_DECL_TABLE_RF_RADIO(rtw8822c_rf_b, B); @@ -24820,7 +40863,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 8, 1, 0, 1, 144, 76, }, { 9, 1, 0, 1, 144, 127, }, { 0, 1, 0, 1, 149, 76, }, - { 2, 1, 0, 1, 149, -128, }, + { 2, 1, 0, 1, 149, 54, }, { 1, 1, 0, 1, 149, 127, }, { 3, 1, 0, 1, 149, 76, }, { 4, 1, 0, 1, 149, 74, }, @@ -24828,9 +40871,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 0, 1, 149, 76, }, { 7, 1, 0, 1, 149, 54, }, { 8, 1, 0, 1, 149, 76, }, - { 9, 1, 0, 1, 149, -128, }, + { 9, 1, 0, 1, 149, 54, }, { 0, 1, 0, 1, 153, 76, }, - { 2, 1, 0, 1, 153, -128, }, + { 2, 1, 0, 1, 153, 54, }, { 1, 1, 0, 1, 153, 127, }, { 3, 1, 0, 1, 153, 76, }, { 4, 1, 0, 1, 153, 74, }, @@ -24838,9 +40881,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 0, 1, 153, 76, }, { 7, 1, 0, 1, 153, 54, }, { 8, 1, 0, 1, 153, 76, }, - { 9, 1, 0, 1, 153, -128, }, + { 9, 1, 0, 1, 153, 54, }, { 0, 1, 0, 1, 157, 76, }, - { 2, 1, 0, 1, 157, -128, }, + { 2, 1, 0, 1, 157, 54, }, { 1, 1, 0, 1, 157, 127, }, { 3, 1, 0, 1, 157, 76, }, { 4, 1, 0, 1, 157, 74, }, @@ -24848,9 +40891,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 0, 1, 157, 76, }, { 7, 1, 0, 1, 157, 54, }, { 8, 1, 0, 1, 157, 76, }, - { 9, 1, 0, 1, 157, -128, }, + { 9, 1, 0, 1, 157, 54, }, { 0, 1, 0, 1, 161, 76, }, - { 2, 1, 0, 1, 161, -128, }, + { 2, 1, 0, 1, 161, 54, }, { 1, 1, 0, 1, 161, 127, }, { 3, 1, 0, 1, 161, 76, }, { 4, 1, 0, 1, 161, 74, }, @@ -24858,9 +40901,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 0, 1, 161, 76, }, { 7, 1, 0, 1, 161, 54, }, { 8, 1, 0, 1, 161, 76, }, - { 9, 1, 0, 1, 161, -128, }, + { 9, 1, 0, 1, 161, 54, }, { 0, 1, 0, 1, 165, 76, }, - { 2, 1, 0, 1, 165, -128, }, + { 2, 1, 0, 1, 165, 54, }, { 1, 1, 0, 1, 165, 127, }, { 3, 1, 0, 1, 165, 76, }, { 4, 1, 0, 1, 165, 74, }, @@ -24868,7 +40911,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 0, 1, 165, 76, }, { 7, 1, 0, 1, 165, 54, }, { 8, 1, 0, 1, 165, 76, }, - { 9, 1, 0, 1, 165, -128, }, + { 9, 1, 0, 1, 165, 54, }, { 0, 1, 0, 2, 36, 72, }, { 2, 1, 0, 2, 36, 62, }, { 1, 1, 0, 2, 36, 62, }, @@ -25070,7 +41113,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 8, 1, 0, 2, 144, 76, }, { 9, 1, 0, 2, 144, 127, }, { 0, 1, 0, 2, 149, 76, }, - { 2, 1, 0, 2, 149, -128, }, + { 2, 1, 0, 2, 149, 54, }, { 1, 1, 0, 2, 149, 127, }, { 3, 1, 0, 2, 149, 76, }, { 4, 1, 0, 2, 149, 74, }, @@ -25078,9 +41121,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 0, 2, 149, 76, }, { 7, 1, 0, 2, 149, 54, }, { 8, 1, 0, 2, 149, 76, }, - { 9, 1, 0, 2, 149, -128, }, + { 9, 1, 0, 2, 149, 54, }, { 0, 1, 0, 2, 153, 76, }, - { 2, 1, 0, 2, 153, -128, }, + { 2, 1, 0, 2, 153, 54, }, { 1, 1, 0, 2, 153, 127, }, { 3, 1, 0, 2, 153, 76, }, { 4, 1, 0, 2, 153, 74, }, @@ -25088,9 +41131,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 0, 2, 153, 76, }, { 7, 1, 0, 2, 153, 54, }, { 8, 1, 0, 2, 153, 76, }, - { 9, 1, 0, 2, 153, -128, }, + { 9, 1, 0, 2, 153, 54, }, { 0, 1, 0, 2, 157, 76, }, - { 2, 1, 0, 2, 157, -128, }, + { 2, 1, 0, 2, 157, 54, }, { 1, 1, 0, 2, 157, 127, }, { 3, 1, 0, 2, 157, 76, }, { 4, 1, 0, 2, 157, 74, }, @@ -25098,9 +41141,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 0, 2, 157, 76, }, { 7, 1, 0, 2, 157, 54, }, { 8, 1, 0, 2, 157, 76, }, - { 9, 1, 0, 2, 157, -128, }, + { 9, 1, 0, 2, 157, 54, }, { 0, 1, 0, 2, 161, 76, }, - { 2, 1, 0, 2, 161, -128, }, + { 2, 1, 0, 2, 161, 54, }, { 1, 1, 0, 2, 161, 127, }, { 3, 1, 0, 2, 161, 76, }, { 4, 1, 0, 2, 161, 74, }, @@ -25108,9 +41151,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 0, 2, 161, 76, }, { 7, 1, 0, 2, 161, 54, }, { 8, 1, 0, 2, 161, 76, }, - { 9, 1, 0, 2, 161, -128, }, + { 9, 1, 0, 2, 161, 54, }, { 0, 1, 0, 2, 165, 76, }, - { 2, 1, 0, 2, 165, -128, }, + { 2, 1, 0, 2, 165, 54, }, { 1, 1, 0, 2, 165, 127, }, { 3, 1, 0, 2, 165, 76, }, { 4, 1, 0, 2, 165, 74, }, @@ -25118,7 +41161,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 0, 2, 165, 76, }, { 7, 1, 0, 2, 165, 54, }, { 8, 1, 0, 2, 165, 76, }, - { 9, 1, 0, 2, 165, -128, }, + { 9, 1, 0, 2, 165, 54, }, { 0, 1, 0, 3, 36, 68, }, { 2, 1, 0, 3, 36, 38, }, { 1, 1, 0, 3, 36, 50, }, @@ -25320,7 +41363,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 8, 1, 0, 3, 144, 68, }, { 9, 1, 0, 3, 144, 127, }, { 0, 1, 0, 3, 149, 76, }, - { 2, 1, 0, 3, 149, -128, }, + { 2, 1, 0, 3, 149, 30, }, { 1, 1, 0, 3, 149, 127, }, { 3, 1, 0, 3, 149, 76, }, { 4, 1, 0, 3, 149, 60, }, @@ -25328,9 +41371,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 0, 3, 149, 76, }, { 7, 1, 0, 3, 149, 30, }, { 8, 1, 0, 3, 149, 72, }, - { 9, 1, 0, 3, 149, -128, }, + { 9, 1, 0, 3, 149, 30, }, { 0, 1, 0, 3, 153, 76, }, - { 2, 1, 0, 3, 153, -128, }, + { 2, 1, 0, 3, 153, 30, }, { 1, 1, 0, 3, 153, 127, }, { 3, 1, 0, 3, 153, 76, }, { 4, 1, 0, 3, 153, 60, }, @@ -25338,9 +41381,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 0, 3, 153, 76, }, { 7, 1, 0, 3, 153, 30, }, { 8, 1, 0, 3, 153, 76, }, - { 9, 1, 0, 3, 153, -128, }, + { 9, 1, 0, 3, 153, 30, }, { 0, 1, 0, 3, 157, 76, }, - { 2, 1, 0, 3, 157, -128, }, + { 2, 1, 0, 3, 157, 30, }, { 1, 1, 0, 3, 157, 127, }, { 3, 1, 0, 3, 157, 76, }, { 4, 1, 0, 3, 157, 60, }, @@ -25348,9 +41391,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 0, 3, 157, 76, }, { 7, 1, 0, 3, 157, 30, }, { 8, 1, 0, 3, 157, 76, }, - { 9, 1, 0, 3, 157, -128, }, + { 9, 1, 0, 3, 157, 30, }, { 0, 1, 0, 3, 161, 76, }, - { 2, 1, 0, 3, 161, -128, }, + { 2, 1, 0, 3, 161, 30, }, { 1, 1, 0, 3, 161, 127, }, { 3, 1, 0, 3, 161, 76, }, { 4, 1, 0, 3, 161, 60, }, @@ -25358,9 +41401,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 0, 3, 161, 76, }, { 7, 1, 0, 3, 161, 30, }, { 8, 1, 0, 3, 161, 76, }, - { 9, 1, 0, 3, 161, -128, }, + { 9, 1, 0, 3, 161, 30, }, { 0, 1, 0, 3, 165, 76, }, - { 2, 1, 0, 3, 165, -128, }, + { 2, 1, 0, 3, 165, 30, }, { 1, 1, 0, 3, 165, 127, }, { 3, 1, 0, 3, 165, 76, }, { 4, 1, 0, 3, 165, 60, }, @@ -25368,7 +41411,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 0, 3, 165, 76, }, { 7, 1, 0, 3, 165, 30, }, { 8, 1, 0, 3, 165, 76, }, - { 9, 1, 0, 3, 165, -128, }, + { 9, 1, 0, 3, 165, 30, }, { 0, 1, 1, 2, 38, 66, }, { 2, 1, 1, 2, 38, 64, }, { 1, 1, 1, 2, 38, 62, }, @@ -25470,7 +41513,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 8, 1, 1, 2, 142, 72, }, { 9, 1, 1, 2, 142, 127, }, { 0, 1, 1, 2, 151, 72, }, - { 2, 1, 1, 2, 151, -128, }, + { 2, 1, 1, 2, 151, 54, }, { 1, 1, 1, 2, 151, 127, }, { 3, 1, 1, 2, 151, 72, }, { 4, 1, 1, 2, 151, 72, }, @@ -25478,9 +41521,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 1, 2, 151, 72, }, { 7, 1, 1, 2, 151, 54, }, { 8, 1, 1, 2, 151, 72, }, - { 9, 1, 1, 2, 151, -128, }, + { 9, 1, 1, 2, 151, 54, }, { 0, 1, 1, 2, 159, 72, }, - { 2, 1, 1, 2, 159, -128, }, + { 2, 1, 1, 2, 159, 54, }, { 1, 1, 1, 2, 159, 127, }, { 3, 1, 1, 2, 159, 72, }, { 4, 1, 1, 2, 159, 72, }, @@ -25488,7 +41531,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 1, 2, 159, 72, }, { 7, 1, 1, 2, 159, 54, }, { 8, 1, 1, 2, 159, 72, }, - { 9, 1, 1, 2, 159, -128, }, + { 9, 1, 1, 2, 159, 54, }, { 0, 1, 1, 3, 38, 60, }, { 2, 1, 1, 3, 38, 40, }, { 1, 1, 1, 3, 38, 50, }, @@ -25590,7 +41633,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 8, 1, 1, 3, 142, 68, }, { 9, 1, 1, 3, 142, 127, }, { 0, 1, 1, 3, 151, 72, }, - { 2, 1, 1, 3, 151, -128, }, + { 2, 1, 1, 3, 151, 30, }, { 1, 1, 1, 3, 151, 127, }, { 3, 1, 1, 3, 151, 72, }, { 4, 1, 1, 3, 151, 66, }, @@ -25598,9 +41641,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 1, 3, 151, 72, }, { 7, 1, 1, 3, 151, 30, }, { 8, 1, 1, 3, 151, 68, }, - { 9, 1, 1, 3, 151, -128, }, + { 9, 1, 1, 3, 151, 30, }, { 0, 1, 1, 3, 159, 72, }, - { 2, 1, 1, 3, 159, -128, }, + { 2, 1, 1, 3, 159, 30, }, { 1, 1, 1, 3, 159, 127, }, { 3, 1, 1, 3, 159, 72, }, { 4, 1, 1, 3, 159, 66, }, @@ -25608,7 +41651,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 1, 3, 159, 72, }, { 7, 1, 1, 3, 159, 30, }, { 8, 1, 1, 3, 159, 72, }, - { 9, 1, 1, 3, 159, -128, }, + { 9, 1, 1, 3, 159, 30, }, { 0, 1, 2, 4, 42, 64, }, { 2, 1, 2, 4, 42, 64, }, { 1, 1, 2, 4, 42, 64, }, @@ -25660,7 +41703,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 8, 1, 2, 4, 138, 72, }, { 9, 1, 2, 4, 138, 127, }, { 0, 1, 2, 4, 155, 72, }, - { 2, 1, 2, 4, 155, -128, }, + { 2, 1, 2, 4, 155, 54, }, { 1, 1, 2, 4, 155, 127, }, { 3, 1, 2, 4, 155, 72, }, { 4, 1, 2, 4, 155, 68, }, @@ -25668,7 +41711,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 2, 4, 155, 72, }, { 7, 1, 2, 4, 155, 54, }, { 8, 1, 2, 4, 155, 68, }, - { 9, 1, 2, 4, 155, -128, }, + { 9, 1, 2, 4, 155, 54, }, { 0, 1, 2, 5, 42, 54, }, { 2, 1, 2, 5, 42, 40, }, { 1, 1, 2, 5, 42, 50, }, @@ -25720,7 +41763,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 8, 1, 2, 5, 138, 66, }, { 9, 1, 2, 5, 138, 127, }, { 0, 1, 2, 5, 155, 62, }, - { 2, 1, 2, 5, 155, -128, }, + { 2, 1, 2, 5, 155, 30, }, { 1, 1, 2, 5, 155, 127, }, { 3, 1, 2, 5, 155, 62, }, { 4, 1, 2, 5, 155, 58, }, @@ -25728,145 +41771,145 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type0[] = { { 6, 1, 2, 5, 155, 62, }, { 7, 1, 2, 5, 155, 30, }, { 8, 1, 2, 5, 155, 62, }, - { 9, 1, 2, 5, 155, -128, }, + { 9, 1, 2, 5, 155, 30, }, }; RTW_DECL_TABLE_TXPWR_LMT(rtw8822c_txpwr_lmt_type0); static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 0, 0, 0, 0, 1, 72, }, - { 2, 0, 0, 0, 1, 60, }, - { 1, 0, 0, 0, 1, 68, }, + { 2, 0, 0, 0, 1, 56, }, + { 1, 0, 0, 0, 1, 72, }, { 3, 0, 0, 0, 1, 72, }, { 4, 0, 0, 0, 1, 76, }, - { 5, 0, 0, 0, 1, 60, }, + { 5, 0, 0, 0, 1, 56, }, { 6, 0, 0, 0, 1, 72, }, { 7, 0, 0, 0, 1, 60, }, { 8, 0, 0, 0, 1, 72, }, { 9, 0, 0, 0, 1, 60, }, { 0, 0, 0, 0, 2, 72, }, - { 2, 0, 0, 0, 2, 60, }, - { 1, 0, 0, 0, 2, 68, }, + { 2, 0, 0, 0, 2, 56, }, + { 1, 0, 0, 0, 2, 72, }, { 3, 0, 0, 0, 2, 72, }, { 4, 0, 0, 0, 2, 76, }, - { 5, 0, 0, 0, 2, 60, }, + { 5, 0, 0, 0, 2, 56, }, { 6, 0, 0, 0, 2, 72, }, { 7, 0, 0, 0, 2, 60, }, { 8, 0, 0, 0, 2, 72, }, { 9, 0, 0, 0, 2, 60, }, { 0, 0, 0, 0, 3, 76, }, - { 2, 0, 0, 0, 3, 60, }, - { 1, 0, 0, 0, 3, 68, }, + { 2, 0, 0, 0, 3, 56, }, + { 1, 0, 0, 0, 3, 72, }, { 3, 0, 0, 0, 3, 76, }, { 4, 0, 0, 0, 3, 76, }, - { 5, 0, 0, 0, 3, 60, }, + { 5, 0, 0, 0, 3, 56, }, { 6, 0, 0, 0, 3, 76, }, { 7, 0, 0, 0, 3, 60, }, { 8, 0, 0, 0, 3, 76, }, { 9, 0, 0, 0, 3, 60, }, { 0, 0, 0, 0, 4, 76, }, - { 2, 0, 0, 0, 4, 60, }, - { 1, 0, 0, 0, 4, 68, }, + { 2, 0, 0, 0, 4, 56, }, + { 1, 0, 0, 0, 4, 72, }, { 3, 0, 0, 0, 4, 76, }, { 4, 0, 0, 0, 4, 76, }, - { 5, 0, 0, 0, 4, 60, }, + { 5, 0, 0, 0, 4, 56, }, { 6, 0, 0, 0, 4, 76, }, { 7, 0, 0, 0, 4, 60, }, { 8, 0, 0, 0, 4, 76, }, { 9, 0, 0, 0, 4, 60, }, { 0, 0, 0, 0, 5, 76, }, - { 2, 0, 0, 0, 5, 60, }, - { 1, 0, 0, 0, 5, 68, }, + { 2, 0, 0, 0, 5, 56, }, + { 1, 0, 0, 0, 5, 72, }, { 3, 0, 0, 0, 5, 76, }, { 4, 0, 0, 0, 5, 76, }, - { 5, 0, 0, 0, 5, 60, }, + { 5, 0, 0, 0, 5, 56, }, { 6, 0, 0, 0, 5, 76, }, { 7, 0, 0, 0, 5, 60, }, { 8, 0, 0, 0, 5, 76, }, { 9, 0, 0, 0, 5, 60, }, { 0, 0, 0, 0, 6, 76, }, - { 2, 0, 0, 0, 6, 60, }, - { 1, 0, 0, 0, 6, 68, }, + { 2, 0, 0, 0, 6, 56, }, + { 1, 0, 0, 0, 6, 72, }, { 3, 0, 0, 0, 6, 76, }, { 4, 0, 0, 0, 6, 76, }, - { 5, 0, 0, 0, 6, 60, }, + { 5, 0, 0, 0, 6, 56, }, { 6, 0, 0, 0, 6, 76, }, { 7, 0, 0, 0, 6, 60, }, { 8, 0, 0, 0, 6, 76, }, { 9, 0, 0, 0, 6, 60, }, { 0, 0, 0, 0, 7, 76, }, - { 2, 0, 0, 0, 7, 60, }, - { 1, 0, 0, 0, 7, 68, }, + { 2, 0, 0, 0, 7, 56, }, + { 1, 0, 0, 0, 7, 72, }, { 3, 0, 0, 0, 7, 76, }, { 4, 0, 0, 0, 7, 76, }, - { 5, 0, 0, 0, 7, 60, }, + { 5, 0, 0, 0, 7, 56, }, { 6, 0, 0, 0, 7, 76, }, { 7, 0, 0, 0, 7, 60, }, { 8, 0, 0, 0, 7, 76, }, { 9, 0, 0, 0, 7, 60, }, { 0, 0, 0, 0, 8, 76, }, - { 2, 0, 0, 0, 8, 60, }, - { 1, 0, 0, 0, 8, 68, }, + { 2, 0, 0, 0, 8, 56, }, + { 1, 0, 0, 0, 8, 72, }, { 3, 0, 0, 0, 8, 76, }, { 4, 0, 0, 0, 8, 76, }, - { 5, 0, 0, 0, 8, 60, }, + { 5, 0, 0, 0, 8, 56, }, { 6, 0, 0, 0, 8, 76, }, { 7, 0, 0, 0, 8, 60, }, { 8, 0, 0, 0, 8, 76, }, { 9, 0, 0, 0, 8, 60, }, { 0, 0, 0, 0, 9, 76, }, - { 2, 0, 0, 0, 9, 60, }, - { 1, 0, 0, 0, 9, 68, }, + { 2, 0, 0, 0, 9, 56, }, + { 1, 0, 0, 0, 9, 72, }, { 3, 0, 0, 0, 9, 76, }, { 4, 0, 0, 0, 9, 76, }, - { 5, 0, 0, 0, 9, 60, }, + { 5, 0, 0, 0, 9, 56, }, { 6, 0, 0, 0, 9, 76, }, { 7, 0, 0, 0, 9, 60, }, { 8, 0, 0, 0, 9, 76, }, { 9, 0, 0, 0, 9, 60, }, { 0, 0, 0, 0, 10, 72, }, - { 2, 0, 0, 0, 10, 60, }, - { 1, 0, 0, 0, 10, 68, }, + { 2, 0, 0, 0, 10, 56, }, + { 1, 0, 0, 0, 10, 72, }, { 3, 0, 0, 0, 10, 72, }, { 4, 0, 0, 0, 10, 76, }, - { 5, 0, 0, 0, 10, 60, }, + { 5, 0, 0, 0, 10, 56, }, { 6, 0, 0, 0, 10, 72, }, { 7, 0, 0, 0, 10, 60, }, { 8, 0, 0, 0, 10, 72, }, { 9, 0, 0, 0, 10, 60, }, { 0, 0, 0, 0, 11, 72, }, - { 2, 0, 0, 0, 11, 60, }, - { 1, 0, 0, 0, 11, 68, }, + { 2, 0, 0, 0, 11, 56, }, + { 1, 0, 0, 0, 11, 72, }, { 3, 0, 0, 0, 11, 72, }, { 4, 0, 0, 0, 11, 76, }, - { 5, 0, 0, 0, 11, 60, }, + { 5, 0, 0, 0, 11, 56, }, { 6, 0, 0, 0, 11, 72, }, { 7, 0, 0, 0, 11, 60, }, { 8, 0, 0, 0, 11, 72, }, { 9, 0, 0, 0, 11, 60, }, { 0, 0, 0, 0, 12, 44, }, - { 2, 0, 0, 0, 12, 60, }, - { 1, 0, 0, 0, 12, 68, }, + { 2, 0, 0, 0, 12, 56, }, + { 1, 0, 0, 0, 12, 72, }, { 3, 0, 0, 0, 12, 52, }, { 4, 0, 0, 0, 12, 76, }, - { 5, 0, 0, 0, 12, 60, }, + { 5, 0, 0, 0, 12, 56, }, { 6, 0, 0, 0, 12, 52, }, { 7, 0, 0, 0, 12, 60, }, { 8, 0, 0, 0, 12, 52, }, { 9, 0, 0, 0, 12, 60, }, { 0, 0, 0, 0, 13, 40, }, - { 2, 0, 0, 0, 13, 60, }, - { 1, 0, 0, 0, 13, 68, }, + { 2, 0, 0, 0, 13, 56, }, + { 1, 0, 0, 0, 13, 72, }, { 3, 0, 0, 0, 13, 48, }, { 4, 0, 0, 0, 13, 76, }, - { 5, 0, 0, 0, 13, 60, }, + { 5, 0, 0, 0, 13, 56, }, { 6, 0, 0, 0, 13, 48, }, { 7, 0, 0, 0, 13, 60, }, { 8, 0, 0, 0, 13, 48, }, { 9, 0, 0, 0, 13, 60, }, { 0, 0, 0, 0, 14, 127, }, { 2, 0, 0, 0, 14, 127, }, - { 1, 0, 0, 0, 14, 68, }, + { 1, 0, 0, 0, 14, 72, }, { 3, 0, 0, 0, 14, 127, }, { 4, 0, 0, 0, 14, 127, }, { 5, 0, 0, 0, 14, 127, }, @@ -25998,7 +42041,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 0, 0, 1, 13, 60, }, { 1, 0, 0, 1, 13, 76, }, { 3, 0, 0, 1, 13, 28, }, - { 4, 0, 0, 1, 13, 70, }, + { 4, 0, 0, 1, 13, 74, }, { 5, 0, 0, 1, 13, 60, }, { 6, 0, 0, 1, 13, 28, }, { 7, 0, 0, 1, 13, 60, }, @@ -26138,7 +42181,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 0, 0, 2, 13, 60, }, { 1, 0, 0, 2, 13, 76, }, { 3, 0, 0, 2, 13, 28, }, - { 4, 0, 0, 2, 13, 72, }, + { 4, 0, 0, 2, 13, 74, }, { 5, 0, 0, 2, 13, 60, }, { 6, 0, 0, 2, 13, 28, }, { 7, 0, 0, 2, 13, 60, }, @@ -26158,7 +42201,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 0, 0, 3, 1, 36, }, { 1, 0, 0, 3, 1, 66, }, { 3, 0, 0, 3, 1, 52, }, - { 4, 0, 0, 3, 1, 68, }, + { 4, 0, 0, 3, 1, 72, }, { 5, 0, 0, 3, 1, 36, }, { 6, 0, 0, 3, 1, 52, }, { 7, 0, 0, 3, 1, 36, }, @@ -26168,7 +42211,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 0, 0, 3, 2, 36, }, { 1, 0, 0, 3, 2, 66, }, { 3, 0, 0, 3, 2, 60, }, - { 4, 0, 0, 3, 2, 70, }, + { 4, 0, 0, 3, 2, 72, }, { 5, 0, 0, 3, 2, 36, }, { 6, 0, 0, 3, 2, 60, }, { 7, 0, 0, 3, 2, 36, }, @@ -26178,7 +42221,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 0, 0, 3, 3, 36, }, { 1, 0, 0, 3, 3, 66, }, { 3, 0, 0, 3, 3, 64, }, - { 4, 0, 0, 3, 3, 70, }, + { 4, 0, 0, 3, 3, 72, }, { 5, 0, 0, 3, 3, 36, }, { 6, 0, 0, 3, 3, 64, }, { 7, 0, 0, 3, 3, 36, }, @@ -26188,7 +42231,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 0, 0, 3, 4, 36, }, { 1, 0, 0, 3, 4, 66, }, { 3, 0, 0, 3, 4, 68, }, - { 4, 0, 0, 3, 4, 70, }, + { 4, 0, 0, 3, 4, 72, }, { 5, 0, 0, 3, 4, 36, }, { 6, 0, 0, 3, 4, 68, }, { 7, 0, 0, 3, 4, 36, }, @@ -26198,7 +42241,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 0, 0, 3, 5, 36, }, { 1, 0, 0, 3, 5, 66, }, { 3, 0, 0, 3, 5, 76, }, - { 4, 0, 0, 3, 5, 70, }, + { 4, 0, 0, 3, 5, 72, }, { 5, 0, 0, 3, 5, 36, }, { 6, 0, 0, 3, 5, 76, }, { 7, 0, 0, 3, 5, 36, }, @@ -26208,7 +42251,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 0, 0, 3, 6, 36, }, { 1, 0, 0, 3, 6, 66, }, { 3, 0, 0, 3, 6, 76, }, - { 4, 0, 0, 3, 6, 70, }, + { 4, 0, 0, 3, 6, 72, }, { 5, 0, 0, 3, 6, 36, }, { 6, 0, 0, 3, 6, 76, }, { 7, 0, 0, 3, 6, 36, }, @@ -26218,7 +42261,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 0, 0, 3, 7, 36, }, { 1, 0, 0, 3, 7, 66, }, { 3, 0, 0, 3, 7, 76, }, - { 4, 0, 0, 3, 7, 70, }, + { 4, 0, 0, 3, 7, 72, }, { 5, 0, 0, 3, 7, 36, }, { 6, 0, 0, 3, 7, 76, }, { 7, 0, 0, 3, 7, 36, }, @@ -26228,7 +42271,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 0, 0, 3, 8, 36, }, { 1, 0, 0, 3, 8, 66, }, { 3, 0, 0, 3, 8, 68, }, - { 4, 0, 0, 3, 8, 70, }, + { 4, 0, 0, 3, 8, 72, }, { 5, 0, 0, 3, 8, 36, }, { 6, 0, 0, 3, 8, 68, }, { 7, 0, 0, 3, 8, 36, }, @@ -26238,7 +42281,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 0, 0, 3, 9, 36, }, { 1, 0, 0, 3, 9, 66, }, { 3, 0, 0, 3, 9, 64, }, - { 4, 0, 0, 3, 9, 70, }, + { 4, 0, 0, 3, 9, 72, }, { 5, 0, 0, 3, 9, 36, }, { 6, 0, 0, 3, 9, 64, }, { 7, 0, 0, 3, 9, 36, }, @@ -26248,7 +42291,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 0, 0, 3, 10, 36, }, { 1, 0, 0, 3, 10, 66, }, { 3, 0, 0, 3, 10, 60, }, - { 4, 0, 0, 3, 10, 70, }, + { 4, 0, 0, 3, 10, 72, }, { 5, 0, 0, 3, 10, 36, }, { 6, 0, 0, 3, 10, 60, }, { 7, 0, 0, 3, 10, 36, }, @@ -26258,7 +42301,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 0, 0, 3, 11, 36, }, { 1, 0, 0, 3, 11, 66, }, { 3, 0, 0, 3, 11, 52, }, - { 4, 0, 0, 3, 11, 70, }, + { 4, 0, 0, 3, 11, 72, }, { 5, 0, 0, 3, 11, 36, }, { 6, 0, 0, 3, 11, 52, }, { 7, 0, 0, 3, 11, 36, }, @@ -26268,7 +42311,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 0, 0, 3, 12, 36, }, { 1, 0, 0, 3, 12, 66, }, { 3, 0, 0, 3, 12, 40, }, - { 4, 0, 0, 3, 12, 70, }, + { 4, 0, 0, 3, 12, 72, }, { 5, 0, 0, 3, 12, 36, }, { 6, 0, 0, 3, 12, 40, }, { 7, 0, 0, 3, 12, 36, }, @@ -26278,7 +42321,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 0, 0, 3, 13, 36, }, { 1, 0, 0, 3, 13, 66, }, { 3, 0, 0, 3, 13, 28, }, - { 4, 0, 0, 3, 13, 62, }, + { 4, 0, 0, 3, 13, 68, }, { 5, 0, 0, 3, 13, 36, }, { 6, 0, 0, 3, 13, 28, }, { 7, 0, 0, 3, 13, 36, }, @@ -26458,7 +42501,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 0, 1, 3, 3, 36, }, { 1, 0, 1, 3, 3, 66, }, { 3, 0, 1, 3, 3, 48, }, - { 4, 0, 1, 3, 3, 66, }, + { 4, 0, 1, 3, 3, 68, }, { 5, 0, 1, 3, 3, 36, }, { 6, 0, 1, 3, 3, 48, }, { 7, 0, 1, 3, 3, 36, }, @@ -26575,137 +42618,137 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 8, 0, 1, 3, 14, 127, }, { 9, 0, 1, 3, 14, 127, }, { 0, 1, 0, 1, 36, 74, }, - { 2, 1, 0, 1, 36, 62, }, - { 1, 1, 0, 1, 36, 60, }, + { 2, 1, 0, 1, 36, 58, }, + { 1, 1, 0, 1, 36, 62, }, { 3, 1, 0, 1, 36, 62, }, - { 4, 1, 0, 1, 36, 76, }, - { 5, 1, 0, 1, 36, 62, }, + { 4, 1, 0, 1, 36, 74, }, + { 5, 1, 0, 1, 36, 58, }, { 6, 1, 0, 1, 36, 64, }, { 7, 1, 0, 1, 36, 54, }, { 8, 1, 0, 1, 36, 62, }, { 9, 1, 0, 1, 36, 62, }, { 0, 1, 0, 1, 40, 76, }, - { 2, 1, 0, 1, 40, 62, }, + { 2, 1, 0, 1, 40, 58, }, { 1, 1, 0, 1, 40, 62, }, { 3, 1, 0, 1, 40, 62, }, { 4, 1, 0, 1, 40, 76, }, - { 5, 1, 0, 1, 40, 62, }, + { 5, 1, 0, 1, 40, 58, }, { 6, 1, 0, 1, 40, 64, }, { 7, 1, 0, 1, 40, 54, }, { 8, 1, 0, 1, 40, 62, }, { 9, 1, 0, 1, 40, 62, }, { 0, 1, 0, 1, 44, 76, }, - { 2, 1, 0, 1, 44, 62, }, + { 2, 1, 0, 1, 44, 58, }, { 1, 1, 0, 1, 44, 62, }, { 3, 1, 0, 1, 44, 62, }, { 4, 1, 0, 1, 44, 76, }, - { 5, 1, 0, 1, 44, 62, }, + { 5, 1, 0, 1, 44, 58, }, { 6, 1, 0, 1, 44, 64, }, { 7, 1, 0, 1, 44, 54, }, { 8, 1, 0, 1, 44, 62, }, { 9, 1, 0, 1, 44, 62, }, { 0, 1, 0, 1, 48, 76, }, - { 2, 1, 0, 1, 48, 62, }, + { 2, 1, 0, 1, 48, 58, }, { 1, 1, 0, 1, 48, 62, }, { 3, 1, 0, 1, 48, 62, }, - { 4, 1, 0, 1, 48, 54, }, - { 5, 1, 0, 1, 48, 62, }, + { 4, 1, 0, 1, 48, 58, }, + { 5, 1, 0, 1, 48, 58, }, { 6, 1, 0, 1, 48, 64, }, { 7, 1, 0, 1, 48, 54, }, { 8, 1, 0, 1, 48, 62, }, { 9, 1, 0, 1, 48, 62, }, { 0, 1, 0, 1, 52, 76, }, - { 2, 1, 0, 1, 52, 62, }, + { 2, 1, 0, 1, 52, 58, }, { 1, 1, 0, 1, 52, 62, }, { 3, 1, 0, 1, 52, 64, }, { 4, 1, 0, 1, 52, 76, }, - { 5, 1, 0, 1, 52, 62, }, + { 5, 1, 0, 1, 52, 58, }, { 6, 1, 0, 1, 52, 76, }, { 7, 1, 0, 1, 52, 54, }, { 8, 1, 0, 1, 52, 76, }, { 9, 1, 0, 1, 52, 62, }, { 0, 1, 0, 1, 56, 76, }, - { 2, 1, 0, 1, 56, 62, }, + { 2, 1, 0, 1, 56, 58, }, { 1, 1, 0, 1, 56, 62, }, { 3, 1, 0, 1, 56, 64, }, { 4, 1, 0, 1, 56, 76, }, - { 5, 1, 0, 1, 56, 62, }, + { 5, 1, 0, 1, 56, 58, }, { 6, 1, 0, 1, 56, 76, }, { 7, 1, 0, 1, 56, 54, }, { 8, 1, 0, 1, 56, 76, }, { 9, 1, 0, 1, 56, 62, }, { 0, 1, 0, 1, 60, 76, }, - { 2, 1, 0, 1, 60, 62, }, + { 2, 1, 0, 1, 60, 58, }, { 1, 1, 0, 1, 60, 62, }, { 3, 1, 0, 1, 60, 64, }, { 4, 1, 0, 1, 60, 76, }, - { 5, 1, 0, 1, 60, 62, }, + { 5, 1, 0, 1, 60, 58, }, { 6, 1, 0, 1, 60, 76, }, { 7, 1, 0, 1, 60, 54, }, { 8, 1, 0, 1, 60, 76, }, { 9, 1, 0, 1, 60, 62, }, - { 0, 1, 0, 1, 64, 74, }, - { 2, 1, 0, 1, 64, 62, }, - { 1, 1, 0, 1, 64, 60, }, + { 0, 1, 0, 1, 64, 76, }, + { 2, 1, 0, 1, 64, 58, }, + { 1, 1, 0, 1, 64, 62, }, { 3, 1, 0, 1, 64, 64, }, { 4, 1, 0, 1, 64, 76, }, - { 5, 1, 0, 1, 64, 62, }, + { 5, 1, 0, 1, 64, 58, }, { 6, 1, 0, 1, 64, 74, }, { 7, 1, 0, 1, 64, 54, }, { 8, 1, 0, 1, 64, 74, }, { 9, 1, 0, 1, 64, 62, }, - { 0, 1, 0, 1, 100, 72, }, - { 2, 1, 0, 1, 100, 62, }, + { 0, 1, 0, 1, 100, 68, }, + { 2, 1, 0, 1, 100, 58, }, { 1, 1, 0, 1, 100, 76, }, - { 3, 1, 0, 1, 100, 72, }, + { 3, 1, 0, 1, 100, 68, }, { 4, 1, 0, 1, 100, 76, }, - { 5, 1, 0, 1, 100, 62, }, + { 5, 1, 0, 1, 100, 58, }, { 6, 1, 0, 1, 100, 72, }, { 7, 1, 0, 1, 100, 54, }, { 8, 1, 0, 1, 100, 72, }, { 9, 1, 0, 1, 100, 127, }, { 0, 1, 0, 1, 104, 76, }, - { 2, 1, 0, 1, 104, 62, }, + { 2, 1, 0, 1, 104, 58, }, { 1, 1, 0, 1, 104, 76, }, { 3, 1, 0, 1, 104, 76, }, { 4, 1, 0, 1, 104, 76, }, - { 5, 1, 0, 1, 104, 62, }, + { 5, 1, 0, 1, 104, 58, }, { 6, 1, 0, 1, 104, 76, }, { 7, 1, 0, 1, 104, 54, }, { 8, 1, 0, 1, 104, 76, }, { 9, 1, 0, 1, 104, 127, }, { 0, 1, 0, 1, 108, 76, }, - { 2, 1, 0, 1, 108, 62, }, + { 2, 1, 0, 1, 108, 58, }, { 1, 1, 0, 1, 108, 76, }, { 3, 1, 0, 1, 108, 76, }, { 4, 1, 0, 1, 108, 76, }, - { 5, 1, 0, 1, 108, 62, }, + { 5, 1, 0, 1, 108, 58, }, { 6, 1, 0, 1, 108, 76, }, { 7, 1, 0, 1, 108, 54, }, { 8, 1, 0, 1, 108, 76, }, { 9, 1, 0, 1, 108, 127, }, { 0, 1, 0, 1, 112, 76, }, - { 2, 1, 0, 1, 112, 62, }, + { 2, 1, 0, 1, 112, 58, }, { 1, 1, 0, 1, 112, 76, }, { 3, 1, 0, 1, 112, 76, }, { 4, 1, 0, 1, 112, 76, }, - { 5, 1, 0, 1, 112, 62, }, + { 5, 1, 0, 1, 112, 58, }, { 6, 1, 0, 1, 112, 76, }, { 7, 1, 0, 1, 112, 54, }, { 8, 1, 0, 1, 112, 76, }, { 9, 1, 0, 1, 112, 127, }, { 0, 1, 0, 1, 116, 76, }, - { 2, 1, 0, 1, 116, 62, }, + { 2, 1, 0, 1, 116, 58, }, { 1, 1, 0, 1, 116, 76, }, { 3, 1, 0, 1, 116, 76, }, { 4, 1, 0, 1, 116, 76, }, - { 5, 1, 0, 1, 116, 62, }, + { 5, 1, 0, 1, 116, 58, }, { 6, 1, 0, 1, 116, 76, }, { 7, 1, 0, 1, 116, 54, }, { 8, 1, 0, 1, 116, 76, }, { 9, 1, 0, 1, 116, 127, }, { 0, 1, 0, 1, 120, 76, }, - { 2, 1, 0, 1, 120, 62, }, + { 2, 1, 0, 1, 120, 58, }, { 1, 1, 0, 1, 120, 76, }, { 3, 1, 0, 1, 120, 127, }, { 4, 1, 0, 1, 120, 76, }, @@ -26715,7 +42758,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 8, 1, 0, 1, 120, 76, }, { 9, 1, 0, 1, 120, 127, }, { 0, 1, 0, 1, 124, 76, }, - { 2, 1, 0, 1, 124, 62, }, + { 2, 1, 0, 1, 124, 58, }, { 1, 1, 0, 1, 124, 76, }, { 3, 1, 0, 1, 124, 127, }, { 4, 1, 0, 1, 124, 76, }, @@ -26725,7 +42768,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 8, 1, 0, 1, 124, 76, }, { 9, 1, 0, 1, 124, 127, }, { 0, 1, 0, 1, 128, 76, }, - { 2, 1, 0, 1, 128, 62, }, + { 2, 1, 0, 1, 128, 58, }, { 1, 1, 0, 1, 128, 76, }, { 3, 1, 0, 1, 128, 127, }, { 4, 1, 0, 1, 128, 76, }, @@ -26735,38 +42778,38 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 8, 1, 0, 1, 128, 76, }, { 9, 1, 0, 1, 128, 127, }, { 0, 1, 0, 1, 132, 76, }, - { 2, 1, 0, 1, 132, 62, }, + { 2, 1, 0, 1, 132, 58, }, { 1, 1, 0, 1, 132, 76, }, { 3, 1, 0, 1, 132, 76, }, { 4, 1, 0, 1, 132, 76, }, - { 5, 1, 0, 1, 132, 62, }, + { 5, 1, 0, 1, 132, 58, }, { 6, 1, 0, 1, 132, 76, }, { 7, 1, 0, 1, 132, 54, }, { 8, 1, 0, 1, 132, 76, }, { 9, 1, 0, 1, 132, 127, }, { 0, 1, 0, 1, 136, 76, }, - { 2, 1, 0, 1, 136, 62, }, + { 2, 1, 0, 1, 136, 58, }, { 1, 1, 0, 1, 136, 76, }, { 3, 1, 0, 1, 136, 76, }, { 4, 1, 0, 1, 136, 76, }, - { 5, 1, 0, 1, 136, 62, }, + { 5, 1, 0, 1, 136, 58, }, { 6, 1, 0, 1, 136, 76, }, { 7, 1, 0, 1, 136, 54, }, { 8, 1, 0, 1, 136, 76, }, { 9, 1, 0, 1, 136, 127, }, - { 0, 1, 0, 1, 140, 72, }, - { 2, 1, 0, 1, 140, 62, }, + { 0, 1, 0, 1, 140, 74, }, + { 2, 1, 0, 1, 140, 58, }, { 1, 1, 0, 1, 140, 76, }, - { 3, 1, 0, 1, 140, 72, }, + { 3, 1, 0, 1, 140, 74, }, { 4, 1, 0, 1, 140, 76, }, - { 5, 1, 0, 1, 140, 62, }, + { 5, 1, 0, 1, 140, 58, }, { 6, 1, 0, 1, 140, 72, }, { 7, 1, 0, 1, 140, 54, }, { 8, 1, 0, 1, 140, 72, }, { 9, 1, 0, 1, 140, 127, }, { 0, 1, 0, 1, 144, 76, }, { 2, 1, 0, 1, 144, 127, }, - { 1, 1, 0, 1, 144, 127, }, + { 1, 1, 0, 1, 144, 76, }, { 3, 1, 0, 1, 144, 76, }, { 4, 1, 0, 1, 144, 76, }, { 5, 1, 0, 1, 144, 127, }, @@ -26775,7 +42818,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 8, 1, 0, 1, 144, 76, }, { 9, 1, 0, 1, 144, 127, }, { 0, 1, 0, 1, 149, 76, }, - { 2, 1, 0, 1, 149, -128, }, + { 2, 1, 0, 1, 149, 28, }, { 1, 1, 0, 1, 149, 127, }, { 3, 1, 0, 1, 149, 76, }, { 4, 1, 0, 1, 149, 74, }, @@ -26783,9 +42826,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 6, 1, 0, 1, 149, 76, }, { 7, 1, 0, 1, 149, 54, }, { 8, 1, 0, 1, 149, 76, }, - { 9, 1, 0, 1, 149, -128, }, + { 9, 1, 0, 1, 149, 28, }, { 0, 1, 0, 1, 153, 76, }, - { 2, 1, 0, 1, 153, -128, }, + { 2, 1, 0, 1, 153, 28, }, { 1, 1, 0, 1, 153, 127, }, { 3, 1, 0, 1, 153, 76, }, { 4, 1, 0, 1, 153, 74, }, @@ -26793,9 +42836,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 6, 1, 0, 1, 153, 76, }, { 7, 1, 0, 1, 153, 54, }, { 8, 1, 0, 1, 153, 76, }, - { 9, 1, 0, 1, 153, -128, }, + { 9, 1, 0, 1, 153, 28, }, { 0, 1, 0, 1, 157, 76, }, - { 2, 1, 0, 1, 157, -128, }, + { 2, 1, 0, 1, 157, 28, }, { 1, 1, 0, 1, 157, 127, }, { 3, 1, 0, 1, 157, 76, }, { 4, 1, 0, 1, 157, 74, }, @@ -26803,9 +42846,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 6, 1, 0, 1, 157, 76, }, { 7, 1, 0, 1, 157, 54, }, { 8, 1, 0, 1, 157, 76, }, - { 9, 1, 0, 1, 157, -128, }, + { 9, 1, 0, 1, 157, 28, }, { 0, 1, 0, 1, 161, 76, }, - { 2, 1, 0, 1, 161, -128, }, + { 2, 1, 0, 1, 161, 28, }, { 1, 1, 0, 1, 161, 127, }, { 3, 1, 0, 1, 161, 76, }, { 4, 1, 0, 1, 161, 74, }, @@ -26813,9 +42856,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 6, 1, 0, 1, 161, 76, }, { 7, 1, 0, 1, 161, 54, }, { 8, 1, 0, 1, 161, 76, }, - { 9, 1, 0, 1, 161, -128, }, + { 9, 1, 0, 1, 161, 28, }, { 0, 1, 0, 1, 165, 76, }, - { 2, 1, 0, 1, 165, -128, }, + { 2, 1, 0, 1, 165, 28, }, { 1, 1, 0, 1, 165, 127, }, { 3, 1, 0, 1, 165, 76, }, { 4, 1, 0, 1, 165, 74, }, @@ -26823,139 +42866,139 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 6, 1, 0, 1, 165, 76, }, { 7, 1, 0, 1, 165, 54, }, { 8, 1, 0, 1, 165, 76, }, - { 9, 1, 0, 1, 165, -128, }, - { 0, 1, 0, 2, 36, 72, }, - { 2, 1, 0, 2, 36, 62, }, - { 1, 1, 0, 2, 36, 62, }, + { 9, 1, 0, 1, 165, 28, }, + { 0, 1, 0, 2, 36, 70, }, + { 2, 1, 0, 2, 36, 58, }, + { 1, 1, 0, 2, 36, 64, }, { 3, 1, 0, 2, 36, 62, }, { 4, 1, 0, 2, 36, 76, }, - { 5, 1, 0, 2, 36, 62, }, + { 5, 1, 0, 2, 36, 58, }, { 6, 1, 0, 2, 36, 64, }, { 7, 1, 0, 2, 36, 54, }, { 8, 1, 0, 2, 36, 62, }, { 9, 1, 0, 2, 36, 62, }, { 0, 1, 0, 2, 40, 76, }, - { 2, 1, 0, 2, 40, 62, }, + { 2, 1, 0, 2, 40, 58, }, { 1, 1, 0, 2, 40, 62, }, { 3, 1, 0, 2, 40, 62, }, { 4, 1, 0, 2, 40, 76, }, - { 5, 1, 0, 2, 40, 62, }, + { 5, 1, 0, 2, 40, 58, }, { 6, 1, 0, 2, 40, 64, }, { 7, 1, 0, 2, 40, 54, }, { 8, 1, 0, 2, 40, 62, }, { 9, 1, 0, 2, 40, 62, }, { 0, 1, 0, 2, 44, 76, }, - { 2, 1, 0, 2, 44, 62, }, + { 2, 1, 0, 2, 44, 58, }, { 1, 1, 0, 2, 44, 62, }, { 3, 1, 0, 2, 44, 62, }, { 4, 1, 0, 2, 44, 76, }, - { 5, 1, 0, 2, 44, 62, }, + { 5, 1, 0, 2, 44, 58, }, { 6, 1, 0, 2, 44, 64, }, { 7, 1, 0, 2, 44, 54, }, { 8, 1, 0, 2, 44, 62, }, { 9, 1, 0, 2, 44, 62, }, { 0, 1, 0, 2, 48, 76, }, - { 2, 1, 0, 2, 48, 62, }, + { 2, 1, 0, 2, 48, 58, }, { 1, 1, 0, 2, 48, 62, }, { 3, 1, 0, 2, 48, 62, }, - { 4, 1, 0, 2, 48, 54, }, - { 5, 1, 0, 2, 48, 62, }, + { 4, 1, 0, 2, 48, 58, }, + { 5, 1, 0, 2, 48, 58, }, { 6, 1, 0, 2, 48, 64, }, { 7, 1, 0, 2, 48, 54, }, { 8, 1, 0, 2, 48, 62, }, { 9, 1, 0, 2, 48, 62, }, { 0, 1, 0, 2, 52, 76, }, - { 2, 1, 0, 2, 52, 62, }, + { 2, 1, 0, 2, 52, 58, }, { 1, 1, 0, 2, 52, 62, }, { 3, 1, 0, 2, 52, 64, }, { 4, 1, 0, 2, 52, 76, }, - { 5, 1, 0, 2, 52, 62, }, + { 5, 1, 0, 2, 52, 58, }, { 6, 1, 0, 2, 52, 76, }, { 7, 1, 0, 2, 52, 54, }, { 8, 1, 0, 2, 52, 76, }, { 9, 1, 0, 2, 52, 62, }, { 0, 1, 0, 2, 56, 76, }, - { 2, 1, 0, 2, 56, 62, }, + { 2, 1, 0, 2, 56, 58, }, { 1, 1, 0, 2, 56, 62, }, { 3, 1, 0, 2, 56, 64, }, { 4, 1, 0, 2, 56, 76, }, - { 5, 1, 0, 2, 56, 62, }, + { 5, 1, 0, 2, 56, 58, }, { 6, 1, 0, 2, 56, 76, }, { 7, 1, 0, 2, 56, 54, }, { 8, 1, 0, 2, 56, 76, }, { 9, 1, 0, 2, 56, 62, }, { 0, 1, 0, 2, 60, 76, }, - { 2, 1, 0, 2, 60, 62, }, + { 2, 1, 0, 2, 60, 58, }, { 1, 1, 0, 2, 60, 62, }, { 3, 1, 0, 2, 60, 64, }, { 4, 1, 0, 2, 60, 76, }, - { 5, 1, 0, 2, 60, 62, }, + { 5, 1, 0, 2, 60, 58, }, { 6, 1, 0, 2, 60, 76, }, { 7, 1, 0, 2, 60, 54, }, { 8, 1, 0, 2, 60, 76, }, { 9, 1, 0, 2, 60, 62, }, - { 0, 1, 0, 2, 64, 74, }, - { 2, 1, 0, 2, 64, 62, }, - { 1, 1, 0, 2, 64, 60, }, + { 0, 1, 0, 2, 64, 70, }, + { 2, 1, 0, 2, 64, 58, }, + { 1, 1, 0, 2, 64, 62, }, { 3, 1, 0, 2, 64, 64, }, { 4, 1, 0, 2, 64, 74, }, - { 5, 1, 0, 2, 64, 62, }, + { 5, 1, 0, 2, 64, 58, }, { 6, 1, 0, 2, 64, 74, }, { 7, 1, 0, 2, 64, 54, }, { 8, 1, 0, 2, 64, 74, }, { 9, 1, 0, 2, 64, 62, }, - { 0, 1, 0, 2, 100, 70, }, - { 2, 1, 0, 2, 100, 62, }, + { 0, 1, 0, 2, 100, 66, }, + { 2, 1, 0, 2, 100, 58, }, { 1, 1, 0, 2, 100, 76, }, - { 3, 1, 0, 2, 100, 70, }, + { 3, 1, 0, 2, 100, 66, }, { 4, 1, 0, 2, 100, 76, }, - { 5, 1, 0, 2, 100, 62, }, + { 5, 1, 0, 2, 100, 58, }, { 6, 1, 0, 2, 100, 70, }, { 7, 1, 0, 2, 100, 54, }, { 8, 1, 0, 2, 100, 70, }, { 9, 1, 0, 2, 100, 127, }, { 0, 1, 0, 2, 104, 76, }, - { 2, 1, 0, 2, 104, 62, }, + { 2, 1, 0, 2, 104, 58, }, { 1, 1, 0, 2, 104, 76, }, { 3, 1, 0, 2, 104, 76, }, { 4, 1, 0, 2, 104, 76, }, - { 5, 1, 0, 2, 104, 62, }, + { 5, 1, 0, 2, 104, 58, }, { 6, 1, 0, 2, 104, 76, }, { 7, 1, 0, 2, 104, 54, }, { 8, 1, 0, 2, 104, 76, }, { 9, 1, 0, 2, 104, 127, }, { 0, 1, 0, 2, 108, 76, }, - { 2, 1, 0, 2, 108, 62, }, + { 2, 1, 0, 2, 108, 58, }, { 1, 1, 0, 2, 108, 76, }, { 3, 1, 0, 2, 108, 76, }, { 4, 1, 0, 2, 108, 76, }, - { 5, 1, 0, 2, 108, 62, }, + { 5, 1, 0, 2, 108, 58, }, { 6, 1, 0, 2, 108, 76, }, { 7, 1, 0, 2, 108, 54, }, { 8, 1, 0, 2, 108, 76, }, { 9, 1, 0, 2, 108, 127, }, { 0, 1, 0, 2, 112, 76, }, - { 2, 1, 0, 2, 112, 62, }, + { 2, 1, 0, 2, 112, 58, }, { 1, 1, 0, 2, 112, 76, }, { 3, 1, 0, 2, 112, 76, }, { 4, 1, 0, 2, 112, 76, }, - { 5, 1, 0, 2, 112, 62, }, + { 5, 1, 0, 2, 112, 58, }, { 6, 1, 0, 2, 112, 76, }, { 7, 1, 0, 2, 112, 54, }, { 8, 1, 0, 2, 112, 76, }, { 9, 1, 0, 2, 112, 127, }, { 0, 1, 0, 2, 116, 76, }, - { 2, 1, 0, 2, 116, 62, }, + { 2, 1, 0, 2, 116, 58, }, { 1, 1, 0, 2, 116, 76, }, { 3, 1, 0, 2, 116, 76, }, { 4, 1, 0, 2, 116, 76, }, - { 5, 1, 0, 2, 116, 62, }, + { 5, 1, 0, 2, 116, 58, }, { 6, 1, 0, 2, 116, 76, }, { 7, 1, 0, 2, 116, 54, }, { 8, 1, 0, 2, 116, 76, }, { 9, 1, 0, 2, 116, 127, }, { 0, 1, 0, 2, 120, 76, }, - { 2, 1, 0, 2, 120, 62, }, + { 2, 1, 0, 2, 120, 58, }, { 1, 1, 0, 2, 120, 76, }, { 3, 1, 0, 2, 120, 127, }, { 4, 1, 0, 2, 120, 76, }, @@ -26965,7 +43008,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 8, 1, 0, 2, 120, 76, }, { 9, 1, 0, 2, 120, 127, }, { 0, 1, 0, 2, 124, 76, }, - { 2, 1, 0, 2, 124, 62, }, + { 2, 1, 0, 2, 124, 58, }, { 1, 1, 0, 2, 124, 76, }, { 3, 1, 0, 2, 124, 127, }, { 4, 1, 0, 2, 124, 76, }, @@ -26975,7 +43018,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 8, 1, 0, 2, 124, 76, }, { 9, 1, 0, 2, 124, 127, }, { 0, 1, 0, 2, 128, 76, }, - { 2, 1, 0, 2, 128, 62, }, + { 2, 1, 0, 2, 128, 58, }, { 1, 1, 0, 2, 128, 76, }, { 3, 1, 0, 2, 128, 127, }, { 4, 1, 0, 2, 128, 76, }, @@ -26985,38 +43028,38 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 8, 1, 0, 2, 128, 76, }, { 9, 1, 0, 2, 128, 127, }, { 0, 1, 0, 2, 132, 76, }, - { 2, 1, 0, 2, 132, 62, }, + { 2, 1, 0, 2, 132, 58, }, { 1, 1, 0, 2, 132, 76, }, { 3, 1, 0, 2, 132, 76, }, { 4, 1, 0, 2, 132, 76, }, - { 5, 1, 0, 2, 132, 62, }, + { 5, 1, 0, 2, 132, 58, }, { 6, 1, 0, 2, 132, 76, }, { 7, 1, 0, 2, 132, 54, }, { 8, 1, 0, 2, 132, 76, }, { 9, 1, 0, 2, 132, 127, }, { 0, 1, 0, 2, 136, 76, }, - { 2, 1, 0, 2, 136, 62, }, + { 2, 1, 0, 2, 136, 58, }, { 1, 1, 0, 2, 136, 76, }, { 3, 1, 0, 2, 136, 76, }, { 4, 1, 0, 2, 136, 76, }, - { 5, 1, 0, 2, 136, 62, }, + { 5, 1, 0, 2, 136, 58, }, { 6, 1, 0, 2, 136, 76, }, { 7, 1, 0, 2, 136, 54, }, { 8, 1, 0, 2, 136, 76, }, { 9, 1, 0, 2, 136, 127, }, - { 0, 1, 0, 2, 140, 70, }, - { 2, 1, 0, 2, 140, 62, }, + { 0, 1, 0, 2, 140, 66, }, + { 2, 1, 0, 2, 140, 58, }, { 1, 1, 0, 2, 140, 76, }, - { 3, 1, 0, 2, 140, 70, }, + { 3, 1, 0, 2, 140, 66, }, { 4, 1, 0, 2, 140, 76, }, - { 5, 1, 0, 2, 140, 62, }, + { 5, 1, 0, 2, 140, 58, }, { 6, 1, 0, 2, 140, 70, }, { 7, 1, 0, 2, 140, 54, }, { 8, 1, 0, 2, 140, 70, }, { 9, 1, 0, 2, 140, 127, }, { 0, 1, 0, 2, 144, 76, }, { 2, 1, 0, 2, 144, 127, }, - { 1, 1, 0, 2, 144, 127, }, + { 1, 1, 0, 2, 144, 76, }, { 3, 1, 0, 2, 144, 76, }, { 4, 1, 0, 2, 144, 76, }, { 5, 1, 0, 2, 144, 127, }, @@ -27025,7 +43068,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 8, 1, 0, 2, 144, 76, }, { 9, 1, 0, 2, 144, 127, }, { 0, 1, 0, 2, 149, 76, }, - { 2, 1, 0, 2, 149, -128, }, + { 2, 1, 0, 2, 149, 28, }, { 1, 1, 0, 2, 149, 127, }, { 3, 1, 0, 2, 149, 76, }, { 4, 1, 0, 2, 149, 74, }, @@ -27033,9 +43076,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 6, 1, 0, 2, 149, 76, }, { 7, 1, 0, 2, 149, 54, }, { 8, 1, 0, 2, 149, 76, }, - { 9, 1, 0, 2, 149, -128, }, + { 9, 1, 0, 2, 149, 28, }, { 0, 1, 0, 2, 153, 76, }, - { 2, 1, 0, 2, 153, -128, }, + { 2, 1, 0, 2, 153, 28, }, { 1, 1, 0, 2, 153, 127, }, { 3, 1, 0, 2, 153, 76, }, { 4, 1, 0, 2, 153, 74, }, @@ -27043,9 +43086,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 6, 1, 0, 2, 153, 76, }, { 7, 1, 0, 2, 153, 54, }, { 8, 1, 0, 2, 153, 76, }, - { 9, 1, 0, 2, 153, -128, }, + { 9, 1, 0, 2, 153, 28, }, { 0, 1, 0, 2, 157, 76, }, - { 2, 1, 0, 2, 157, -128, }, + { 2, 1, 0, 2, 157, 28, }, { 1, 1, 0, 2, 157, 127, }, { 3, 1, 0, 2, 157, 76, }, { 4, 1, 0, 2, 157, 74, }, @@ -27053,9 +43096,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 6, 1, 0, 2, 157, 76, }, { 7, 1, 0, 2, 157, 54, }, { 8, 1, 0, 2, 157, 76, }, - { 9, 1, 0, 2, 157, -128, }, + { 9, 1, 0, 2, 157, 28, }, { 0, 1, 0, 2, 161, 76, }, - { 2, 1, 0, 2, 161, -128, }, + { 2, 1, 0, 2, 161, 28, }, { 1, 1, 0, 2, 161, 127, }, { 3, 1, 0, 2, 161, 76, }, { 4, 1, 0, 2, 161, 74, }, @@ -27063,9 +43106,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 6, 1, 0, 2, 161, 76, }, { 7, 1, 0, 2, 161, 54, }, { 8, 1, 0, 2, 161, 76, }, - { 9, 1, 0, 2, 161, -128, }, + { 9, 1, 0, 2, 161, 28, }, { 0, 1, 0, 2, 165, 76, }, - { 2, 1, 0, 2, 165, -128, }, + { 2, 1, 0, 2, 165, 28, }, { 1, 1, 0, 2, 165, 127, }, { 3, 1, 0, 2, 165, 76, }, { 4, 1, 0, 2, 165, 74, }, @@ -27073,262 +43116,262 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 6, 1, 0, 2, 165, 76, }, { 7, 1, 0, 2, 165, 54, }, { 8, 1, 0, 2, 165, 76, }, - { 9, 1, 0, 2, 165, -128, }, - { 0, 1, 0, 3, 36, 68, }, - { 2, 1, 0, 3, 36, 38, }, + { 9, 1, 0, 2, 165, 28, }, + { 0, 1, 0, 3, 36, 64, }, + { 2, 1, 0, 3, 36, 36, }, { 1, 1, 0, 3, 36, 50, }, { 3, 1, 0, 3, 36, 38, }, { 4, 1, 0, 3, 36, 66, }, - { 5, 1, 0, 3, 36, 38, }, + { 5, 1, 0, 3, 36, 36, }, { 6, 1, 0, 3, 36, 52, }, { 7, 1, 0, 3, 36, 30, }, { 8, 1, 0, 3, 36, 50, }, { 9, 1, 0, 3, 36, 38, }, { 0, 1, 0, 3, 40, 68, }, - { 2, 1, 0, 3, 40, 38, }, + { 2, 1, 0, 3, 40, 36, }, { 1, 1, 0, 3, 40, 50, }, { 3, 1, 0, 3, 40, 38, }, { 4, 1, 0, 3, 40, 66, }, - { 5, 1, 0, 3, 40, 38, }, + { 5, 1, 0, 3, 40, 36, }, { 6, 1, 0, 3, 40, 52, }, { 7, 1, 0, 3, 40, 30, }, { 8, 1, 0, 3, 40, 50, }, { 9, 1, 0, 3, 40, 38, }, { 0, 1, 0, 3, 44, 68, }, - { 2, 1, 0, 3, 44, 38, }, + { 2, 1, 0, 3, 44, 36, }, { 1, 1, 0, 3, 44, 50, }, { 3, 1, 0, 3, 44, 38, }, { 4, 1, 0, 3, 44, 66, }, - { 5, 1, 0, 3, 44, 38, }, + { 5, 1, 0, 3, 44, 36, }, { 6, 1, 0, 3, 44, 52, }, { 7, 1, 0, 3, 44, 30, }, { 8, 1, 0, 3, 44, 50, }, { 9, 1, 0, 3, 44, 38, }, { 0, 1, 0, 3, 48, 68, }, - { 2, 1, 0, 3, 48, 38, }, + { 2, 1, 0, 3, 48, 36, }, { 1, 1, 0, 3, 48, 50, }, { 3, 1, 0, 3, 48, 38, }, - { 4, 1, 0, 3, 48, 36, }, - { 5, 1, 0, 3, 48, 38, }, + { 4, 1, 0, 3, 48, 42, }, + { 5, 1, 0, 3, 48, 36, }, { 6, 1, 0, 3, 48, 52, }, { 7, 1, 0, 3, 48, 30, }, { 8, 1, 0, 3, 48, 50, }, { 9, 1, 0, 3, 48, 38, }, { 0, 1, 0, 3, 52, 68, }, - { 2, 1, 0, 3, 52, 38, }, + { 2, 1, 0, 3, 52, 36, }, { 1, 1, 0, 3, 52, 50, }, { 3, 1, 0, 3, 52, 40, }, { 4, 1, 0, 3, 52, 66, }, - { 5, 1, 0, 3, 52, 38, }, + { 5, 1, 0, 3, 52, 36, }, { 6, 1, 0, 3, 52, 68, }, { 7, 1, 0, 3, 52, 30, }, { 8, 1, 0, 3, 52, 68, }, { 9, 1, 0, 3, 52, 38, }, { 0, 1, 0, 3, 56, 68, }, - { 2, 1, 0, 3, 56, 38, }, + { 2, 1, 0, 3, 56, 36, }, { 1, 1, 0, 3, 56, 50, }, { 3, 1, 0, 3, 56, 40, }, { 4, 1, 0, 3, 56, 66, }, - { 5, 1, 0, 3, 56, 38, }, + { 5, 1, 0, 3, 56, 36, }, { 6, 1, 0, 3, 56, 68, }, { 7, 1, 0, 3, 56, 30, }, { 8, 1, 0, 3, 56, 68, }, { 9, 1, 0, 3, 56, 38, }, - { 0, 1, 0, 3, 60, 66, }, - { 2, 1, 0, 3, 60, 38, }, + { 0, 1, 0, 3, 60, 68, }, + { 2, 1, 0, 3, 60, 36, }, { 1, 1, 0, 3, 60, 50, }, { 3, 1, 0, 3, 60, 40, }, { 4, 1, 0, 3, 60, 66, }, - { 5, 1, 0, 3, 60, 38, }, + { 5, 1, 0, 3, 60, 36, }, { 6, 1, 0, 3, 60, 66, }, { 7, 1, 0, 3, 60, 30, }, { 8, 1, 0, 3, 60, 66, }, { 9, 1, 0, 3, 60, 38, }, - { 0, 1, 0, 3, 64, 68, }, - { 2, 1, 0, 3, 64, 38, }, + { 0, 1, 0, 3, 64, 66, }, + { 2, 1, 0, 3, 64, 36, }, { 1, 1, 0, 3, 64, 50, }, { 3, 1, 0, 3, 64, 40, }, { 4, 1, 0, 3, 64, 66, }, - { 5, 1, 0, 3, 64, 38, }, + { 5, 1, 0, 3, 64, 36, }, { 6, 1, 0, 3, 64, 68, }, { 7, 1, 0, 3, 64, 30, }, { 8, 1, 0, 3, 64, 68, }, { 9, 1, 0, 3, 64, 38, }, - { 0, 1, 0, 3, 100, 60, }, - { 2, 1, 0, 3, 100, 38, }, + { 0, 1, 0, 3, 100, 64, }, + { 2, 1, 0, 3, 100, 36, }, { 1, 1, 0, 3, 100, 70, }, - { 3, 1, 0, 3, 100, 60, }, - { 4, 1, 0, 3, 100, 64, }, - { 5, 1, 0, 3, 100, 38, }, + { 3, 1, 0, 3, 100, 64, }, + { 4, 1, 0, 3, 100, 66, }, + { 5, 1, 0, 3, 100, 36, }, { 6, 1, 0, 3, 100, 60, }, { 7, 1, 0, 3, 100, 30, }, { 8, 1, 0, 3, 100, 60, }, { 9, 1, 0, 3, 100, 127, }, { 0, 1, 0, 3, 104, 68, }, - { 2, 1, 0, 3, 104, 38, }, + { 2, 1, 0, 3, 104, 36, }, { 1, 1, 0, 3, 104, 70, }, { 3, 1, 0, 3, 104, 68, }, - { 4, 1, 0, 3, 104, 64, }, - { 5, 1, 0, 3, 104, 38, }, + { 4, 1, 0, 3, 104, 66, }, + { 5, 1, 0, 3, 104, 36, }, { 6, 1, 0, 3, 104, 68, }, { 7, 1, 0, 3, 104, 30, }, { 8, 1, 0, 3, 104, 68, }, { 9, 1, 0, 3, 104, 127, }, { 0, 1, 0, 3, 108, 68, }, - { 2, 1, 0, 3, 108, 38, }, + { 2, 1, 0, 3, 108, 36, }, { 1, 1, 0, 3, 108, 70, }, { 3, 1, 0, 3, 108, 68, }, - { 4, 1, 0, 3, 108, 64, }, - { 5, 1, 0, 3, 108, 38, }, + { 4, 1, 0, 3, 108, 66, }, + { 5, 1, 0, 3, 108, 36, }, { 6, 1, 0, 3, 108, 68, }, { 7, 1, 0, 3, 108, 30, }, { 8, 1, 0, 3, 108, 68, }, { 9, 1, 0, 3, 108, 127, }, { 0, 1, 0, 3, 112, 68, }, - { 2, 1, 0, 3, 112, 38, }, + { 2, 1, 0, 3, 112, 36, }, { 1, 1, 0, 3, 112, 70, }, { 3, 1, 0, 3, 112, 68, }, - { 4, 1, 0, 3, 112, 64, }, - { 5, 1, 0, 3, 112, 38, }, + { 4, 1, 0, 3, 112, 66, }, + { 5, 1, 0, 3, 112, 36, }, { 6, 1, 0, 3, 112, 68, }, { 7, 1, 0, 3, 112, 30, }, { 8, 1, 0, 3, 112, 68, }, { 9, 1, 0, 3, 112, 127, }, { 0, 1, 0, 3, 116, 68, }, - { 2, 1, 0, 3, 116, 38, }, + { 2, 1, 0, 3, 116, 36, }, { 1, 1, 0, 3, 116, 70, }, { 3, 1, 0, 3, 116, 68, }, - { 4, 1, 0, 3, 116, 64, }, - { 5, 1, 0, 3, 116, 38, }, + { 4, 1, 0, 3, 116, 66, }, + { 5, 1, 0, 3, 116, 36, }, { 6, 1, 0, 3, 116, 68, }, { 7, 1, 0, 3, 116, 30, }, { 8, 1, 0, 3, 116, 68, }, { 9, 1, 0, 3, 116, 127, }, { 0, 1, 0, 3, 120, 68, }, - { 2, 1, 0, 3, 120, 38, }, + { 2, 1, 0, 3, 120, 36, }, { 1, 1, 0, 3, 120, 70, }, { 3, 1, 0, 3, 120, 127, }, - { 4, 1, 0, 3, 120, 64, }, + { 4, 1, 0, 3, 120, 66, }, { 5, 1, 0, 3, 120, 127, }, { 6, 1, 0, 3, 120, 68, }, { 7, 1, 0, 3, 120, 30, }, { 8, 1, 0, 3, 120, 68, }, { 9, 1, 0, 3, 120, 127, }, { 0, 1, 0, 3, 124, 68, }, - { 2, 1, 0, 3, 124, 38, }, + { 2, 1, 0, 3, 124, 36, }, { 1, 1, 0, 3, 124, 70, }, { 3, 1, 0, 3, 124, 127, }, - { 4, 1, 0, 3, 124, 64, }, + { 4, 1, 0, 3, 124, 66, }, { 5, 1, 0, 3, 124, 127, }, { 6, 1, 0, 3, 124, 68, }, { 7, 1, 0, 3, 124, 30, }, { 8, 1, 0, 3, 124, 68, }, { 9, 1, 0, 3, 124, 127, }, { 0, 1, 0, 3, 128, 68, }, - { 2, 1, 0, 3, 128, 38, }, + { 2, 1, 0, 3, 128, 36, }, { 1, 1, 0, 3, 128, 70, }, { 3, 1, 0, 3, 128, 127, }, - { 4, 1, 0, 3, 128, 64, }, + { 4, 1, 0, 3, 128, 66, }, { 5, 1, 0, 3, 128, 127, }, { 6, 1, 0, 3, 128, 68, }, { 7, 1, 0, 3, 128, 30, }, { 8, 1, 0, 3, 128, 68, }, { 9, 1, 0, 3, 128, 127, }, { 0, 1, 0, 3, 132, 68, }, - { 2, 1, 0, 3, 132, 38, }, + { 2, 1, 0, 3, 132, 36, }, { 1, 1, 0, 3, 132, 70, }, { 3, 1, 0, 3, 132, 68, }, - { 4, 1, 0, 3, 132, 64, }, - { 5, 1, 0, 3, 132, 38, }, + { 4, 1, 0, 3, 132, 66, }, + { 5, 1, 0, 3, 132, 36, }, { 6, 1, 0, 3, 132, 68, }, { 7, 1, 0, 3, 132, 30, }, { 8, 1, 0, 3, 132, 68, }, { 9, 1, 0, 3, 132, 127, }, { 0, 1, 0, 3, 136, 68, }, - { 2, 1, 0, 3, 136, 38, }, + { 2, 1, 0, 3, 136, 36, }, { 1, 1, 0, 3, 136, 70, }, { 3, 1, 0, 3, 136, 68, }, - { 4, 1, 0, 3, 136, 64, }, - { 5, 1, 0, 3, 136, 38, }, + { 4, 1, 0, 3, 136, 66, }, + { 5, 1, 0, 3, 136, 36, }, { 6, 1, 0, 3, 136, 68, }, { 7, 1, 0, 3, 136, 30, }, { 8, 1, 0, 3, 136, 68, }, { 9, 1, 0, 3, 136, 127, }, - { 0, 1, 0, 3, 140, 60, }, - { 2, 1, 0, 3, 140, 38, }, + { 0, 1, 0, 3, 140, 58, }, + { 2, 1, 0, 3, 140, 36, }, { 1, 1, 0, 3, 140, 70, }, - { 3, 1, 0, 3, 140, 60, }, - { 4, 1, 0, 3, 140, 64, }, - { 5, 1, 0, 3, 140, 38, }, + { 3, 1, 0, 3, 140, 58, }, + { 4, 1, 0, 3, 140, 66, }, + { 5, 1, 0, 3, 140, 36, }, { 6, 1, 0, 3, 140, 60, }, { 7, 1, 0, 3, 140, 30, }, { 8, 1, 0, 3, 140, 60, }, { 9, 1, 0, 3, 140, 127, }, { 0, 1, 0, 3, 144, 68, }, { 2, 1, 0, 3, 144, 127, }, - { 1, 1, 0, 3, 144, 127, }, + { 1, 1, 0, 3, 144, 70, }, { 3, 1, 0, 3, 144, 68, }, - { 4, 1, 0, 3, 144, 64, }, + { 4, 1, 0, 3, 144, 66, }, { 5, 1, 0, 3, 144, 127, }, { 6, 1, 0, 3, 144, 68, }, { 7, 1, 0, 3, 144, 127, }, { 8, 1, 0, 3, 144, 68, }, { 9, 1, 0, 3, 144, 127, }, { 0, 1, 0, 3, 149, 76, }, - { 2, 1, 0, 3, 149, -128, }, + { 2, 1, 0, 3, 149, 4, }, { 1, 1, 0, 3, 149, 127, }, { 3, 1, 0, 3, 149, 76, }, - { 4, 1, 0, 3, 149, 60, }, + { 4, 1, 0, 3, 149, 62, }, { 5, 1, 0, 3, 149, 76, }, { 6, 1, 0, 3, 149, 76, }, { 7, 1, 0, 3, 149, 30, }, { 8, 1, 0, 3, 149, 72, }, - { 9, 1, 0, 3, 149, -128, }, + { 9, 1, 0, 3, 149, 4, }, { 0, 1, 0, 3, 153, 76, }, - { 2, 1, 0, 3, 153, -128, }, + { 2, 1, 0, 3, 153, 4, }, { 1, 1, 0, 3, 153, 127, }, { 3, 1, 0, 3, 153, 76, }, - { 4, 1, 0, 3, 153, 60, }, + { 4, 1, 0, 3, 153, 62, }, { 5, 1, 0, 3, 153, 76, }, { 6, 1, 0, 3, 153, 76, }, { 7, 1, 0, 3, 153, 30, }, { 8, 1, 0, 3, 153, 76, }, - { 9, 1, 0, 3, 153, -128, }, + { 9, 1, 0, 3, 153, 4, }, { 0, 1, 0, 3, 157, 76, }, - { 2, 1, 0, 3, 157, -128, }, + { 2, 1, 0, 3, 157, 4, }, { 1, 1, 0, 3, 157, 127, }, { 3, 1, 0, 3, 157, 76, }, - { 4, 1, 0, 3, 157, 60, }, + { 4, 1, 0, 3, 157, 62, }, { 5, 1, 0, 3, 157, 76, }, { 6, 1, 0, 3, 157, 76, }, { 7, 1, 0, 3, 157, 30, }, { 8, 1, 0, 3, 157, 76, }, - { 9, 1, 0, 3, 157, -128, }, + { 9, 1, 0, 3, 157, 4, }, { 0, 1, 0, 3, 161, 76, }, - { 2, 1, 0, 3, 161, -128, }, + { 2, 1, 0, 3, 161, 4, }, { 1, 1, 0, 3, 161, 127, }, { 3, 1, 0, 3, 161, 76, }, - { 4, 1, 0, 3, 161, 60, }, + { 4, 1, 0, 3, 161, 62, }, { 5, 1, 0, 3, 161, 76, }, { 6, 1, 0, 3, 161, 76, }, { 7, 1, 0, 3, 161, 30, }, { 8, 1, 0, 3, 161, 76, }, - { 9, 1, 0, 3, 161, -128, }, + { 9, 1, 0, 3, 161, 4, }, { 0, 1, 0, 3, 165, 76, }, - { 2, 1, 0, 3, 165, -128, }, + { 2, 1, 0, 3, 165, 4, }, { 1, 1, 0, 3, 165, 127, }, { 3, 1, 0, 3, 165, 76, }, - { 4, 1, 0, 3, 165, 60, }, + { 4, 1, 0, 3, 165, 62, }, { 5, 1, 0, 3, 165, 76, }, { 6, 1, 0, 3, 165, 76, }, { 7, 1, 0, 3, 165, 30, }, { 8, 1, 0, 3, 165, 76, }, - { 9, 1, 0, 3, 165, -128, }, + { 9, 1, 0, 3, 165, 4, }, { 0, 1, 1, 2, 38, 66, }, { 2, 1, 1, 2, 38, 64, }, - { 1, 1, 1, 2, 38, 62, }, + { 1, 1, 1, 2, 38, 64, }, { 3, 1, 1, 2, 38, 64, }, - { 4, 1, 1, 2, 38, 72, }, + { 4, 1, 1, 2, 38, 64, }, { 5, 1, 1, 2, 38, 64, }, { 6, 1, 1, 2, 38, 64, }, { 7, 1, 1, 2, 38, 54, }, @@ -27336,9 +43379,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 9, 1, 1, 2, 38, 64, }, { 0, 1, 1, 2, 46, 72, }, { 2, 1, 1, 2, 46, 64, }, - { 1, 1, 1, 2, 46, 62, }, + { 1, 1, 1, 2, 46, 64, }, { 3, 1, 1, 2, 46, 64, }, - { 4, 1, 1, 2, 46, 60, }, + { 4, 1, 1, 2, 46, 70, }, { 5, 1, 1, 2, 46, 64, }, { 6, 1, 1, 2, 46, 64, }, { 7, 1, 1, 2, 46, 54, }, @@ -27346,7 +43389,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 9, 1, 1, 2, 46, 64, }, { 0, 1, 1, 2, 54, 72, }, { 2, 1, 1, 2, 54, 64, }, - { 1, 1, 1, 2, 54, 62, }, + { 1, 1, 1, 2, 54, 64, }, { 3, 1, 1, 2, 54, 64, }, { 4, 1, 1, 2, 54, 72, }, { 5, 1, 1, 2, 54, 64, }, @@ -27354,21 +43397,21 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 7, 1, 1, 2, 54, 54, }, { 8, 1, 1, 2, 54, 72, }, { 9, 1, 1, 2, 54, 64, }, - { 0, 1, 1, 2, 62, 64, }, + { 0, 1, 1, 2, 62, 60, }, { 2, 1, 1, 2, 62, 64, }, { 1, 1, 1, 2, 62, 62, }, - { 3, 1, 1, 2, 62, 64, }, - { 4, 1, 1, 2, 62, 70, }, + { 3, 1, 1, 2, 62, 60, }, + { 4, 1, 1, 2, 62, 60, }, { 5, 1, 1, 2, 62, 64, }, { 6, 1, 1, 2, 62, 64, }, { 7, 1, 1, 2, 62, 54, }, { 8, 1, 1, 2, 62, 64, }, { 9, 1, 1, 2, 62, 64, }, - { 0, 1, 1, 2, 102, 58, }, + { 0, 1, 1, 2, 102, 60, }, { 2, 1, 1, 2, 102, 64, }, { 1, 1, 1, 2, 102, 72, }, - { 3, 1, 1, 2, 102, 58, }, - { 4, 1, 1, 2, 102, 72, }, + { 3, 1, 1, 2, 102, 60, }, + { 4, 1, 1, 2, 102, 64, }, { 5, 1, 1, 2, 102, 64, }, { 6, 1, 1, 2, 102, 58, }, { 7, 1, 1, 2, 102, 54, }, @@ -27416,7 +43459,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 9, 1, 1, 2, 134, 127, }, { 0, 1, 1, 2, 142, 72, }, { 2, 1, 1, 2, 142, 127, }, - { 1, 1, 1, 2, 142, 127, }, + { 1, 1, 1, 2, 142, 72, }, { 3, 1, 1, 2, 142, 72, }, { 4, 1, 1, 2, 142, 72, }, { 5, 1, 1, 2, 142, 127, }, @@ -27425,7 +43468,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 8, 1, 1, 2, 142, 72, }, { 9, 1, 1, 2, 142, 127, }, { 0, 1, 1, 2, 151, 72, }, - { 2, 1, 1, 2, 151, -128, }, + { 2, 1, 1, 2, 151, 28, }, { 1, 1, 1, 2, 151, 127, }, { 3, 1, 1, 2, 151, 72, }, { 4, 1, 1, 2, 151, 72, }, @@ -27433,9 +43476,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 6, 1, 1, 2, 151, 72, }, { 7, 1, 1, 2, 151, 54, }, { 8, 1, 1, 2, 151, 72, }, - { 9, 1, 1, 2, 151, -128, }, + { 9, 1, 1, 2, 151, 28, }, { 0, 1, 1, 2, 159, 72, }, - { 2, 1, 1, 2, 159, -128, }, + { 2, 1, 1, 2, 159, 28, }, { 1, 1, 1, 2, 159, 127, }, { 3, 1, 1, 2, 159, 72, }, { 4, 1, 1, 2, 159, 72, }, @@ -27443,12 +43486,12 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 6, 1, 1, 2, 159, 72, }, { 7, 1, 1, 2, 159, 54, }, { 8, 1, 1, 2, 159, 72, }, - { 9, 1, 1, 2, 159, -128, }, + { 9, 1, 1, 2, 159, 28, }, { 0, 1, 1, 3, 38, 60, }, { 2, 1, 1, 3, 38, 40, }, { 1, 1, 1, 3, 38, 50, }, { 3, 1, 1, 3, 38, 40, }, - { 4, 1, 1, 3, 38, 62, }, + { 4, 1, 1, 3, 38, 54, }, { 5, 1, 1, 3, 38, 40, }, { 6, 1, 1, 3, 38, 52, }, { 7, 1, 1, 3, 38, 30, }, @@ -27458,7 +43501,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 1, 1, 3, 46, 40, }, { 1, 1, 1, 3, 46, 50, }, { 3, 1, 1, 3, 46, 40, }, - { 4, 1, 1, 3, 46, 46, }, + { 4, 1, 1, 3, 46, 54, }, { 5, 1, 1, 3, 46, 40, }, { 6, 1, 1, 3, 46, 52, }, { 7, 1, 1, 3, 46, 30, }, @@ -27468,7 +43511,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 1, 1, 3, 54, 40, }, { 1, 1, 1, 3, 54, 50, }, { 3, 1, 1, 3, 54, 40, }, - { 4, 1, 1, 3, 54, 62, }, + { 4, 1, 1, 3, 54, 66, }, { 5, 1, 1, 3, 54, 40, }, { 6, 1, 1, 3, 54, 68, }, { 7, 1, 1, 3, 54, 30, }, @@ -27478,17 +43521,17 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 1, 1, 3, 62, 40, }, { 1, 1, 1, 3, 62, 48, }, { 3, 1, 1, 3, 62, 40, }, - { 4, 1, 1, 3, 62, 58, }, + { 4, 1, 1, 3, 62, 50, }, { 5, 1, 1, 3, 62, 40, }, { 6, 1, 1, 3, 62, 58, }, { 7, 1, 1, 3, 62, 30, }, { 8, 1, 1, 3, 62, 58, }, { 9, 1, 1, 3, 62, 40, }, - { 0, 1, 1, 3, 102, 54, }, + { 0, 1, 1, 3, 102, 56, }, { 2, 1, 1, 3, 102, 40, }, { 1, 1, 1, 3, 102, 70, }, - { 3, 1, 1, 3, 102, 54, }, - { 4, 1, 1, 3, 102, 64, }, + { 3, 1, 1, 3, 102, 56, }, + { 4, 1, 1, 3, 102, 54, }, { 5, 1, 1, 3, 102, 40, }, { 6, 1, 1, 3, 102, 54, }, { 7, 1, 1, 3, 102, 30, }, @@ -27498,7 +43541,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 1, 1, 3, 110, 40, }, { 1, 1, 1, 3, 110, 70, }, { 3, 1, 1, 3, 110, 68, }, - { 4, 1, 1, 3, 110, 64, }, + { 4, 1, 1, 3, 110, 66, }, { 5, 1, 1, 3, 110, 40, }, { 6, 1, 1, 3, 110, 68, }, { 7, 1, 1, 3, 110, 30, }, @@ -27508,7 +43551,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 1, 1, 3, 118, 40, }, { 1, 1, 1, 3, 118, 70, }, { 3, 1, 1, 3, 118, 127, }, - { 4, 1, 1, 3, 118, 64, }, + { 4, 1, 1, 3, 118, 66, }, { 5, 1, 1, 3, 118, 127, }, { 6, 1, 1, 3, 118, 68, }, { 7, 1, 1, 3, 118, 30, }, @@ -27518,7 +43561,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 1, 1, 3, 126, 40, }, { 1, 1, 1, 3, 126, 70, }, { 3, 1, 1, 3, 126, 127, }, - { 4, 1, 1, 3, 126, 64, }, + { 4, 1, 1, 3, 126, 66, }, { 5, 1, 1, 3, 126, 127, }, { 6, 1, 1, 3, 126, 68, }, { 7, 1, 1, 3, 126, 30, }, @@ -27528,7 +43571,7 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 2, 1, 1, 3, 134, 40, }, { 1, 1, 1, 3, 134, 70, }, { 3, 1, 1, 3, 134, 68, }, - { 4, 1, 1, 3, 134, 64, }, + { 4, 1, 1, 3, 134, 66, }, { 5, 1, 1, 3, 134, 40, }, { 6, 1, 1, 3, 134, 68, }, { 7, 1, 1, 3, 134, 30, }, @@ -27536,16 +43579,16 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 9, 1, 1, 3, 134, 127, }, { 0, 1, 1, 3, 142, 68, }, { 2, 1, 1, 3, 142, 127, }, - { 1, 1, 1, 3, 142, 127, }, + { 1, 1, 1, 3, 142, 70, }, { 3, 1, 1, 3, 142, 68, }, - { 4, 1, 1, 3, 142, 64, }, + { 4, 1, 1, 3, 142, 66, }, { 5, 1, 1, 3, 142, 127, }, { 6, 1, 1, 3, 142, 68, }, { 7, 1, 1, 3, 142, 127, }, { 8, 1, 1, 3, 142, 68, }, { 9, 1, 1, 3, 142, 127, }, { 0, 1, 1, 3, 151, 72, }, - { 2, 1, 1, 3, 151, -128, }, + { 2, 1, 1, 3, 151, 4, }, { 1, 1, 1, 3, 151, 127, }, { 3, 1, 1, 3, 151, 72, }, { 4, 1, 1, 3, 151, 66, }, @@ -27553,9 +43596,9 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 6, 1, 1, 3, 151, 72, }, { 7, 1, 1, 3, 151, 30, }, { 8, 1, 1, 3, 151, 68, }, - { 9, 1, 1, 3, 151, -128, }, + { 9, 1, 1, 3, 151, 4, }, { 0, 1, 1, 3, 159, 72, }, - { 2, 1, 1, 3, 159, -128, }, + { 2, 1, 1, 3, 159, 4, }, { 1, 1, 1, 3, 159, 127, }, { 3, 1, 1, 3, 159, 72, }, { 4, 1, 1, 3, 159, 66, }, @@ -27563,32 +43606,32 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 6, 1, 1, 3, 159, 72, }, { 7, 1, 1, 3, 159, 30, }, { 8, 1, 1, 3, 159, 72, }, - { 9, 1, 1, 3, 159, -128, }, - { 0, 1, 2, 4, 42, 64, }, + { 9, 1, 1, 3, 159, 4, }, + { 0, 1, 2, 4, 42, 68, }, { 2, 1, 2, 4, 42, 64, }, { 1, 1, 2, 4, 42, 64, }, { 3, 1, 2, 4, 42, 64, }, - { 4, 1, 2, 4, 42, 68, }, + { 4, 1, 2, 4, 42, 60, }, { 5, 1, 2, 4, 42, 64, }, { 6, 1, 2, 4, 42, 64, }, { 7, 1, 2, 4, 42, 54, }, { 8, 1, 2, 4, 42, 62, }, { 9, 1, 2, 4, 42, 64, }, - { 0, 1, 2, 4, 58, 62, }, + { 0, 1, 2, 4, 58, 60, }, { 2, 1, 2, 4, 58, 64, }, { 1, 1, 2, 4, 58, 64, }, - { 3, 1, 2, 4, 58, 62, }, - { 4, 1, 2, 4, 58, 64, }, + { 3, 1, 2, 4, 58, 60, }, + { 4, 1, 2, 4, 58, 56, }, { 5, 1, 2, 4, 58, 64, }, { 6, 1, 2, 4, 58, 62, }, { 7, 1, 2, 4, 58, 54, }, { 8, 1, 2, 4, 58, 62, }, { 9, 1, 2, 4, 58, 64, }, - { 0, 1, 2, 4, 106, 58, }, + { 0, 1, 2, 4, 106, 60, }, { 2, 1, 2, 4, 106, 64, }, { 1, 1, 2, 4, 106, 72, }, - { 3, 1, 2, 4, 106, 58, }, - { 4, 1, 2, 4, 106, 66, }, + { 3, 1, 2, 4, 106, 60, }, + { 4, 1, 2, 4, 106, 58, }, { 5, 1, 2, 4, 106, 64, }, { 6, 1, 2, 4, 106, 58, }, { 7, 1, 2, 4, 106, 54, }, @@ -27606,84 +43649,84 @@ static const struct rtw_txpwr_lmt_cfg_pair rtw8822c_txpwr_lmt_type5[] = { { 9, 1, 2, 4, 122, 127, }, { 0, 1, 2, 4, 138, 72, }, { 2, 1, 2, 4, 138, 127, }, - { 1, 1, 2, 4, 138, 127, }, + { 1, 1, 2, 4, 138, 72, }, { 3, 1, 2, 4, 138, 72, }, - { 4, 1, 2, 4, 138, 68, }, + { 4, 1, 2, 4, 138, 70, }, { 5, 1, 2, 4, 138, 127, }, { 6, 1, 2, 4, 138, 72, }, { 7, 1, 2, 4, 138, 127, }, { 8, 1, 2, 4, 138, 72, }, { 9, 1, 2, 4, 138, 127, }, { 0, 1, 2, 4, 155, 72, }, - { 2, 1, 2, 4, 155, -128, }, + { 2, 1, 2, 4, 155, 28, }, { 1, 1, 2, 4, 155, 127, }, { 3, 1, 2, 4, 155, 72, }, - { 4, 1, 2, 4, 155, 68, }, + { 4, 1, 2, 4, 155, 62, }, { 5, 1, 2, 4, 155, 72, }, { 6, 1, 2, 4, 155, 72, }, { 7, 1, 2, 4, 155, 54, }, { 8, 1, 2, 4, 155, 68, }, - { 9, 1, 2, 4, 155, -128, }, - { 0, 1, 2, 5, 42, 54, }, + { 9, 1, 2, 4, 155, 28, }, + { 0, 1, 2, 5, 42, 56, }, { 2, 1, 2, 5, 42, 40, }, { 1, 1, 2, 5, 42, 50, }, { 3, 1, 2, 5, 42, 40, }, - { 4, 1, 2, 5, 42, 58, }, + { 4, 1, 2, 5, 42, 50, }, { 5, 1, 2, 5, 42, 40, }, { 6, 1, 2, 5, 42, 52, }, { 7, 1, 2, 5, 42, 30, }, { 8, 1, 2, 5, 42, 50, }, { 9, 1, 2, 5, 42, 40, }, - { 0, 1, 2, 5, 58, 52, }, + { 0, 1, 2, 5, 58, 54, }, { 2, 1, 2, 5, 58, 40, }, { 1, 1, 2, 5, 58, 50, }, { 3, 1, 2, 5, 58, 40, }, - { 4, 1, 2, 5, 58, 56, }, + { 4, 1, 2, 5, 58, 46, }, { 5, 1, 2, 5, 58, 40, }, { 6, 1, 2, 5, 58, 52, }, { 7, 1, 2, 5, 58, 30, }, { 8, 1, 2, 5, 58, 52, }, { 9, 1, 2, 5, 58, 40, }, - { 0, 1, 2, 5, 106, 50, }, + { 0, 1, 2, 5, 106, 48, }, { 2, 1, 2, 5, 106, 40, }, { 1, 1, 2, 5, 106, 72, }, - { 3, 1, 2, 5, 106, 50, }, - { 4, 1, 2, 5, 106, 56, }, + { 3, 1, 2, 5, 106, 48, }, + { 4, 1, 2, 5, 106, 50, }, { 5, 1, 2, 5, 106, 40, }, { 6, 1, 2, 5, 106, 50, }, { 7, 1, 2, 5, 106, 30, }, { 8, 1, 2, 5, 106, 50, }, { 9, 1, 2, 5, 106, 127, }, - { 0, 1, 2, 5, 122, 66, }, + { 0, 1, 2, 5, 122, 70, }, { 2, 1, 2, 5, 122, 40, }, { 1, 1, 2, 5, 122, 72, }, { 3, 1, 2, 5, 122, 127, }, - { 4, 1, 2, 5, 122, 56, }, + { 4, 1, 2, 5, 122, 62, }, { 5, 1, 2, 5, 122, 127, }, { 6, 1, 2, 5, 122, 66, }, { 7, 1, 2, 5, 122, 30, }, { 8, 1, 2, 5, 122, 66, }, { 9, 1, 2, 5, 122, 127, }, - { 0, 1, 2, 5, 138, 66, }, + { 0, 1, 2, 5, 138, 70, }, { 2, 1, 2, 5, 138, 127, }, - { 1, 1, 2, 5, 138, 127, }, - { 3, 1, 2, 5, 138, 66, }, - { 4, 1, 2, 5, 138, 58, }, + { 1, 1, 2, 5, 138, 72, }, + { 3, 1, 2, 5, 138, 70, }, + { 4, 1, 2, 5, 138, 62, }, { 5, 1, 2, 5, 138, 127, }, { 6, 1, 2, 5, 138, 66, }, { 7, 1, 2, 5, 138, 127, }, { 8, 1, 2, 5, 138, 66, }, { 9, 1, 2, 5, 138, 127, }, - { 0, 1, 2, 5, 155, 62, }, - { 2, 1, 2, 5, 155, -128, }, + { 0, 1, 2, 5, 155, 72, }, + { 2, 1, 2, 5, 155, 4, }, { 1, 1, 2, 5, 155, 127, }, - { 3, 1, 2, 5, 155, 62, }, - { 4, 1, 2, 5, 155, 58, }, + { 3, 1, 2, 5, 155, 72, }, + { 4, 1, 2, 5, 155, 52, }, { 5, 1, 2, 5, 155, 72, }, { 6, 1, 2, 5, 155, 62, }, { 7, 1, 2, 5, 155, 30, }, { 8, 1, 2, 5, 155, 62, }, - { 9, 1, 2, 5, 155, -128, }, + { 9, 1, 2, 5, 155, 4, }, }; RTW_DECL_TABLE_TXPWR_LMT(rtw8822c_txpwr_lmt_type5); diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822ce.c b/drivers/net/wireless/realtek/rtw88/rtw8822ce.c index 026ac49ce6..e26c6bc829 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8822ce.c +++ b/drivers/net/wireless/realtek/rtw88/rtw8822ce.c @@ -4,7 +4,8 @@ #include #include -#include "rtw8822ce.h" +#include "pci.h" +#include "rtw8822c.h" static const struct pci_device_id rtw_8822ce_id_table[] = { { diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822cs.c b/drivers/net/wireless/realtek/rtw88/rtw8822cs.c new file mode 100644 index 0000000000..5d68b9aa5f --- /dev/null +++ b/drivers/net/wireless/realtek/rtw88/rtw8822cs.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* Copyright(c) Martin Blumenstingl + */ + +#include +#include "sdio_ids.h" +#include +#include "main.h" +#include "rtw8822c.h" +#include "sdio.h" + +static const struct sdio_device_id rtw_8822cs_id_table[] = { + { + SDIO_DEVICE(SDIO_VENDOR_ID_REALTEK, + SDIO_DEVICE_ID_REALTEK_RTW8822CS), + .driver_data = (kernel_ulong_t)&rtw8822c_hw_spec, + }, + {} +}; +MODULE_DEVICE_TABLE(sdio, rtw_8822cs_id_table); + +static struct sdio_driver rtw_8822cs_driver = { + .name = "rtw_8822cs", + .probe = rtw_sdio_probe, + .remove = rtw_sdio_remove, + .id_table = rtw_8822cs_id_table, + .drv = { + .pm = &rtw_sdio_pm_ops, + .shutdown = rtw_sdio_shutdown, + } +}; +module_sdio_driver(rtw_8822cs_driver); + +MODULE_AUTHOR("Martin Blumenstingl "); +MODULE_DESCRIPTION("Realtek 802.11ac wireless 8822cs driver"); +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822cu.c b/drivers/net/wireless/realtek/rtw88/rtw8822cu.c new file mode 100644 index 0000000000..157d5102a4 --- /dev/null +++ b/drivers/net/wireless/realtek/rtw88/rtw8822cu.c @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* Copyright(c) 2018-2019 Realtek Corporation + */ + +#include +#include +#include "main.h" +#include "rtw8822c.h" +#include "usb.h" + +static const struct usb_device_id rtw_8822cu_id_table[] = { + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc82c, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822c_hw_spec) }, + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc812, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822c_hw_spec) }, + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc82e, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822c_hw_spec) }, + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xd820, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822c_hw_spec) }, + { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xd82b, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822c_hw_spec) }, + { USB_DEVICE_AND_INTERFACE_INFO(0x13b1, 0x0043, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t)&(rtw8822c_hw_spec) }, /* Alpha - Alpha */ + {}, +}; +MODULE_DEVICE_TABLE(usb, rtw_8822cu_id_table); + +static int rtw8822cu_probe(struct usb_interface *intf, + const struct usb_device_id *id) +{ + return rtw_usb_probe(intf, id); +} + +static struct usb_driver rtw_8822cu_driver = { + .name = "rtw_8822cu", + .id_table = rtw_8822cu_id_table, + .probe = rtw8822cu_probe, + .disconnect = rtw_usb_disconnect, +}; +module_usb_driver(rtw_8822cu_driver); + +MODULE_AUTHOR("Realtek Corporation"); +MODULE_DESCRIPTION("Realtek 802.11ac wireless 8822cu driver"); +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/net/wireless/realtek/rtw88/rx.c b/drivers/net/wireless/realtek/rtw88/rx.c index 7087e385a9..b420a39b16 100644 --- a/drivers/net/wireless/realtek/rtw88/rx.c +++ b/drivers/net/wireless/realtek/rtw88/rx.c @@ -6,6 +6,7 @@ #include "rx.h" #include "ps.h" #include "debug.h" +#include "fw.h" void rtw_rx_stats(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, struct sk_buff *skb) @@ -138,6 +139,13 @@ static void rtw_rx_addr_match(struct rtw_dev *rtwdev, rtw_iterate_vifs_atomic(rtwdev, rtw_rx_addr_match_iter, &data); } +static void rtw_set_rx_freq_by_pktstat(struct rtw_rx_pkt_stat *pkt_stat, + struct ieee80211_rx_status *rx_status) +{ + rx_status->freq = pkt_stat->freq; + rx_status->band = pkt_stat->band; +} + void rtw_rx_fill_rx_status(struct rtw_dev *rtwdev, struct rtw_rx_pkt_stat *pkt_stat, struct ieee80211_hdr *hdr, @@ -148,17 +156,37 @@ void rtw_rx_fill_rx_status(struct rtw_dev *rtwdev, u8 path; memset(rx_status, 0, sizeof(*rx_status)); + if (!hw) { + rtw_warn(rtwdev, "hw NULL in %s\n", __func__); + return; + } + if (!hw->conf.chandef.chan) { + rtw_warn(rtwdev, "hw->conf.chandef.chan NULL in %s\n", __func__); + return; + } + rx_status->freq = hw->conf.chandef.chan->center_freq; rx_status->band = hw->conf.chandef.chan->band; + if (rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_SCAN_OFFLOAD) && + test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) + rtw_set_rx_freq_by_pktstat(pkt_stat, rx_status); if (pkt_stat->crc_err) rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; if (pkt_stat->decrypted) rx_status->flag |= RX_FLAG_DECRYPTED; if (pkt_stat->rate >= DESC_RATEVHT1SS_MCS0) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0) rx_status->encoding = RX_ENC_VHT; +#else + rx_status->flag |= RX_FLAG_VHT; +#endif else if (pkt_stat->rate >= DESC_RATEMCS0) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0) rx_status->encoding = RX_ENC_HT; +#else + rx_status->flag |= RX_FLAG_VHT; +#endif if (rx_status->band == NL80211_BAND_5GHZ && pkt_stat->rate >= DESC_RATE6M && @@ -177,11 +205,23 @@ void rtw_rx_fill_rx_status(struct rtw_dev *rtwdev, rx_status->mactime = pkt_stat->tsf_low; if (pkt_stat->bw == RTW_CHANNEL_WIDTH_80) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0) rx_status->bw = RATE_INFO_BW_80; +#else + rx_status->vht_flag |= RX_VHT_FLAG_80MHZ; +#endif else if (pkt_stat->bw == RTW_CHANNEL_WIDTH_40) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0) rx_status->bw = RATE_INFO_BW_40; +#else + rx_status->flag |= RX_FLAG_40MHZ; +#endif else +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0) rx_status->bw = RATE_INFO_BW_20; +#else + /* What goes here? */ +#endif rx_status->signal = pkt_stat->signal_power; for (path = 0; path < rtwdev->hal.rf_path_num; path++) { diff --git a/drivers/net/wireless/realtek/rtw88/sar.c b/drivers/net/wireless/realtek/rtw88/sar.c new file mode 100644 index 0000000000..475e79c91f --- /dev/null +++ b/drivers/net/wireless/realtek/rtw88/sar.c @@ -0,0 +1,116 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* Copyright(c) 2018-2021 Realtek Corporation + */ + +#include +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 11, 0) +#include "sar.h" +#include "phy.h" +#include "debug.h" + +s8 rtw_query_sar(struct rtw_dev *rtwdev, const struct rtw_sar_arg *arg) +{ + const struct rtw_hal *hal = &rtwdev->hal; + const struct rtw_sar *sar = &hal->sar; + + switch (sar->src) { + default: + rtw_warn(rtwdev, "unknown SAR source: %d\n", sar->src); + fallthrough; + case RTW_SAR_SOURCE_NONE: + return (s8)rtwdev->chip->max_power_index; + case RTW_SAR_SOURCE_COMMON: + return sar->cfg[arg->path][arg->rs].common[arg->sar_band]; + } +} + +static int rtw_apply_sar(struct rtw_dev *rtwdev, const struct rtw_sar *new) +{ + struct rtw_hal *hal = &rtwdev->hal; + struct rtw_sar *sar = &hal->sar; + + if (sar->src != RTW_SAR_SOURCE_NONE && new->src != sar->src) { + rtw_warn(rtwdev, "SAR source: %d is in use\n", sar->src); + return -EBUSY; + } + + *sar = *new; + rtw_phy_set_tx_power_level(rtwdev, hal->current_channel); + + return 0; +} + +static s8 rtw_sar_to_phy(struct rtw_dev *rtwdev, u8 fct, s32 sar, + const struct rtw_sar_arg *arg) +{ + struct rtw_hal *hal = &rtwdev->hal; + u8 txgi = rtwdev->chip->txgi_factor; + u8 max = rtwdev->chip->max_power_index; + s32 tmp; + s8 base; + + tmp = fct > txgi ? sar >> (fct - txgi) : sar << (txgi - fct); + base = arg->sar_band == RTW_SAR_BAND_0 ? + hal->tx_pwr_by_rate_base_2g[arg->path][arg->rs] : + hal->tx_pwr_by_rate_base_5g[arg->path][arg->rs]; + + return (s8)clamp_t(s32, tmp, -max - 1, max) - base; +} + +static const struct cfg80211_sar_freq_ranges rtw_common_sar_freq_ranges[] = { + [RTW_SAR_BAND_0] = { .start_freq = 2412, .end_freq = 2484, }, + [RTW_SAR_BAND_1] = { .start_freq = 5180, .end_freq = 5320, }, + [RTW_SAR_BAND_3] = { .start_freq = 5500, .end_freq = 5720, }, + [RTW_SAR_BAND_4] = { .start_freq = 5745, .end_freq = 5825, }, +}; + +const struct cfg80211_sar_capa rtw_sar_capa = { + .type = NL80211_SAR_TYPE_POWER, + .num_freq_ranges = RTW_SAR_BAND_NR, + .freq_ranges = rtw_common_sar_freq_ranges, +}; + +int rtw_set_sar_specs(struct rtw_dev *rtwdev, + const struct cfg80211_sar_specs *sar) +{ + struct rtw_sar_arg arg = {0}; + struct rtw_sar new = {0}; + u32 idx, i, j, k; + s32 power; + s8 val; + + if (sar->type != NL80211_SAR_TYPE_POWER) + return -EINVAL; + + memset(&new, rtwdev->chip->max_power_index, sizeof(new)); + new.src = RTW_SAR_SOURCE_COMMON; + + for (i = 0; i < sar->num_sub_specs; i++) { + idx = sar->sub_specs[i].freq_range_index; + if (idx >= RTW_SAR_BAND_NR) + return -EINVAL; + + power = sar->sub_specs[i].power; + rtw_dbg(rtwdev, RTW_DBG_REGD, "On freq %u to %u, set SAR %d in 1/%lu dBm\n", + rtw_common_sar_freq_ranges[idx].start_freq, + rtw_common_sar_freq_ranges[idx].end_freq, + power, BIT(RTW_COMMON_SAR_FCT)); + + for (j = 0; j < RTW_RF_PATH_MAX; j++) { + for (k = 0; k < RTW_RATE_SECTION_MAX; k++) { + arg = (struct rtw_sar_arg){ + .sar_band = idx, + .path = j, + .rs = k, + }; + val = rtw_sar_to_phy(rtwdev, RTW_COMMON_SAR_FCT, + power, &arg); + new.cfg[j][k].common[idx] = val; + } + } + } + + return rtw_apply_sar(rtwdev, &new); +} +#endif + diff --git a/drivers/net/wireless/realtek/rtw88/sar.h b/drivers/net/wireless/realtek/rtw88/sar.h new file mode 100644 index 0000000000..75f6118ef9 --- /dev/null +++ b/drivers/net/wireless/realtek/rtw88/sar.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ +/* Copyright(c) 2018-2021 Realtek Corporation + */ + +#include "main.h" + +/* NL80211_SAR_TYPE_POWER means unit is in 0.25 dBm, + * where 0.25 = 1/4 = 2^(-2), so make factor 2. + */ +#define RTW_COMMON_SAR_FCT 2 + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 11, 0) +struct rtw_sar_arg { + u8 sar_band; + u8 path; + u8 rs; +}; + +extern const struct cfg80211_sar_capa rtw_sar_capa; + +s8 rtw_query_sar(struct rtw_dev *rtwdev, const struct rtw_sar_arg *arg); +int rtw_set_sar_specs(struct rtw_dev *rtwdev, + const struct cfg80211_sar_specs *sar); +#endif + diff --git a/drivers/net/wireless/realtek/rtw88/sch_generic.h b/drivers/net/wireless/realtek/rtw88/sch_generic.h new file mode 100644 index 0000000000..241a0c597b --- /dev/null +++ b/drivers/net/wireless/realtek/rtw88/sch_generic.h @@ -0,0 +1,849 @@ +#ifndef __NET_SCHED_GENERIC_H +#define __NET_SCHED_GENERIC_H + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct Qdisc_ops; +struct qdisc_walker; +struct tcf_walker; +struct module; + +struct qdisc_rate_table { + struct tc_ratespec rate; + u32 data[256]; + struct qdisc_rate_table *next; + int refcnt; +}; + +enum qdisc_state_t { + __QDISC_STATE_SCHED, + __QDISC_STATE_DEACTIVATED, +}; + +struct qdisc_size_table { + struct rcu_head rcu; + struct list_head list; + struct tc_sizespec szopts; + int refcnt; + u16 data[]; +}; + +/* similar to sk_buff_head, but skb->prev pointer is undefined. */ +struct qdisc_skb_head { + struct sk_buff *head; + struct sk_buff *tail; + __u32 qlen; + spinlock_t lock; +}; + +struct Qdisc { + int (*enqueue)(struct sk_buff *skb, + struct Qdisc *sch, + struct sk_buff **to_free); + struct sk_buff * (*dequeue)(struct Qdisc *sch); + unsigned int flags; +#define TCQ_F_BUILTIN 1 +#define TCQ_F_INGRESS 2 +#define TCQ_F_CAN_BYPASS 4 +#define TCQ_F_MQROOT 8 +#define TCQ_F_ONETXQUEUE 0x10 /* dequeue_skb() can assume all skbs are for + * q->dev_queue : It can test + * netif_xmit_frozen_or_stopped() before + * dequeueing next packet. + * Its true for MQ/MQPRIO slaves, or non + * multiqueue device. + */ +#define TCQ_F_WARN_NONWC (1 << 16) +#define TCQ_F_CPUSTATS 0x20 /* run using percpu statistics */ +#define TCQ_F_NOPARENT 0x40 /* root of its hierarchy : + * qdisc_tree_decrease_qlen() should stop. + */ + u32 limit; + const struct Qdisc_ops *ops; + struct qdisc_size_table __rcu *stab; + struct hlist_node hash; + u32 handle; + u32 parent; + void *u32_node; + + struct netdev_queue *dev_queue; + + struct net_rate_estimator __rcu *rate_est; + struct gnet_stats_basic_cpu __percpu *cpu_bstats; + struct gnet_stats_queue __percpu *cpu_qstats; + + /* + * For performance sake on SMP, we put highly modified fields at the end + */ + struct sk_buff *gso_skb ____cacheline_aligned_in_smp; + struct qdisc_skb_head q; + struct gnet_stats_basic_packed bstats; + seqcount_t running; + struct gnet_stats_queue qstats; + unsigned long state; + struct Qdisc *next_sched; + struct sk_buff *skb_bad_txq; + struct rcu_head rcu_head; + int padded; + atomic_t refcnt; + + spinlock_t busylock ____cacheline_aligned_in_smp; +}; + +static inline bool qdisc_is_running(const struct Qdisc *qdisc) +{ + return (raw_read_seqcount(&qdisc->running) & 1) ? true : false; +} + +static inline bool qdisc_run_begin(struct Qdisc *qdisc) +{ + if (qdisc_is_running(qdisc)) + return false; + /* Variant of write_seqcount_begin() telling lockdep a trylock + * was attempted. + */ + raw_write_seqcount_begin(&qdisc->running); + seqcount_acquire(&qdisc->running.dep_map, 0, 1, _RET_IP_); + return true; +} + +static inline void qdisc_run_end(struct Qdisc *qdisc) +{ + write_seqcount_end(&qdisc->running); +} + +static inline bool qdisc_may_bulk(const struct Qdisc *qdisc) +{ + return qdisc->flags & TCQ_F_ONETXQUEUE; +} + +static inline int qdisc_avail_bulklimit(const struct netdev_queue *txq) +{ +#ifdef CONFIG_BQL + /* Non-BQL migrated drivers will return 0, too. */ + return dql_avail(&txq->dql); +#else + return 0; +#endif +} + +struct Qdisc_class_ops { + /* Child qdisc manipulation */ + struct netdev_queue * (*select_queue)(struct Qdisc *, struct tcmsg *); + int (*graft)(struct Qdisc *, unsigned long cl, + struct Qdisc *, struct Qdisc **); + struct Qdisc * (*leaf)(struct Qdisc *, unsigned long cl); + void (*qlen_notify)(struct Qdisc *, unsigned long); + + /* Class manipulation routines */ + unsigned long (*get)(struct Qdisc *, u32 classid); + void (*put)(struct Qdisc *, unsigned long); + int (*change)(struct Qdisc *, u32, u32, + struct nlattr **, unsigned long *); + int (*delete)(struct Qdisc *, unsigned long); + void (*walk)(struct Qdisc *, struct qdisc_walker * arg); + + /* Filter manipulation */ + struct tcf_proto __rcu ** (*tcf_chain)(struct Qdisc *, unsigned long); + bool (*tcf_cl_offload)(u32 classid); + unsigned long (*bind_tcf)(struct Qdisc *, unsigned long, + u32 classid); + void (*unbind_tcf)(struct Qdisc *, unsigned long); + + /* rtnetlink specific */ + int (*dump)(struct Qdisc *, unsigned long, + struct sk_buff *skb, struct tcmsg*); + int (*dump_stats)(struct Qdisc *, unsigned long, + struct gnet_dump *); +}; + +struct Qdisc_ops { + struct Qdisc_ops *next; + const struct Qdisc_class_ops *cl_ops; + char id[IFNAMSIZ]; + int priv_size; + + int (*enqueue)(struct sk_buff *skb, + struct Qdisc *sch, + struct sk_buff **to_free); + struct sk_buff * (*dequeue)(struct Qdisc *); + struct sk_buff * (*peek)(struct Qdisc *); + + int (*init)(struct Qdisc *, struct nlattr *arg); + void (*reset)(struct Qdisc *); + void (*destroy)(struct Qdisc *); + int (*change)(struct Qdisc *, struct nlattr *arg); + void (*attach)(struct Qdisc *); + + int (*dump)(struct Qdisc *, struct sk_buff *); + int (*dump_stats)(struct Qdisc *, struct gnet_dump *); + + struct module *owner; +}; + + +struct tcf_result { + unsigned long class; + u32 classid; +}; + +struct tcf_proto_ops { + struct list_head head; + char kind[IFNAMSIZ]; + + int (*classify)(struct sk_buff *, + const struct tcf_proto *, + struct tcf_result *); + int (*init)(struct tcf_proto*); + bool (*destroy)(struct tcf_proto*, bool); + + unsigned long (*get)(struct tcf_proto*, u32 handle); + int (*change)(struct net *net, struct sk_buff *, + struct tcf_proto*, unsigned long, + u32 handle, struct nlattr **, + unsigned long *, bool); + int (*delete)(struct tcf_proto*, unsigned long); + void (*walk)(struct tcf_proto*, struct tcf_walker *arg); + + /* rtnetlink specific */ + int (*dump)(struct net*, struct tcf_proto*, unsigned long, + struct sk_buff *skb, struct tcmsg*); + + struct module *owner; +}; + +struct tcf_proto { + /* Fast access part */ + struct tcf_proto __rcu *next; + void __rcu *root; + int (*classify)(struct sk_buff *, + const struct tcf_proto *, + struct tcf_result *); + __be16 protocol; + + /* All the rest */ + u32 prio; + u32 classid; + struct Qdisc *q; + void *data; + const struct tcf_proto_ops *ops; + struct rcu_head rcu; +}; + +struct qdisc_skb_cb { + unsigned int pkt_len; + u16 slave_dev_queue_mapping; + u16 tc_classid; +#define QDISC_CB_PRIV_LEN 20 + unsigned char data[QDISC_CB_PRIV_LEN]; +}; + +static inline void qdisc_cb_private_validate(const struct sk_buff *skb, int sz) +{ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0) + struct qdisc_skb_cb *qcb; + + BUILD_BUG_ON(sizeof(skb->cb) < offsetof(struct qdisc_skb_cb, data) + sz); + BUILD_BUG_ON(sizeof(qcb->data) < sz); +#endif +} + +static inline int qdisc_qlen(const struct Qdisc *q) +{ + return q->q.qlen; +} + +static inline struct qdisc_skb_cb *qdisc_skb_cb(const struct sk_buff *skb) +{ + return (struct qdisc_skb_cb *)skb->cb; +} + +static inline spinlock_t *qdisc_lock(struct Qdisc *qdisc) +{ + return &qdisc->q.lock; +} + +static inline struct Qdisc *qdisc_root(const struct Qdisc *qdisc) +{ + struct Qdisc *q = rcu_dereference_rtnl(qdisc->dev_queue->qdisc); + + return q; +} + +static inline struct Qdisc *qdisc_root_sleeping(const struct Qdisc *qdisc) +{ + return qdisc->dev_queue->qdisc_sleeping; +} + +/* The qdisc root lock is a mechanism by which to top level + * of a qdisc tree can be locked from any qdisc node in the + * forest. This allows changing the configuration of some + * aspect of the qdisc tree while blocking out asynchronous + * qdisc access in the packet processing paths. + * + * It is only legal to do this when the root will not change + * on us. Otherwise we'll potentially lock the wrong qdisc + * root. This is enforced by holding the RTNL semaphore, which + * all users of this lock accessor must do. + */ +static inline spinlock_t *qdisc_root_lock(const struct Qdisc *qdisc) +{ + struct Qdisc *root = qdisc_root(qdisc); + + ASSERT_RTNL(); + return qdisc_lock(root); +} + +static inline spinlock_t *qdisc_root_sleeping_lock(const struct Qdisc *qdisc) +{ + struct Qdisc *root = qdisc_root_sleeping(qdisc); + + ASSERT_RTNL(); + return qdisc_lock(root); +} + +static inline seqcount_t *qdisc_root_sleeping_running(const struct Qdisc *qdisc) +{ + struct Qdisc *root = qdisc_root_sleeping(qdisc); + + ASSERT_RTNL(); + return &root->running; +} + +static inline struct net_device *qdisc_dev(const struct Qdisc *qdisc) +{ + return qdisc->dev_queue->dev; +} + +static inline void sch_tree_lock(const struct Qdisc *q) +{ + spin_lock_bh(qdisc_root_sleeping_lock(q)); +} + +static inline void sch_tree_unlock(const struct Qdisc *q) +{ + spin_unlock_bh(qdisc_root_sleeping_lock(q)); +} + +#define tcf_tree_lock(tp) sch_tree_lock((tp)->q) +#define tcf_tree_unlock(tp) sch_tree_unlock((tp)->q) + +extern struct Qdisc noop_qdisc; +extern struct Qdisc_ops noop_qdisc_ops; +extern struct Qdisc_ops pfifo_fast_ops; +extern struct Qdisc_ops mq_qdisc_ops; +extern struct Qdisc_ops noqueue_qdisc_ops; +extern const struct Qdisc_ops *default_qdisc_ops; +static inline const struct Qdisc_ops * +get_default_qdisc_ops(const struct net_device *dev, int ntx) +{ + return ntx < dev->real_num_tx_queues ? + default_qdisc_ops : &pfifo_fast_ops; +} + +struct Qdisc_class_common { + u32 classid; + struct hlist_node hnode; +}; + +struct Qdisc_class_hash { + struct hlist_head *hash; + unsigned int hashsize; + unsigned int hashmask; + unsigned int hashelems; +}; + +static inline unsigned int qdisc_class_hash(u32 id, u32 mask) +{ + id ^= id >> 8; + id ^= id >> 4; + return id & mask; +} + +static inline struct Qdisc_class_common * +qdisc_class_find(const struct Qdisc_class_hash *hash, u32 id) +{ + struct Qdisc_class_common *cl; + unsigned int h; + + h = qdisc_class_hash(id, hash->hashmask); + hlist_for_each_entry(cl, &hash->hash[h], hnode) { + if (cl->classid == id) + return cl; + } + return NULL; +} + +int qdisc_class_hash_init(struct Qdisc_class_hash *); +void qdisc_class_hash_insert(struct Qdisc_class_hash *, + struct Qdisc_class_common *); +void qdisc_class_hash_remove(struct Qdisc_class_hash *, + struct Qdisc_class_common *); +void qdisc_class_hash_grow(struct Qdisc *, struct Qdisc_class_hash *); +void qdisc_class_hash_destroy(struct Qdisc_class_hash *); + +void dev_init_scheduler(struct net_device *dev); +void dev_shutdown(struct net_device *dev); +void dev_activate(struct net_device *dev); +void dev_deactivate(struct net_device *dev); +void dev_deactivate_many(struct list_head *head); +struct Qdisc *dev_graft_qdisc(struct netdev_queue *dev_queue, + struct Qdisc *qdisc); +void qdisc_reset(struct Qdisc *qdisc); +void qdisc_destroy(struct Qdisc *qdisc); +void qdisc_tree_reduce_backlog(struct Qdisc *qdisc, unsigned int n, + unsigned int len); +struct Qdisc *qdisc_alloc(struct netdev_queue *dev_queue, + const struct Qdisc_ops *ops); +struct Qdisc *qdisc_create_dflt(struct netdev_queue *dev_queue, + const struct Qdisc_ops *ops, u32 parentid); +void __qdisc_calculate_pkt_len(struct sk_buff *skb, + const struct qdisc_size_table *stab); +bool tcf_destroy(struct tcf_proto *tp, bool force); +void tcf_destroy_chain(struct tcf_proto __rcu **fl); +int skb_do_redirect(struct sk_buff *); + +static inline bool skb_at_tc_ingress(const struct sk_buff *skb) +{ +#ifdef CONFIG_NET_CLS_ACT + return G_TC_AT(skb->tc_verd) & AT_INGRESS; +#else + return false; +#endif +} + +/* Reset all TX qdiscs greater then index of a device. */ +static inline void qdisc_reset_all_tx_gt(struct net_device *dev, unsigned int i) +{ + struct Qdisc *qdisc; + + for (; i < dev->num_tx_queues; i++) { + qdisc = rtnl_dereference(netdev_get_tx_queue(dev, i)->qdisc); + if (qdisc) { + spin_lock_bh(qdisc_lock(qdisc)); + qdisc_reset(qdisc); + spin_unlock_bh(qdisc_lock(qdisc)); + } + } +} + +static inline void qdisc_reset_all_tx(struct net_device *dev) +{ + qdisc_reset_all_tx_gt(dev, 0); +} + +/* Are all TX queues of the device empty? */ +static inline bool qdisc_all_tx_empty(const struct net_device *dev) +{ + unsigned int i; + + rcu_read_lock(); + for (i = 0; i < dev->num_tx_queues; i++) { + struct netdev_queue *txq = netdev_get_tx_queue(dev, i); + const struct Qdisc *q = rcu_dereference(txq->qdisc); + + if (q->q.qlen) { + rcu_read_unlock(); + return false; + } + } + rcu_read_unlock(); + return true; +} + +/* Are any of the TX qdiscs changing? */ +static inline bool qdisc_tx_changing(const struct net_device *dev) +{ + unsigned int i; + + for (i = 0; i < dev->num_tx_queues; i++) { + struct netdev_queue *txq = netdev_get_tx_queue(dev, i); + if (rcu_access_pointer(txq->qdisc) != txq->qdisc_sleeping) + return true; + } + return false; +} + +/* Is the device using the noop qdisc on all queues? */ +static inline bool qdisc_tx_is_noop(const struct net_device *dev) +{ + unsigned int i; + + for (i = 0; i < dev->num_tx_queues; i++) { + struct netdev_queue *txq = netdev_get_tx_queue(dev, i); + if (rcu_access_pointer(txq->qdisc) != &noop_qdisc) + return false; + } + return true; +} + +static inline unsigned int qdisc_pkt_len(const struct sk_buff *skb) +{ + return qdisc_skb_cb(skb)->pkt_len; +} + +/* additional qdisc xmit flags (NET_XMIT_MASK in linux/netdevice.h) */ +enum net_xmit_qdisc_t { + __NET_XMIT_STOLEN = 0x00010000, + __NET_XMIT_BYPASS = 0x00020000, +}; + +#ifdef CONFIG_NET_CLS_ACT +#define net_xmit_drop_count(e) ((e) & __NET_XMIT_STOLEN ? 0 : 1) +#else +#define net_xmit_drop_count(e) (1) +#endif + +static inline void qdisc_calculate_pkt_len(struct sk_buff *skb, + const struct Qdisc *sch) +{ +#ifdef CONFIG_NET_SCHED + struct qdisc_size_table *stab = rcu_dereference_bh(sch->stab); + + if (stab) + __qdisc_calculate_pkt_len(skb, stab); +#endif +} + +static inline int qdisc_enqueue(struct sk_buff *skb, struct Qdisc *sch, + struct sk_buff **to_free) +{ + qdisc_calculate_pkt_len(skb, sch); + return sch->enqueue(skb, sch, to_free); +} + +static inline bool qdisc_is_percpu_stats(const struct Qdisc *q) +{ + return q->flags & TCQ_F_CPUSTATS; +} + +static inline void _bstats_update(struct gnet_stats_basic_packed *bstats, + __u64 bytes, __u32 packets) +{ + bstats->bytes += bytes; + bstats->packets += packets; +} + +static inline void bstats_update(struct gnet_stats_basic_packed *bstats, + const struct sk_buff *skb) +{ + _bstats_update(bstats, + qdisc_pkt_len(skb), + skb_is_gso(skb) ? skb_shinfo(skb)->gso_segs : 1); +} + +static inline void _bstats_cpu_update(struct gnet_stats_basic_cpu *bstats, + __u64 bytes, __u32 packets) +{ + u64_stats_update_begin(&bstats->syncp); + _bstats_update(&bstats->bstats, bytes, packets); + u64_stats_update_end(&bstats->syncp); +} + +static inline void bstats_cpu_update(struct gnet_stats_basic_cpu *bstats, + const struct sk_buff *skb) +{ + u64_stats_update_begin(&bstats->syncp); + bstats_update(&bstats->bstats, skb); + u64_stats_update_end(&bstats->syncp); +} + +static inline void qdisc_bstats_cpu_update(struct Qdisc *sch, + const struct sk_buff *skb) +{ + bstats_cpu_update(this_cpu_ptr(sch->cpu_bstats), skb); +} + +static inline void qdisc_bstats_update(struct Qdisc *sch, + const struct sk_buff *skb) +{ + bstats_update(&sch->bstats, skb); +} + +static inline void qdisc_qstats_backlog_dec(struct Qdisc *sch, + const struct sk_buff *skb) +{ + sch->qstats.backlog -= qdisc_pkt_len(skb); +} + +static inline void qdisc_qstats_backlog_inc(struct Qdisc *sch, + const struct sk_buff *skb) +{ + sch->qstats.backlog += qdisc_pkt_len(skb); +} + +static inline void __qdisc_qstats_drop(struct Qdisc *sch, int count) +{ + sch->qstats.drops += count; +} + +static inline void qstats_drop_inc(struct gnet_stats_queue *qstats) +{ + qstats->drops++; +} + +static inline void qstats_overlimit_inc(struct gnet_stats_queue *qstats) +{ + qstats->overlimits++; +} + +static inline void qdisc_qstats_drop(struct Qdisc *sch) +{ + qstats_drop_inc(&sch->qstats); +} + +static inline void qdisc_qstats_cpu_drop(struct Qdisc *sch) +{ + this_cpu_inc(sch->cpu_qstats->drops); +} + +static inline void qdisc_qstats_overlimit(struct Qdisc *sch) +{ + sch->qstats.overlimits++; +} + +static inline void qdisc_skb_head_init(struct qdisc_skb_head *qh) +{ + qh->head = NULL; + qh->tail = NULL; + qh->qlen = 0; +} + +static inline int __qdisc_enqueue_tail(struct sk_buff *skb, struct Qdisc *sch, + struct qdisc_skb_head *qh) +{ + struct sk_buff *last = qh->tail; + + if (last) { + skb->next = NULL; + last->next = skb; + qh->tail = skb; + } else { + qh->tail = skb; + qh->head = skb; + } + qh->qlen++; + qdisc_qstats_backlog_inc(sch, skb); + + return NET_XMIT_SUCCESS; +} + +static inline int qdisc_enqueue_tail(struct sk_buff *skb, struct Qdisc *sch) +{ + return __qdisc_enqueue_tail(skb, sch, &sch->q); +} + +static inline struct sk_buff *__qdisc_dequeue_head(struct qdisc_skb_head *qh) +{ + struct sk_buff *skb = qh->head; + + if (likely(skb != NULL)) { + qh->head = skb->next; + qh->qlen--; + if (qh->head == NULL) + qh->tail = NULL; + skb->next = NULL; + } + + return skb; +} + +static inline struct sk_buff *qdisc_dequeue_head(struct Qdisc *sch) +{ + struct sk_buff *skb = __qdisc_dequeue_head(&sch->q); + + if (likely(skb != NULL)) { + qdisc_qstats_backlog_dec(sch, skb); + qdisc_bstats_update(sch, skb); + } + + return skb; +} + +/* Instead of calling kfree_skb() while root qdisc lock is held, + * queue the skb for future freeing at end of __dev_xmit_skb() + */ +static inline void __qdisc_drop(struct sk_buff *skb, struct sk_buff **to_free) +{ + skb->next = *to_free; + *to_free = skb; +} + +static inline unsigned int __qdisc_queue_drop_head(struct Qdisc *sch, + struct qdisc_skb_head *qh, + struct sk_buff **to_free) +{ + struct sk_buff *skb = __qdisc_dequeue_head(qh); + + if (likely(skb != NULL)) { + unsigned int len = qdisc_pkt_len(skb); + + qdisc_qstats_backlog_dec(sch, skb); + __qdisc_drop(skb, to_free); + return len; + } + + return 0; +} + +static inline unsigned int qdisc_queue_drop_head(struct Qdisc *sch, + struct sk_buff **to_free) +{ + return __qdisc_queue_drop_head(sch, &sch->q, to_free); +} + +static inline struct sk_buff *qdisc_peek_head(struct Qdisc *sch) +{ + const struct qdisc_skb_head *qh = &sch->q; + + return qh->head; +} + +/* generic pseudo peek method for non-work-conserving qdisc */ +static inline struct sk_buff *qdisc_peek_dequeued(struct Qdisc *sch) +{ + /* we can reuse ->gso_skb because peek isn't called for root qdiscs */ + if (!sch->gso_skb) { + sch->gso_skb = sch->dequeue(sch); + if (sch->gso_skb) { + /* it's still part of the queue */ + qdisc_qstats_backlog_inc(sch, sch->gso_skb); + sch->q.qlen++; + } + } + + return sch->gso_skb; +} + +/* use instead of qdisc->dequeue() for all qdiscs queried with ->peek() */ +static inline struct sk_buff *qdisc_dequeue_peeked(struct Qdisc *sch) +{ + struct sk_buff *skb = sch->gso_skb; + + if (skb) { + sch->gso_skb = NULL; + qdisc_qstats_backlog_dec(sch, skb); + sch->q.qlen--; + } else { + skb = sch->dequeue(sch); + } + + return skb; +} + +static inline void __qdisc_reset_queue(struct qdisc_skb_head *qh) +{ + /* + * We do not know the backlog in bytes of this list, it + * is up to the caller to correct it + */ + ASSERT_RTNL(); + if (qh->qlen) { + rtnl_kfree_skbs(qh->head, qh->tail); + + qh->head = NULL; + qh->tail = NULL; + qh->qlen = 0; + } +} + +static inline void qdisc_reset_queue(struct Qdisc *sch) +{ + __qdisc_reset_queue(&sch->q); + sch->qstats.backlog = 0; +} + +static inline struct Qdisc *qdisc_replace(struct Qdisc *sch, struct Qdisc *new, + struct Qdisc **pold) +{ + struct Qdisc *old; + + sch_tree_lock(sch); + old = *pold; + *pold = new; + if (old != NULL) { + qdisc_tree_reduce_backlog(old, old->q.qlen, old->qstats.backlog); + qdisc_reset(old); + } + sch_tree_unlock(sch); + + return old; +} + +static inline void rtnl_qdisc_drop(struct sk_buff *skb, struct Qdisc *sch) +{ + rtnl_kfree_skbs(skb, skb); + qdisc_qstats_drop(sch); +} + + +static inline int qdisc_drop(struct sk_buff *skb, struct Qdisc *sch, + struct sk_buff **to_free) +{ + __qdisc_drop(skb, to_free); + qdisc_qstats_drop(sch); + + return NET_XMIT_DROP; +} + +/* Length to Time (L2T) lookup in a qdisc_rate_table, to determine how + long it will take to send a packet given its size. + */ +static inline u32 qdisc_l2t(struct qdisc_rate_table* rtab, unsigned int pktlen) +{ + int slot = pktlen + rtab->rate.cell_align + rtab->rate.overhead; + if (slot < 0) + slot = 0; + slot >>= rtab->rate.cell_log; + if (slot > 255) + return rtab->data[255]*(slot >> 8) + rtab->data[slot & 0xFF]; + return rtab->data[slot]; +} + +struct psched_ratecfg { + u64 rate_bytes_ps; /* bytes per second */ + u32 mult; + u16 overhead; + u8 linklayer; + u8 shift; +}; + +static inline u64 psched_l2t_ns(const struct psched_ratecfg *r, + unsigned int len) +{ + len += r->overhead; + + if (unlikely(r->linklayer == TC_LINKLAYER_ATM)) + return ((u64)(DIV_ROUND_UP(len,48)*53) * r->mult) >> r->shift; + + return ((u64)len * r->mult) >> r->shift; +} + +void psched_ratecfg_precompute(struct psched_ratecfg *r, + const struct tc_ratespec *conf, + u64 rate64); + +static inline void psched_ratecfg_getrate(struct tc_ratespec *res, + const struct psched_ratecfg *r) +{ + memset(res, 0, sizeof(*res)); + + /* legacy struct tc_ratespec has a 32bit @rate field + * Qdisc using 64bit rate should add new attributes + * in order to maintain compatibility. + */ + res->rate = min_t(u64, r->rate_bytes_ps, ~0U); + + res->overhead = r->overhead; + res->linklayer = (r->linklayer & TC_LINKLAYER_MASK); +} + +#endif diff --git a/drivers/net/wireless/realtek/rtw88/sdio.c b/drivers/net/wireless/realtek/rtw88/sdio.c new file mode 100644 index 0000000000..b19262ec5d --- /dev/null +++ b/drivers/net/wireless/realtek/rtw88/sdio.c @@ -0,0 +1,1416 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* Copyright (C) 2021 Martin Blumenstingl + * Copyright (C) 2021 Jernej Skrabec + * + * Based on rtw88/pci.c: + * Copyright(c) 2018-2019 Realtek Corporation + */ + +#include +#include +#include +#include "main.h" +#include "debug.h" +#include "fw.h" +#include "ps.h" +#include "reg.h" +#include "rx.h" +#include "sdio.h" +#include "tx.h" + +#define RTW_SDIO_INDIRECT_RW_RETRIES 50 + +static bool rtw_sdio_is_bus_addr(u32 addr) +{ + return !!(addr & RTW_SDIO_BUS_MSK); +} + +static bool rtw_sdio_bus_claim_needed(struct rtw_sdio *rtwsdio) +{ + return !rtwsdio->irq_thread || + rtwsdio->irq_thread != current; +} + +static u32 rtw_sdio_to_bus_offset(struct rtw_dev *rtwdev, u32 addr) +{ + switch (addr & RTW_SDIO_BUS_MSK) { + case WLAN_IOREG_OFFSET: + addr &= WLAN_IOREG_REG_MSK; + addr |= FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, + REG_SDIO_CMD_ADDR_MAC_REG); + break; + case SDIO_LOCAL_OFFSET: + addr &= SDIO_LOCAL_REG_MSK; + addr |= FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, + REG_SDIO_CMD_ADDR_SDIO_REG); + break; + default: + rtw_warn(rtwdev, "Cannot convert addr 0x%08x to bus offset", + addr); + } + + return addr; +} + +static bool rtw_sdio_use_memcpy_io(struct rtw_dev *rtwdev, u32 addr, + u8 alignment) +{ + return IS_ALIGNED(addr, alignment) && + test_bit(RTW_FLAG_POWERON, rtwdev->flags); +} + +static void rtw_sdio_writel(struct rtw_dev *rtwdev, u32 val, u32 addr, + int *err_ret) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + u8 buf[4]; + int i; + + if (rtw_sdio_use_memcpy_io(rtwdev, addr, 4)) { + sdio_writel(rtwsdio->sdio_func, val, addr, err_ret); + return; + } + + *(__le32 *)buf = cpu_to_le32(val); + + for (i = 0; i < 4; i++) { + sdio_writeb(rtwsdio->sdio_func, buf[i], addr + i, err_ret); + if (*err_ret) + return; + } +} + +static void rtw_sdio_writew(struct rtw_dev *rtwdev, u16 val, u32 addr, + int *err_ret) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + u8 buf[2]; + int i; + + *(__le16 *)buf = cpu_to_le16(val); + + for (i = 0; i < 2; i++) { + sdio_writeb(rtwsdio->sdio_func, buf[i], addr + i, err_ret); + if (*err_ret) + return; + } +} + +static u32 rtw_sdio_readl(struct rtw_dev *rtwdev, u32 addr, int *err_ret) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + u8 buf[4]; + int i; + + if (rtw_sdio_use_memcpy_io(rtwdev, addr, 4)) + return sdio_readl(rtwsdio->sdio_func, addr, err_ret); + + for (i = 0; i < 4; i++) { + buf[i] = sdio_readb(rtwsdio->sdio_func, addr + i, err_ret); + if (*err_ret) + return 0; + } + + return le32_to_cpu(*(__le32 *)buf); +} + +static u16 rtw_sdio_readw(struct rtw_dev *rtwdev, u32 addr, int *err_ret) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + u8 buf[2]; + int i; + + for (i = 0; i < 2; i++) { + buf[i] = sdio_readb(rtwsdio->sdio_func, addr + i, err_ret); + if (*err_ret) + return 0; + } + + return le16_to_cpu(*(__le16 *)buf); +} + +static u32 rtw_sdio_to_io_address(struct rtw_dev *rtwdev, u32 addr, + bool direct) +{ + if (!direct) + return addr; + + if (!rtw_sdio_is_bus_addr(addr)) + addr |= WLAN_IOREG_OFFSET; + + return rtw_sdio_to_bus_offset(rtwdev, addr); +} + +static bool rtw_sdio_use_direct_io(struct rtw_dev *rtwdev, u32 addr) +{ + return !rtw_sdio_is_sdio30_supported(rtwdev) || + rtw_sdio_is_bus_addr(addr); +} + +static int rtw_sdio_indirect_reg_cfg(struct rtw_dev *rtwdev, u32 addr, u32 cfg) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + unsigned int retry; + u32 reg_cfg; + int ret; + u8 tmp; + + reg_cfg = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_CFG); + + rtw_sdio_writel(rtwdev, addr | cfg | BIT_SDIO_INDIRECT_REG_CFG_UNK20, + reg_cfg, &ret); + if (ret) + return ret; + + for (retry = 0; retry < RTW_SDIO_INDIRECT_RW_RETRIES; retry++) { + tmp = sdio_readb(rtwsdio->sdio_func, reg_cfg + 2, &ret); + if (!ret && (tmp & BIT(4))) + return 0; + } + + return -ETIMEDOUT; +} + +static u8 rtw_sdio_indirect_read8(struct rtw_dev *rtwdev, u32 addr, + int *err_ret) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + u32 reg_data; + + *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, + BIT_SDIO_INDIRECT_REG_CFG_READ); + if (*err_ret) + return 0; + + reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); + return sdio_readb(rtwsdio->sdio_func, reg_data, err_ret); +} + +static int rtw_sdio_indirect_read_bytes(struct rtw_dev *rtwdev, u32 addr, + u8 *buf, int count) +{ + int i, ret = 0; + + for (i = 0; i < count; i++) { + buf[i] = rtw_sdio_indirect_read8(rtwdev, addr + i, &ret); + if (ret) + break; + } + + return ret; +} + +static u16 rtw_sdio_indirect_read16(struct rtw_dev *rtwdev, u32 addr, + int *err_ret) +{ + u32 reg_data; + u8 buf[2]; + + if (!IS_ALIGNED(addr, 2)) { + *err_ret = rtw_sdio_indirect_read_bytes(rtwdev, addr, buf, 2); + if (*err_ret) + return 0; + + return le16_to_cpu(*(__le16 *)buf); + } + + *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, + BIT_SDIO_INDIRECT_REG_CFG_READ); + if (*err_ret) + return 0; + + reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); + return rtw_sdio_readw(rtwdev, reg_data, err_ret); +} + +static u32 rtw_sdio_indirect_read32(struct rtw_dev *rtwdev, u32 addr, + int *err_ret) +{ + u32 reg_data; + u8 buf[4]; + + if (!IS_ALIGNED(addr, 4)) { + *err_ret = rtw_sdio_indirect_read_bytes(rtwdev, addr, buf, 4); + if (*err_ret) + return 0; + + return le32_to_cpu(*(__le32 *)buf); + } + + *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, + BIT_SDIO_INDIRECT_REG_CFG_READ); + if (*err_ret) + return 0; + + reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); + return rtw_sdio_readl(rtwdev, reg_data, err_ret); +} + +static u8 rtw_sdio_read8(struct rtw_dev *rtwdev, u32 addr) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + bool direct, bus_claim; + int ret; + u8 val; + + direct = rtw_sdio_use_direct_io(rtwdev, addr); + addr = rtw_sdio_to_io_address(rtwdev, addr, direct); + bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); + + if (bus_claim) + sdio_claim_host(rtwsdio->sdio_func); + + if (direct) + val = sdio_readb(rtwsdio->sdio_func, addr, &ret); + else + val = rtw_sdio_indirect_read8(rtwdev, addr, &ret); + + if (bus_claim) + sdio_release_host(rtwsdio->sdio_func); + + if (ret) + rtw_warn(rtwdev, "sdio read8 failed (0x%x): %d", addr, ret); + + return val; +} + +static u16 rtw_sdio_read16(struct rtw_dev *rtwdev, u32 addr) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + bool direct, bus_claim; + int ret; + u16 val; + + direct = rtw_sdio_use_direct_io(rtwdev, addr); + addr = rtw_sdio_to_io_address(rtwdev, addr, direct); + bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); + + if (bus_claim) + sdio_claim_host(rtwsdio->sdio_func); + + if (direct) + val = rtw_sdio_readw(rtwdev, addr, &ret); + else + val = rtw_sdio_indirect_read16(rtwdev, addr, &ret); + + if (bus_claim) + sdio_release_host(rtwsdio->sdio_func); + + if (ret) + rtw_warn(rtwdev, "sdio read16 failed (0x%x): %d", addr, ret); + + return val; +} + +static u32 rtw_sdio_read32(struct rtw_dev *rtwdev, u32 addr) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + bool direct, bus_claim; + u32 val; + int ret; + + direct = rtw_sdio_use_direct_io(rtwdev, addr); + addr = rtw_sdio_to_io_address(rtwdev, addr, direct); + bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); + + if (bus_claim) + sdio_claim_host(rtwsdio->sdio_func); + + if (direct) + val = rtw_sdio_readl(rtwdev, addr, &ret); + else + val = rtw_sdio_indirect_read32(rtwdev, addr, &ret); + + if (bus_claim) + sdio_release_host(rtwsdio->sdio_func); + + if (ret) + rtw_warn(rtwdev, "sdio read32 failed (0x%x): %d", addr, ret); + + return val; +} + +static void rtw_sdio_indirect_write8(struct rtw_dev *rtwdev, u8 val, u32 addr, + int *err_ret) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + u32 reg_data; + + reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); + sdio_writeb(rtwsdio->sdio_func, val, reg_data, err_ret); + if (*err_ret) + return; + + *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, + BIT_SDIO_INDIRECT_REG_CFG_WRITE); +} + +static void rtw_sdio_indirect_write16(struct rtw_dev *rtwdev, u16 val, u32 addr, + int *err_ret) +{ + u32 reg_data; + + if (!IS_ALIGNED(addr, 2)) { + addr = rtw_sdio_to_io_address(rtwdev, addr, true); + rtw_sdio_writew(rtwdev, val, addr, err_ret); + return; + } + + reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); + rtw_sdio_writew(rtwdev, val, reg_data, err_ret); + if (*err_ret) + return; + + *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, + BIT_SDIO_INDIRECT_REG_CFG_WRITE | + BIT_SDIO_INDIRECT_REG_CFG_WORD); +} + +static void rtw_sdio_indirect_write32(struct rtw_dev *rtwdev, u32 val, + u32 addr, int *err_ret) +{ + u32 reg_data; + + if (!IS_ALIGNED(addr, 4)) { + addr = rtw_sdio_to_io_address(rtwdev, addr, true); + rtw_sdio_writel(rtwdev, val, addr, err_ret); + return; + } + + reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); + rtw_sdio_writel(rtwdev, val, reg_data, err_ret); + + *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, + BIT_SDIO_INDIRECT_REG_CFG_WRITE | + BIT_SDIO_INDIRECT_REG_CFG_DWORD); +} + +static void rtw_sdio_write8(struct rtw_dev *rtwdev, u32 addr, u8 val) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + bool direct, bus_claim; + int ret; + + direct = rtw_sdio_use_direct_io(rtwdev, addr); + addr = rtw_sdio_to_io_address(rtwdev, addr, direct); + bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); + + if (bus_claim) + sdio_claim_host(rtwsdio->sdio_func); + + if (direct) + sdio_writeb(rtwsdio->sdio_func, val, addr, &ret); + else + rtw_sdio_indirect_write8(rtwdev, val, addr, &ret); + + if (bus_claim) + sdio_release_host(rtwsdio->sdio_func); + + if (ret) + rtw_warn(rtwdev, "sdio write8 failed (0x%x): %d", addr, ret); +} + +static void rtw_sdio_write16(struct rtw_dev *rtwdev, u32 addr, u16 val) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + bool direct, bus_claim; + int ret; + + direct = rtw_sdio_use_direct_io(rtwdev, addr); + addr = rtw_sdio_to_io_address(rtwdev, addr, direct); + bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); + + if (bus_claim) + sdio_claim_host(rtwsdio->sdio_func); + + if (direct) + rtw_sdio_writew(rtwdev, val, addr, &ret); + else + rtw_sdio_indirect_write16(rtwdev, val, addr, &ret); + + if (bus_claim) + sdio_release_host(rtwsdio->sdio_func); + + if (ret) + rtw_warn(rtwdev, "sdio write16 failed (0x%x): %d", addr, ret); +} + +static void rtw_sdio_write32(struct rtw_dev *rtwdev, u32 addr, u32 val) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + bool direct, bus_claim; + int ret; + + direct = rtw_sdio_use_direct_io(rtwdev, addr); + addr = rtw_sdio_to_io_address(rtwdev, addr, direct); + bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); + + if (bus_claim) + sdio_claim_host(rtwsdio->sdio_func); + + if (direct) + rtw_sdio_writel(rtwdev, val, addr, &ret); + else + rtw_sdio_indirect_write32(rtwdev, val, addr, &ret); + + if (bus_claim) + sdio_release_host(rtwsdio->sdio_func); + + if (ret) + rtw_warn(rtwdev, "sdio write32 failed (0x%x): %d", addr, ret); +} + +static u32 rtw_sdio_get_tx_addr(struct rtw_dev *rtwdev, size_t size, + enum rtw_tx_queue_type queue) +{ + u32 txaddr; + + switch (queue) { + case RTW_TX_QUEUE_BCN: + case RTW_TX_QUEUE_H2C: + case RTW_TX_QUEUE_HI0: + txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, + REG_SDIO_CMD_ADDR_TXFF_HIGH); + break; + case RTW_TX_QUEUE_VI: + case RTW_TX_QUEUE_VO: + txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, + REG_SDIO_CMD_ADDR_TXFF_NORMAL); + break; + case RTW_TX_QUEUE_BE: + case RTW_TX_QUEUE_BK: + txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, + REG_SDIO_CMD_ADDR_TXFF_LOW); + break; + case RTW_TX_QUEUE_MGMT: + txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, + REG_SDIO_CMD_ADDR_TXFF_EXTRA); + break; + default: + rtw_warn(rtwdev, "Unsupported queue for TX addr: 0x%02x\n", + queue); + return 0; + } + + txaddr += DIV_ROUND_UP(size, 4); + + return txaddr; +}; + +static int rtw_sdio_read_port(struct rtw_dev *rtwdev, u8 *buf, size_t count) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + struct mmc_host *host = rtwsdio->sdio_func->card->host; + bool bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); + u32 rxaddr = rtwsdio->rx_addr++; + size_t bytes; + int ret; + + if (bus_claim) + sdio_claim_host(rtwsdio->sdio_func); + + while (count > 0) { + bytes = min_t(size_t, host->max_req_size, count); + + ret = sdio_memcpy_fromio(rtwsdio->sdio_func, buf, + RTW_SDIO_ADDR_RX_RX0FF_GEN(rxaddr), + bytes); + if (ret) { + rtw_warn(rtwdev, + "Failed to read %zu byte(s) from SDIO port 0x%08x", + bytes, rxaddr); + break; + } + + count -= bytes; + buf += bytes; + } + + if (bus_claim) + sdio_release_host(rtwsdio->sdio_func); + + return ret; +} + +static int rtw_sdio_check_free_txpg(struct rtw_dev *rtwdev, u8 queue, + size_t count) +{ + unsigned int pages_free, pages_needed; + + if (rtw_chip_wcpu_11n(rtwdev)) { + u32 free_txpg; + + free_txpg = rtw_sdio_read32(rtwdev, REG_SDIO_FREE_TXPG); + + switch (queue) { + case RTW_TX_QUEUE_BCN: + case RTW_TX_QUEUE_H2C: + case RTW_TX_QUEUE_HI0: + case RTW_TX_QUEUE_MGMT: + /* high */ + pages_free = free_txpg & 0xff; + break; + case RTW_TX_QUEUE_VI: + case RTW_TX_QUEUE_VO: + /* normal */ + pages_free = (free_txpg >> 8) & 0xff; + break; + case RTW_TX_QUEUE_BE: + case RTW_TX_QUEUE_BK: + /* low */ + pages_free = (free_txpg >> 16) & 0xff; + break; + default: + rtw_warn(rtwdev, "Unknown mapping for queue %u\n", queue); + return -EINVAL; + } + + /* add the pages from the public queue */ + pages_free += (free_txpg >> 24) & 0xff; + } else { + u32 free_txpg[3]; + + free_txpg[0] = rtw_sdio_read32(rtwdev, REG_SDIO_FREE_TXPG); + free_txpg[1] = rtw_sdio_read32(rtwdev, REG_SDIO_FREE_TXPG + 4); + free_txpg[2] = rtw_sdio_read32(rtwdev, REG_SDIO_FREE_TXPG + 8); + + switch (queue) { + case RTW_TX_QUEUE_BCN: + case RTW_TX_QUEUE_H2C: + case RTW_TX_QUEUE_HI0: + /* high */ + pages_free = free_txpg[0] & 0xfff; + break; + case RTW_TX_QUEUE_VI: + case RTW_TX_QUEUE_VO: + /* normal */ + pages_free = (free_txpg[0] >> 16) & 0xfff; + break; + case RTW_TX_QUEUE_BE: + case RTW_TX_QUEUE_BK: + /* low */ + pages_free = free_txpg[1] & 0xfff; + break; + case RTW_TX_QUEUE_MGMT: + /* extra */ + pages_free = free_txpg[2] & 0xfff; + break; + default: + rtw_warn(rtwdev, "Unknown mapping for queue %u\n", queue); + return -EINVAL; + } + + /* add the pages from the public queue */ + pages_free += (free_txpg[1] >> 16) & 0xfff; + } + + pages_needed = DIV_ROUND_UP(count, rtwdev->chip->page_size); + + if (pages_needed > pages_free) { + rtw_dbg(rtwdev, RTW_DBG_SDIO, + "Not enough free pages (%u needed, %u free) in queue %u for %zu bytes\n", + pages_needed, pages_free, queue, count); + return -EBUSY; + } + + return 0; +} + +static int rtw_sdio_write_port(struct rtw_dev *rtwdev, struct sk_buff *skb, + enum rtw_tx_queue_type queue) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + bool bus_claim; + size_t txsize; + u32 txaddr; + int ret; + + txaddr = rtw_sdio_get_tx_addr(rtwdev, skb->len, queue); + if (!txaddr) + return -EINVAL; + + txsize = sdio_align_size(rtwsdio->sdio_func, skb->len); + + ret = rtw_sdio_check_free_txpg(rtwdev, queue, txsize); + if (ret) + return ret; + + if (!IS_ALIGNED((unsigned long)skb->data, RTW_SDIO_DATA_PTR_ALIGN)) + rtw_warn(rtwdev, "Got unaligned SKB in %s() for queue %u\n", + __func__, queue); + + bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); + + if (bus_claim) + sdio_claim_host(rtwsdio->sdio_func); + + ret = sdio_memcpy_toio(rtwsdio->sdio_func, txaddr, skb->data, txsize); + + if (bus_claim) + sdio_release_host(rtwsdio->sdio_func); + + if (ret) + rtw_warn(rtwdev, + "Failed to write %zu byte(s) to SDIO port 0x%08x", + txsize, txaddr); + + return ret; +} + +static void rtw_sdio_init(struct rtw_dev *rtwdev) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + + rtwsdio->irq_mask = REG_SDIO_HIMR_RX_REQUEST | REG_SDIO_HIMR_CPWM1; +} + +static void rtw_sdio_enable_rx_aggregation(struct rtw_dev *rtwdev) +{ + u8 size, timeout; + + if (rtw_chip_wcpu_11n(rtwdev)) { + size = 0x6; + timeout = 0x6; + } else { + size = 0xff; + timeout = 0x1; + } + + /* Make the firmware honor the size limit configured below */ + rtw_write32_set(rtwdev, REG_RXDMA_AGG_PG_TH, BIT_EN_PRE_CALC); + + rtw_write8_set(rtwdev, REG_TXDMA_PQ_MAP, BIT_RXDMA_AGG_EN); + + rtw_write16(rtwdev, REG_RXDMA_AGG_PG_TH, + FIELD_PREP(BIT_RXDMA_AGG_PG_TH, size) | + FIELD_PREP(BIT_DMA_AGG_TO_V1, timeout)); + + rtw_write8_set(rtwdev, REG_RXDMA_MODE, BIT_DMA_MODE); +} + +static void rtw_sdio_enable_interrupt(struct rtw_dev *rtwdev) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + + rtw_write32(rtwdev, REG_SDIO_HIMR, rtwsdio->irq_mask); +} + +static void rtw_sdio_disable_interrupt(struct rtw_dev *rtwdev) +{ + rtw_write32(rtwdev, REG_SDIO_HIMR, 0x0); +} + +static u8 rtw_sdio_get_tx_qsel(struct rtw_dev *rtwdev, struct sk_buff *skb, + u8 queue) +{ + switch (queue) { + case RTW_TX_QUEUE_BCN: + return TX_DESC_QSEL_BEACON; + case RTW_TX_QUEUE_H2C: + return TX_DESC_QSEL_H2C; + case RTW_TX_QUEUE_MGMT: + if (rtw_chip_wcpu_11n(rtwdev)) + return TX_DESC_QSEL_HIGH; + else + return TX_DESC_QSEL_MGMT; + case RTW_TX_QUEUE_HI0: + return TX_DESC_QSEL_HIGH; + default: + return skb->priority; + } +} + +static int rtw_sdio_setup(struct rtw_dev *rtwdev) +{ + /* nothing to do */ + return 0; +} + +static int rtw_sdio_start(struct rtw_dev *rtwdev) +{ + rtw_sdio_enable_rx_aggregation(rtwdev); + rtw_sdio_enable_interrupt(rtwdev); + + return 0; +} + +static void rtw_sdio_stop(struct rtw_dev *rtwdev) +{ + rtw_sdio_disable_interrupt(rtwdev); +} + +static void rtw_sdio_deep_ps_enter(struct rtw_dev *rtwdev) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + bool tx_empty = true; + u8 queue; + + if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_TX_WAKE)) { + /* Deep PS state is not allowed to TX-DMA */ + for (queue = 0; queue < RTK_MAX_TX_QUEUE_NUM; queue++) { + /* BCN queue is rsvd page, does not have DMA interrupt + * H2C queue is managed by firmware + */ + if (queue == RTW_TX_QUEUE_BCN || + queue == RTW_TX_QUEUE_H2C) + continue; + + /* check if there is any skb DMAing */ + if (skb_queue_len(&rtwsdio->tx_queue[queue])) { + tx_empty = false; + break; + } + } + } + + if (!tx_empty) { + rtw_dbg(rtwdev, RTW_DBG_PS, + "TX path not empty, cannot enter deep power save state\n"); + return; + } + + set_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags); + rtw_power_mode_change(rtwdev, true); +} + +static void rtw_sdio_deep_ps_leave(struct rtw_dev *rtwdev) +{ + if (test_and_clear_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags)) + rtw_power_mode_change(rtwdev, false); +} + +static void rtw_sdio_deep_ps(struct rtw_dev *rtwdev, bool enter) +{ + if (enter && !test_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags)) + rtw_sdio_deep_ps_enter(rtwdev); + + if (!enter && test_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags)) + rtw_sdio_deep_ps_leave(rtwdev); +} + +static void rtw_sdio_tx_kick_off(struct rtw_dev *rtwdev) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + + queue_work(rtwsdio->txwq, &rtwsdio->tx_handler_data->work); +} + +static void rtw_sdio_link_ps(struct rtw_dev *rtwdev, bool enter) +{ + /* nothing to do */ +} + +static void rtw_sdio_interface_cfg(struct rtw_dev *rtwdev) +{ + u32 val; + + rtw_read32(rtwdev, REG_SDIO_FREE_TXPG); + + val = rtw_read32(rtwdev, REG_SDIO_TX_CTRL); + val &= 0xfff8; + rtw_write32(rtwdev, REG_SDIO_TX_CTRL, val); +} + +static struct rtw_sdio_tx_data *rtw_sdio_get_tx_data(struct sk_buff *skb) +{ + struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); + + BUILD_BUG_ON(sizeof(struct rtw_sdio_tx_data) > + sizeof(info->status.status_driver_data)); + + return (struct rtw_sdio_tx_data *)info->status.status_driver_data; +} + +static void rtw_sdio_tx_skb_prepare(struct rtw_dev *rtwdev, + struct rtw_tx_pkt_info *pkt_info, + struct sk_buff *skb, + enum rtw_tx_queue_type queue) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + unsigned long data_addr, aligned_addr; + size_t offset; + u8 *pkt_desc; + + pkt_desc = skb_push(skb, chip->tx_pkt_desc_sz); + + data_addr = (unsigned long)pkt_desc; + aligned_addr = ALIGN(data_addr, RTW_SDIO_DATA_PTR_ALIGN); + + if (data_addr != aligned_addr) { + /* Ensure that the start of the pkt_desc is always aligned at + * RTW_SDIO_DATA_PTR_ALIGN. + */ + offset = RTW_SDIO_DATA_PTR_ALIGN - (aligned_addr - data_addr); + + pkt_desc = skb_push(skb, offset); + + /* By inserting padding to align the start of the pkt_desc we + * need to inform the firmware that the actual data starts at + * a different offset than normal. + */ + pkt_info->offset += offset; + } + + memset(pkt_desc, 0, chip->tx_pkt_desc_sz); + + pkt_info->qsel = rtw_sdio_get_tx_qsel(rtwdev, skb, queue); + + rtw_tx_fill_tx_desc(pkt_info, skb); + rtw_tx_fill_txdesc_checksum(rtwdev, pkt_info, pkt_desc); +} + +static int rtw_sdio_write_data(struct rtw_dev *rtwdev, + struct rtw_tx_pkt_info *pkt_info, + struct sk_buff *skb, + enum rtw_tx_queue_type queue) +{ + int ret; + + rtw_sdio_tx_skb_prepare(rtwdev, pkt_info, skb, queue); + + ret = rtw_sdio_write_port(rtwdev, skb, queue); + dev_kfree_skb_any(skb); + + return ret; +} + +static int rtw_sdio_write_data_rsvd_page(struct rtw_dev *rtwdev, u8 *buf, + u32 size) +{ + struct rtw_tx_pkt_info pkt_info = {}; + struct sk_buff *skb; + + skb = rtw_tx_write_data_rsvd_page_get(rtwdev, &pkt_info, buf, size); + if (!skb) + return -ENOMEM; + + return rtw_sdio_write_data(rtwdev, &pkt_info, skb, RTW_TX_QUEUE_BCN); +} + +static int rtw_sdio_write_data_h2c(struct rtw_dev *rtwdev, u8 *buf, u32 size) +{ + struct rtw_tx_pkt_info pkt_info = {}; + struct sk_buff *skb; + + skb = rtw_tx_write_data_h2c_get(rtwdev, &pkt_info, buf, size); + if (!skb) + return -ENOMEM; + + return rtw_sdio_write_data(rtwdev, &pkt_info, skb, RTW_TX_QUEUE_H2C); +} + +static int rtw_sdio_tx_write(struct rtw_dev *rtwdev, + struct rtw_tx_pkt_info *pkt_info, + struct sk_buff *skb) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + enum rtw_tx_queue_type queue = rtw_tx_queue_mapping(skb); + struct rtw_sdio_tx_data *tx_data; + + rtw_sdio_tx_skb_prepare(rtwdev, pkt_info, skb, queue); + + tx_data = rtw_sdio_get_tx_data(skb); + tx_data->sn = pkt_info->sn; + + skb_queue_tail(&rtwsdio->tx_queue[queue], skb); + + return 0; +} + +static void rtw_sdio_tx_err_isr(struct rtw_dev *rtwdev) +{ + u32 val = rtw_read32(rtwdev, REG_TXDMA_STATUS); + + rtw_write32(rtwdev, REG_TXDMA_STATUS, val); +} + +static void rtw_sdio_rx_skb(struct rtw_dev *rtwdev, struct sk_buff *skb, + u32 pkt_offset, struct rtw_rx_pkt_stat *pkt_stat, + struct ieee80211_rx_status *rx_status) +{ + *IEEE80211_SKB_RXCB(skb) = *rx_status; + + if (pkt_stat->is_c2h) { + skb_put(skb, pkt_stat->pkt_len + pkt_offset); + rtw_fw_c2h_cmd_rx_irqsafe(rtwdev, pkt_offset, skb); + return; + } + + skb_put(skb, pkt_stat->pkt_len); + skb_reserve(skb, pkt_offset); + + rtw_rx_stats(rtwdev, pkt_stat->vif, skb); + + ieee80211_rx_irqsafe(rtwdev->hw, skb); +} + +static void rtw_sdio_rxfifo_recv(struct rtw_dev *rtwdev, u32 rx_len) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + const struct rtw_chip_info *chip = rtwdev->chip; + u32 pkt_desc_sz = chip->rx_pkt_desc_sz; + struct ieee80211_rx_status rx_status; + struct rtw_rx_pkt_stat pkt_stat; + struct sk_buff *skb, *split_skb; + u32 pkt_offset, curr_pkt_len; + size_t bufsz; + u8 *rx_desc; + int ret; + + bufsz = sdio_align_size(rtwsdio->sdio_func, rx_len); + + skb = dev_alloc_skb(bufsz); + if (!skb) + return; + + ret = rtw_sdio_read_port(rtwdev, skb->data, bufsz); + if (ret) { + dev_kfree_skb_any(skb); + return; + } + + while (true) { + rx_desc = skb->data; + chip->ops->query_rx_desc(rtwdev, rx_desc, &pkt_stat, + &rx_status); + pkt_offset = pkt_desc_sz + pkt_stat.drv_info_sz + + pkt_stat.shift; + + curr_pkt_len = ALIGN(pkt_offset + pkt_stat.pkt_len, + RTW_SDIO_DATA_PTR_ALIGN); + + if ((curr_pkt_len + pkt_desc_sz) >= rx_len) { + /* Use the original skb (with it's adjusted offset) + * when processing the last (or even the only) entry to + * have it's memory freed automatically. + */ + rtw_sdio_rx_skb(rtwdev, skb, pkt_offset, &pkt_stat, + &rx_status); + break; + } + + split_skb = dev_alloc_skb(curr_pkt_len); + if (!split_skb) { + rtw_sdio_rx_skb(rtwdev, skb, pkt_offset, &pkt_stat, + &rx_status); + break; + } + + skb_copy_header(split_skb, skb); + memcpy(split_skb->data, skb->data, curr_pkt_len); + + rtw_sdio_rx_skb(rtwdev, split_skb, pkt_offset, &pkt_stat, + &rx_status); + + /* Move to the start of the next RX descriptor */ + skb_reserve(skb, curr_pkt_len); + rx_len -= curr_pkt_len; + } +} + +static void rtw_sdio_rx_isr(struct rtw_dev *rtwdev) +{ + u32 rx_len, hisr, total_rx_bytes = 0; + + do { + if (rtw_chip_wcpu_11n(rtwdev)) + rx_len = rtw_read16(rtwdev, REG_SDIO_RX0_REQ_LEN); + else + rx_len = rtw_read32(rtwdev, REG_SDIO_RX0_REQ_LEN); + + if (!rx_len) + break; + + rtw_sdio_rxfifo_recv(rtwdev, rx_len); + + total_rx_bytes += rx_len; + + if (rtw_chip_wcpu_11n(rtwdev)) { + /* Stop if no more RX requests are pending, even if + * rx_len could be greater than zero in the next + * iteration. This is needed because the RX buffer may + * already contain data while either HW or FW are not + * done filling that buffer yet. Still reading the + * buffer can result in packets where + * rtw_rx_pkt_stat.pkt_len is zero or points beyond the + * end of the buffer. + */ + hisr = rtw_read32(rtwdev, REG_SDIO_HISR); + } else { + /* RTW_WCPU_11AC chips have improved hardware or + * firmware and can use rx_len unconditionally. + */ + hisr = REG_SDIO_HISR_RX_REQUEST; + } + } while (total_rx_bytes < SZ_64K && hisr & REG_SDIO_HISR_RX_REQUEST); +} + +static void rtw_sdio_handle_interrupt(struct sdio_func *sdio_func) +{ + struct ieee80211_hw *hw = sdio_get_drvdata(sdio_func); + struct rtw_sdio *rtwsdio; + struct rtw_dev *rtwdev; + u32 hisr; + + rtwdev = hw->priv; + rtwsdio = (struct rtw_sdio *)rtwdev->priv; + + rtwsdio->irq_thread = current; + + hisr = rtw_read32(rtwdev, REG_SDIO_HISR); + + if (hisr & REG_SDIO_HISR_TXERR) + rtw_sdio_tx_err_isr(rtwdev); + if (hisr & REG_SDIO_HISR_RX_REQUEST) { + hisr &= ~REG_SDIO_HISR_RX_REQUEST; + rtw_sdio_rx_isr(rtwdev); + } + + rtw_write32(rtwdev, REG_SDIO_HISR, hisr); + + rtwsdio->irq_thread = NULL; +} + +static int __maybe_unused rtw_sdio_suspend(struct device *dev) +{ + struct sdio_func *func = dev_to_sdio_func(dev); + struct ieee80211_hw *hw = dev_get_drvdata(dev); + struct rtw_dev *rtwdev = hw->priv; + int ret; + + ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER); + if (ret) + rtw_err(rtwdev, "Failed to host PM flag MMC_PM_KEEP_POWER"); + + return ret; +} + +static int __maybe_unused rtw_sdio_resume(struct device *dev) +{ + return 0; +} + +SIMPLE_DEV_PM_OPS(rtw_sdio_pm_ops, rtw_sdio_suspend, rtw_sdio_resume); +EXPORT_SYMBOL(rtw_sdio_pm_ops); + +static int rtw_sdio_claim(struct rtw_dev *rtwdev, struct sdio_func *sdio_func) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + int ret; + + sdio_claim_host(sdio_func); + + ret = sdio_enable_func(sdio_func); + if (ret) { + rtw_err(rtwdev, "Failed to enable SDIO func"); + goto err_release_host; + } + + ret = sdio_set_block_size(sdio_func, RTW_SDIO_BLOCK_SIZE); + if (ret) { + rtw_err(rtwdev, "Failed to set SDIO block size to 512"); + goto err_disable_func; + } + + rtwsdio->sdio_func = sdio_func; + + rtwsdio->sdio3_bus_mode = mmc_card_uhs(sdio_func->card); + + sdio_set_drvdata(sdio_func, rtwdev->hw); + SET_IEEE80211_DEV(rtwdev->hw, &sdio_func->dev); + + sdio_release_host(sdio_func); + + return 0; + +err_disable_func: + sdio_disable_func(sdio_func); +err_release_host: + sdio_release_host(sdio_func); + return ret; +} + +static void rtw_sdio_declaim(struct rtw_dev *rtwdev, + struct sdio_func *sdio_func) +{ + sdio_claim_host(sdio_func); + sdio_disable_func(sdio_func); + sdio_release_host(sdio_func); +} + +static struct rtw_hci_ops rtw_sdio_ops = { + .tx_write = rtw_sdio_tx_write, + .tx_kick_off = rtw_sdio_tx_kick_off, + .setup = rtw_sdio_setup, + .start = rtw_sdio_start, + .stop = rtw_sdio_stop, + .deep_ps = rtw_sdio_deep_ps, + .link_ps = rtw_sdio_link_ps, + .interface_cfg = rtw_sdio_interface_cfg, + + .read8 = rtw_sdio_read8, + .read16 = rtw_sdio_read16, + .read32 = rtw_sdio_read32, + .write8 = rtw_sdio_write8, + .write16 = rtw_sdio_write16, + .write32 = rtw_sdio_write32, + .write_data_rsvd_page = rtw_sdio_write_data_rsvd_page, + .write_data_h2c = rtw_sdio_write_data_h2c, +}; + +static int rtw_sdio_request_irq(struct rtw_dev *rtwdev, + struct sdio_func *sdio_func) +{ + int ret; + + sdio_claim_host(sdio_func); + ret = sdio_claim_irq(sdio_func, &rtw_sdio_handle_interrupt); + sdio_release_host(sdio_func); + + if (ret) { + rtw_err(rtwdev, "failed to claim SDIO IRQ"); + return ret; + } + + return 0; +} + +static void rtw_sdio_indicate_tx_status(struct rtw_dev *rtwdev, + struct sk_buff *skb) +{ + struct rtw_sdio_tx_data *tx_data = rtw_sdio_get_tx_data(skb); + struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); + struct ieee80211_hw *hw = rtwdev->hw; + + /* enqueue to wait for tx report */ + if (info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS) { + rtw_tx_report_enqueue(rtwdev, skb, tx_data->sn); + return; + } + + /* always ACK for others, then they won't be marked as drop */ + ieee80211_tx_info_clear_status(info); + if (info->flags & IEEE80211_TX_CTL_NO_ACK) + info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; + else + info->flags |= IEEE80211_TX_STAT_ACK; + + ieee80211_tx_status_irqsafe(hw, skb); +} + +static void rtw_sdio_process_tx_queue(struct rtw_dev *rtwdev, + enum rtw_tx_queue_type queue) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + struct sk_buff *skb; + int ret; + + skb = skb_dequeue(&rtwsdio->tx_queue[queue]); + if (!skb) + return; + + ret = rtw_sdio_write_port(rtwdev, skb, queue); + if (ret) { + skb_queue_head(&rtwsdio->tx_queue[queue], skb); + return; + } + + if (queue <= RTW_TX_QUEUE_VO) + rtw_sdio_indicate_tx_status(rtwdev, skb); + else + dev_kfree_skb_any(skb); +} + +static void rtw_sdio_tx_handler(struct work_struct *work) +{ + struct rtw_sdio_work_data *work_data = + container_of(work, struct rtw_sdio_work_data, work); + struct rtw_sdio *rtwsdio; + struct rtw_dev *rtwdev; + int limit, queue; + + rtwdev = work_data->rtwdev; + rtwsdio = (struct rtw_sdio *)rtwdev->priv; + + if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_TX_WAKE)) + rtw_sdio_deep_ps_leave(rtwdev); + + for (queue = RTK_MAX_TX_QUEUE_NUM - 1; queue >= 0; queue--) { + for (limit = 0; limit < 1000; limit++) { + rtw_sdio_process_tx_queue(rtwdev, queue); + + if (skb_queue_empty(&rtwsdio->tx_queue[queue])) + break; + } + } +} + +static void rtw_sdio_free_irq(struct rtw_dev *rtwdev, + struct sdio_func *sdio_func) +{ + sdio_claim_host(sdio_func); + sdio_release_irq(sdio_func); + sdio_release_host(sdio_func); +} + +static int rtw_sdio_init_tx(struct rtw_dev *rtwdev) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + int i; + + rtwsdio->txwq = create_singlethread_workqueue("rtw88_sdio: tx wq"); + if (!rtwsdio->txwq) { + rtw_err(rtwdev, "failed to create TX work queue\n"); + return -ENOMEM; + } + + for (i = 0; i < RTK_MAX_TX_QUEUE_NUM; i++) + skb_queue_head_init(&rtwsdio->tx_queue[i]); + rtwsdio->tx_handler_data = kmalloc(sizeof(*rtwsdio->tx_handler_data), + GFP_KERNEL); + if (!rtwsdio->tx_handler_data) + goto err_destroy_wq; + + rtwsdio->tx_handler_data->rtwdev = rtwdev; + INIT_WORK(&rtwsdio->tx_handler_data->work, rtw_sdio_tx_handler); + + return 0; + +err_destroy_wq: + destroy_workqueue(rtwsdio->txwq); + return -ENOMEM; +} + +static void rtw_sdio_deinit_tx(struct rtw_dev *rtwdev) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + int i; + + for (i = 0; i < RTK_MAX_TX_QUEUE_NUM; i++) + skb_queue_purge(&rtwsdio->tx_queue[i]); + + flush_workqueue(rtwsdio->txwq); + destroy_workqueue(rtwsdio->txwq); + kfree(rtwsdio->tx_handler_data); +} + +int rtw_sdio_probe(struct sdio_func *sdio_func, + const struct sdio_device_id *id) +{ + struct ieee80211_hw *hw; + struct rtw_dev *rtwdev; + int drv_data_size; + int ret; + + drv_data_size = sizeof(struct rtw_dev) + sizeof(struct rtw_sdio); + hw = ieee80211_alloc_hw(drv_data_size, &rtw_ops); + if (!hw) { + dev_err(&sdio_func->dev, "failed to allocate hw"); + return -ENOMEM; + } + + rtwdev = hw->priv; + rtwdev->hw = hw; + rtwdev->dev = &sdio_func->dev; + rtwdev->chip = (struct rtw_chip_info *)id->driver_data; + rtwdev->hci.ops = &rtw_sdio_ops; + rtwdev->hci.type = RTW_HCI_TYPE_SDIO; + + ret = rtw_core_init(rtwdev); + if (ret) + goto err_release_hw; + + rtw_dbg(rtwdev, RTW_DBG_SDIO, + "rtw88 SDIO probe: vendor=0x%04x device=%04x class=%02x", + id->vendor, id->device, id->class); + + ret = rtw_sdio_claim(rtwdev, sdio_func); + if (ret) { + rtw_err(rtwdev, "failed to claim SDIO device"); + goto err_deinit_core; + } + + rtw_sdio_init(rtwdev); + + ret = rtw_sdio_init_tx(rtwdev); + if (ret) { + rtw_err(rtwdev, "failed to init SDIO TX queue\n"); + goto err_sdio_declaim; + } + + ret = rtw_chip_info_setup(rtwdev); + if (ret) { + rtw_err(rtwdev, "failed to setup chip information"); + goto err_destroy_txwq; + } + + ret = rtw_sdio_request_irq(rtwdev, sdio_func); + if (ret) + goto err_destroy_txwq; + + ret = rtw_register_hw(rtwdev, hw); + if (ret) { + rtw_err(rtwdev, "failed to register hw"); + goto err_free_irq; + } + + return 0; + +err_free_irq: + rtw_sdio_free_irq(rtwdev, sdio_func); +err_destroy_txwq: + rtw_sdio_deinit_tx(rtwdev); +err_sdio_declaim: + rtw_sdio_declaim(rtwdev, sdio_func); +err_deinit_core: + rtw_core_deinit(rtwdev); +err_release_hw: + ieee80211_free_hw(hw); + + return ret; +} +EXPORT_SYMBOL(rtw_sdio_probe); + +void rtw_sdio_remove(struct sdio_func *sdio_func) +{ + struct ieee80211_hw *hw = sdio_get_drvdata(sdio_func); + struct rtw_dev *rtwdev; + + if (!hw) + return; + + rtwdev = hw->priv; + + rtw_unregister_hw(rtwdev, hw); + rtw_sdio_disable_interrupt(rtwdev); + rtw_sdio_free_irq(rtwdev, sdio_func); + rtw_sdio_declaim(rtwdev, sdio_func); + rtw_sdio_deinit_tx(rtwdev); + rtw_core_deinit(rtwdev); + ieee80211_free_hw(hw); +} +EXPORT_SYMBOL(rtw_sdio_remove); + +void rtw_sdio_shutdown(struct device *dev) +{ + struct sdio_func *sdio_func = dev_to_sdio_func(dev); + const struct rtw_chip_info *chip; + struct ieee80211_hw *hw; + struct rtw_dev *rtwdev; + + hw = sdio_get_drvdata(sdio_func); + if (!hw) + return; + + rtwdev = hw->priv; + chip = rtwdev->chip; + + if (chip->ops->shutdown) + chip->ops->shutdown(rtwdev); +} +EXPORT_SYMBOL(rtw_sdio_shutdown); + +MODULE_AUTHOR("Martin Blumenstingl"); +MODULE_AUTHOR("Jernej Skrabec"); +MODULE_DESCRIPTION("Realtek 802.11ac wireless SDIO driver"); +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/net/wireless/realtek/rtw88/sdio.h b/drivers/net/wireless/realtek/rtw88/sdio.h new file mode 100644 index 0000000000..3c659ed180 --- /dev/null +++ b/drivers/net/wireless/realtek/rtw88/sdio.h @@ -0,0 +1,178 @@ +/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ +/* Copyright (C) 2021 Martin Blumenstingl + * Copyright (C) 2021 Jernej Skrabec + */ + +#ifndef __REG_SDIO_H_ +#define __REG_SDIO_H_ + +/* I/O bus domain address mapping */ +#define SDIO_LOCAL_OFFSET 0x10250000 +#define WLAN_IOREG_OFFSET 0x10260000 +#define FIRMWARE_FIFO_OFFSET 0x10270000 +#define TX_HIQ_OFFSET 0x10310000 +#define TX_MIQ_OFFSET 0x10320000 +#define TX_LOQ_OFFSET 0x10330000 +#define TX_EPQ_OFFSET 0x10350000 +#define RX_RX0FF_OFFSET 0x10340000 + +#define RTW_SDIO_BUS_MSK 0xffff0000 +#define SDIO_LOCAL_REG_MSK 0x00000fff +#define WLAN_IOREG_REG_MSK 0x0000ffff + +/* SDIO Tx Control */ +#define REG_SDIO_TX_CTRL (SDIO_LOCAL_OFFSET + 0x0000) + +/*SDIO status timeout*/ +#define REG_SDIO_TIMEOUT (SDIO_LOCAL_OFFSET + 0x0002) + +/* SDIO Host Interrupt Mask */ +#define REG_SDIO_HIMR (SDIO_LOCAL_OFFSET + 0x0014) +#define REG_SDIO_HIMR_RX_REQUEST BIT(0) +#define REG_SDIO_HIMR_AVAL BIT(1) +#define REG_SDIO_HIMR_TXERR BIT(2) +#define REG_SDIO_HIMR_RXERR BIT(3) +#define REG_SDIO_HIMR_TXFOVW BIT(4) +#define REG_SDIO_HIMR_RXFOVW BIT(5) +#define REG_SDIO_HIMR_TXBCNOK BIT(6) +#define REG_SDIO_HIMR_TXBCNERR BIT(7) +#define REG_SDIO_HIMR_BCNERLY_INT BIT(16) +#define REG_SDIO_HIMR_C2HCMD BIT(17) +#define REG_SDIO_HIMR_CPWM1 BIT(18) +#define REG_SDIO_HIMR_CPWM2 BIT(19) +#define REG_SDIO_HIMR_HSISR_IND BIT(20) +#define REG_SDIO_HIMR_GTINT3_IND BIT(21) +#define REG_SDIO_HIMR_GTINT4_IND BIT(22) +#define REG_SDIO_HIMR_PSTIMEOUT BIT(23) +#define REG_SDIO_HIMR_OCPINT BIT(24) +#define REG_SDIO_HIMR_ATIMEND BIT(25) +#define REG_SDIO_HIMR_ATIMEND_E BIT(26) +#define REG_SDIO_HIMR_CTWEND BIT(27) +/* the following two are RTL8188 SDIO Specific */ +#define REG_SDIO_HIMR_MCU_ERR BIT(28) +#define REG_SDIO_HIMR_TSF_BIT32_TOGGLE BIT(29) + +/* SDIO Host Interrupt Service Routine */ +#define REG_SDIO_HISR (SDIO_LOCAL_OFFSET + 0x0018) +#define REG_SDIO_HISR_RX_REQUEST BIT(0) +#define REG_SDIO_HISR_AVAL BIT(1) +#define REG_SDIO_HISR_TXERR BIT(2) +#define REG_SDIO_HISR_RXERR BIT(3) +#define REG_SDIO_HISR_TXFOVW BIT(4) +#define REG_SDIO_HISR_RXFOVW BIT(5) +#define REG_SDIO_HISR_TXBCNOK BIT(6) +#define REG_SDIO_HISR_TXBCNERR BIT(7) +#define REG_SDIO_HISR_BCNERLY_INT BIT(16) +#define REG_SDIO_HISR_C2HCMD BIT(17) +#define REG_SDIO_HISR_CPWM1 BIT(18) +#define REG_SDIO_HISR_CPWM2 BIT(19) +#define REG_SDIO_HISR_HSISR_IND BIT(20) +#define REG_SDIO_HISR_GTINT3_IND BIT(21) +#define REG_SDIO_HISR_GTINT4_IND BIT(22) +#define REG_SDIO_HISR_PSTIMEOUT BIT(23) +#define REG_SDIO_HISR_OCPINT BIT(24) +#define REG_SDIO_HISR_ATIMEND BIT(25) +#define REG_SDIO_HISR_ATIMEND_E BIT(26) +#define REG_SDIO_HISR_CTWEND BIT(27) +/* the following two are RTL8188 SDIO Specific */ +#define REG_SDIO_HISR_MCU_ERR BIT(28) +#define REG_SDIO_HISR_TSF_BIT32_TOGGLE BIT(29) + +/* HCI Current Power Mode */ +#define REG_SDIO_HCPWM (SDIO_LOCAL_OFFSET + 0x0019) +/* RXDMA Request Length */ +#define REG_SDIO_RX0_REQ_LEN (SDIO_LOCAL_OFFSET + 0x001C) +/* OQT Free Page */ +#define REG_SDIO_OQT_FREE_PG (SDIO_LOCAL_OFFSET + 0x001E) +/* Free Tx Buffer Page */ +#define REG_SDIO_FREE_TXPG (SDIO_LOCAL_OFFSET + 0x0020) +/* HCI Current Power Mode 1 */ +#define REG_SDIO_HCPWM1 (SDIO_LOCAL_OFFSET + 0x0024) +/* HCI Current Power Mode 2 */ +#define REG_SDIO_HCPWM2 (SDIO_LOCAL_OFFSET + 0x0026) +/* Free Tx Page Sequence */ +#define REG_SDIO_FREE_TXPG_SEQ (SDIO_LOCAL_OFFSET + 0x0028) +/* HTSF Information */ +#define REG_SDIO_HTSFR_INFO (SDIO_LOCAL_OFFSET + 0x0030) +#define REG_SDIO_HCPWM1_V2 (SDIO_LOCAL_OFFSET + 0x0038) +/* H2C */ +#define REG_SDIO_H2C (SDIO_LOCAL_OFFSET + 0x0060) +/* HCI Request Power Mode 1 */ +#define REG_SDIO_HRPWM1 (SDIO_LOCAL_OFFSET + 0x0080) +/* HCI Request Power Mode 2 */ +#define REG_SDIO_HRPWM2 (SDIO_LOCAL_OFFSET + 0x0082) +/* HCI Power Save Clock */ +#define REG_SDIO_HPS_CLKR (SDIO_LOCAL_OFFSET + 0x0084) +/* SDIO HCI Suspend Control */ +#define REG_SDIO_HSUS_CTRL (SDIO_LOCAL_OFFSET + 0x0086) +#define BIT_HCI_SUS_REQ BIT(0) +#define BIT_HCI_RESUME_RDY BIT(1) +/* SDIO Host Extension Interrupt Mask Always */ +#define REG_SDIO_HIMR_ON (SDIO_LOCAL_OFFSET + 0x0090) +/* SDIO Host Extension Interrupt Status Always */ +#define REG_SDIO_HISR_ON (SDIO_LOCAL_OFFSET + 0x0091) + +#define REG_SDIO_INDIRECT_REG_CFG (SDIO_LOCAL_OFFSET + 0x0040) +#define BIT_SDIO_INDIRECT_REG_CFG_WORD BIT(16) +#define BIT_SDIO_INDIRECT_REG_CFG_DWORD BIT(17) +#define BIT_SDIO_INDIRECT_REG_CFG_WRITE BIT(18) +#define BIT_SDIO_INDIRECT_REG_CFG_READ BIT(19) +#define BIT_SDIO_INDIRECT_REG_CFG_UNK20 BIT(20) +#define REG_SDIO_INDIRECT_REG_DATA (SDIO_LOCAL_OFFSET + 0x0044) + +/* Sdio Address for SDIO Local Reg, TRX FIFO, MAC Reg */ +#define REG_SDIO_CMD_ADDR_MSK GENMASK(16, 13) +#define REG_SDIO_CMD_ADDR_SDIO_REG 0 +#define REG_SDIO_CMD_ADDR_MAC_REG 8 +#define REG_SDIO_CMD_ADDR_TXFF_HIGH 4 +#define REG_SDIO_CMD_ADDR_TXFF_LOW 6 +#define REG_SDIO_CMD_ADDR_TXFF_NORMAL 5 +#define REG_SDIO_CMD_ADDR_TXFF_EXTRA 7 +#define REG_SDIO_CMD_ADDR_RXFF 7 + +#define RTW_SDIO_BLOCK_SIZE 512 +#define RTW_SDIO_ADDR_RX_RX0FF_GEN(_id) (0x0e000 | ((_id) & 0x3)) + +#define RTW_SDIO_DATA_PTR_ALIGN 8 + +struct sdio_func; +struct sdio_device_id; + +struct rtw_sdio_tx_data { + u8 sn; +}; + +struct rtw_sdio_work_data { + struct work_struct work; + struct rtw_dev *rtwdev; +}; + +struct rtw_sdio { + struct sdio_func *sdio_func; + + u32 irq_mask; + u8 rx_addr; + bool sdio3_bus_mode; + + void *irq_thread; + + struct workqueue_struct *txwq; + struct rtw_sdio_work_data *tx_handler_data; + struct sk_buff_head tx_queue[RTK_MAX_TX_QUEUE_NUM]; +}; + +extern const struct dev_pm_ops rtw_sdio_pm_ops; + +int rtw_sdio_probe(struct sdio_func *sdio_func, + const struct sdio_device_id *id); +void rtw_sdio_remove(struct sdio_func *sdio_func); +void rtw_sdio_shutdown(struct device *dev); + +static inline bool rtw_sdio_is_sdio30_supported(struct rtw_dev *rtwdev) +{ + struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; + + return rtwsdio->sdio3_bus_mode; +} + +#endif diff --git a/drivers/net/wireless/realtek/rtw88/sdio_ids.h b/drivers/net/wireless/realtek/rtw88/sdio_ids.h new file mode 100644 index 0000000000..2d1a80776a --- /dev/null +++ b/drivers/net/wireless/realtek/rtw88/sdio_ids.h @@ -0,0 +1,10 @@ +#define SDIO_VENDOR_ID_REALTEK 0x024c +#define SDIO_DEVICE_ID_REALTEK_RTW8723BS 0xb723 +#define SDIO_DEVICE_ID_REALTEK_RTW8723DS_2ANT 0xd723 +#define SDIO_DEVICE_ID_REALTEK_RTW8723DS_1ANT 0xd724 +#define SDIO_DEVICE_ID_REALTEK_RTW8821BS 0xb821 +#define SDIO_DEVICE_ID_REALTEK_RTW8821CS 0xc821 +#define SDIO_DEVICE_ID_REALTEK_RTW8821DS 0xd821 +#define SDIO_DEVICE_ID_REALTEK_RTW8822BS 0xb822 +#define SDIO_DEVICE_ID_REALTEK_RTW8822CS 0xc822 + diff --git a/drivers/net/wireless/realtek/rtw88/tx.c b/drivers/net/wireless/realtek/rtw88/tx.c index ca8072177a..77a8114b06 100644 --- a/drivers/net/wireless/realtek/rtw88/tx.c +++ b/drivers/net/wireless/realtek/rtw88/tx.c @@ -34,41 +34,67 @@ void rtw_tx_stats(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, void rtw_tx_fill_tx_desc(struct rtw_tx_pkt_info *pkt_info, struct sk_buff *skb) { - __le32 *txdesc = (__le32 *)skb->data; - - SET_TX_DESC_TXPKTSIZE(txdesc, pkt_info->tx_pkt_size); - SET_TX_DESC_OFFSET(txdesc, pkt_info->offset); - SET_TX_DESC_PKT_OFFSET(txdesc, pkt_info->pkt_offset); - SET_TX_DESC_QSEL(txdesc, pkt_info->qsel); - SET_TX_DESC_BMC(txdesc, pkt_info->bmc); - SET_TX_DESC_RATE_ID(txdesc, pkt_info->rate_id); - SET_TX_DESC_DATARATE(txdesc, pkt_info->rate); - SET_TX_DESC_DISDATAFB(txdesc, pkt_info->dis_rate_fallback); - SET_TX_DESC_USE_RATE(txdesc, pkt_info->use_rate); - SET_TX_DESC_SEC_TYPE(txdesc, pkt_info->sec_type); - SET_TX_DESC_DATA_BW(txdesc, pkt_info->bw); - SET_TX_DESC_SW_SEQ(txdesc, pkt_info->seq); - SET_TX_DESC_MAX_AGG_NUM(txdesc, pkt_info->ampdu_factor); - SET_TX_DESC_AMPDU_DENSITY(txdesc, pkt_info->ampdu_density); - SET_TX_DESC_DATA_STBC(txdesc, pkt_info->stbc); - SET_TX_DESC_DATA_LDPC(txdesc, pkt_info->ldpc); - SET_TX_DESC_AGG_EN(txdesc, pkt_info->ampdu_en); - SET_TX_DESC_LS(txdesc, pkt_info->ls); - SET_TX_DESC_DATA_SHORT(txdesc, pkt_info->short_gi); - SET_TX_DESC_SPE_RPT(txdesc, pkt_info->report); - SET_TX_DESC_SW_DEFINE(txdesc, pkt_info->sn); - SET_TX_DESC_USE_RTS(txdesc, pkt_info->rts); - SET_TX_DESC_DISQSELSEQ(txdesc, pkt_info->dis_qselseq); - SET_TX_DESC_EN_HWSEQ(txdesc, pkt_info->en_hwseq); - SET_TX_DESC_HW_SSN_SEL(txdesc, pkt_info->hw_ssn_sel); - SET_TX_DESC_NAVUSEHDR(txdesc, pkt_info->nav_use_hdr); - SET_TX_DESC_BT_NULL(txdesc, pkt_info->bt_null); + struct rtw_tx_desc *tx_desc = (struct rtw_tx_desc *)skb->data; + bool more_data = false; + + if (pkt_info->qsel == TX_DESC_QSEL_HIGH) + more_data = true; + + tx_desc->w0 = le32_encode_bits(pkt_info->tx_pkt_size, RTW_TX_DESC_W0_TXPKTSIZE) | + le32_encode_bits(pkt_info->offset, RTW_TX_DESC_W0_OFFSET) | + le32_encode_bits(pkt_info->bmc, RTW_TX_DESC_W0_BMC) | + le32_encode_bits(pkt_info->ls, RTW_TX_DESC_W0_LS) | + le32_encode_bits(pkt_info->dis_qselseq, RTW_TX_DESC_W0_DISQSELSEQ); + + tx_desc->w1 = le32_encode_bits(pkt_info->qsel, RTW_TX_DESC_W1_QSEL) | + le32_encode_bits(pkt_info->rate_id, RTW_TX_DESC_W1_RATE_ID) | + le32_encode_bits(pkt_info->sec_type, RTW_TX_DESC_W1_SEC_TYPE) | + le32_encode_bits(pkt_info->pkt_offset, RTW_TX_DESC_W1_PKT_OFFSET) | + le32_encode_bits(more_data, RTW_TX_DESC_W1_MORE_DATA); + + tx_desc->w2 = le32_encode_bits(pkt_info->ampdu_en, RTW_TX_DESC_W2_AGG_EN) | + le32_encode_bits(pkt_info->report, RTW_TX_DESC_W2_SPE_RPT) | + le32_encode_bits(pkt_info->ampdu_density, RTW_TX_DESC_W2_AMPDU_DEN) | + le32_encode_bits(pkt_info->bt_null, RTW_TX_DESC_W2_BT_NULL); + + tx_desc->w3 = le32_encode_bits(pkt_info->hw_ssn_sel, RTW_TX_DESC_W3_HW_SSN_SEL) | + le32_encode_bits(pkt_info->use_rate, RTW_TX_DESC_W3_USE_RATE) | + le32_encode_bits(pkt_info->dis_rate_fallback, RTW_TX_DESC_W3_DISDATAFB) | + le32_encode_bits(pkt_info->rts, RTW_TX_DESC_W3_USE_RTS) | + le32_encode_bits(pkt_info->nav_use_hdr, RTW_TX_DESC_W3_NAVUSEHDR) | + le32_encode_bits(pkt_info->ampdu_factor, RTW_TX_DESC_W3_MAX_AGG_NUM); + + tx_desc->w4 = le32_encode_bits(pkt_info->rate, RTW_TX_DESC_W4_DATARATE); + + tx_desc->w5 = le32_encode_bits(pkt_info->short_gi, RTW_TX_DESC_W5_DATA_SHORT) | + le32_encode_bits(pkt_info->bw, RTW_TX_DESC_W5_DATA_BW) | + le32_encode_bits(pkt_info->ldpc, RTW_TX_DESC_W5_DATA_LDPC) | + le32_encode_bits(pkt_info->stbc, RTW_TX_DESC_W5_DATA_STBC); + + tx_desc->w6 = le32_encode_bits(pkt_info->sn, RTW_TX_DESC_W6_SW_DEFINE); + + tx_desc->w8 = le32_encode_bits(pkt_info->en_hwseq, RTW_TX_DESC_W8_EN_HWSEQ); + + tx_desc->w9 = le32_encode_bits(pkt_info->seq, RTW_TX_DESC_W9_SW_SEQ); + + if (pkt_info->rts) { + tx_desc->w4 |= le32_encode_bits(DESC_RATE24M, RTW_TX_DESC_W4_RTSRATE); + tx_desc->w5 |= le32_encode_bits(1, RTW_TX_DESC_W5_DATA_RTS_SHORT); + } + + if (pkt_info->tim_offset) + tx_desc->w9 |= le32_encode_bits(1, RTW_TX_DESC_W9_TIM_EN) | + le32_encode_bits(pkt_info->tim_offset, RTW_TX_DESC_W9_TIM_OFFSET); } EXPORT_SYMBOL(rtw_tx_fill_tx_desc); static u8 get_tx_ampdu_factor(struct ieee80211_sta *sta) { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + u8 exp = sta->deflink.ht_cap.ampdu_factor; +#else u8 exp = sta->ht_cap.ampdu_factor; +#endif /* the least ampdu factor is 8K, and the value in the tx desc is the * max aggregation num, which represents val * 2 packets can be @@ -79,7 +105,11 @@ static u8 get_tx_ampdu_factor(struct ieee80211_sta *sta) static u8 get_tx_ampdu_density(struct ieee80211_sta *sta) { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + return sta->deflink.ht_cap.ampdu_density; +#else return sta->ht_cap.ampdu_density; +#endif } static u8 get_highest_ht_tx_rate(struct rtw_dev *rtwdev, @@ -87,7 +117,11 @@ static u8 get_highest_ht_tx_rate(struct rtw_dev *rtwdev, { u8 rate; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + if (rtwdev->hal.rf_type == RF_2T2R && sta->deflink.ht_cap.mcs.rx_mask[1] != 0) +#else if (rtwdev->hal.rf_type == RF_2T2R && sta->ht_cap.mcs.rx_mask[1] != 0) +#endif rate = DESC_RATEMCS15; else rate = DESC_RATEMCS7; @@ -102,7 +136,11 @@ static u8 get_highest_vht_tx_rate(struct rtw_dev *rtwdev, u8 rate; u16 tx_mcs_map; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + tx_mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.tx_mcs_map); +#else tx_mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.tx_mcs_map); +#endif if (efuse->hw_cap.nss == 1) { switch (tx_mcs_map & 0x3) { case IEEE80211_VHT_MCS_SUPPORT_0_7: @@ -149,16 +187,24 @@ static void rtw_tx_report_enable(struct rtw_dev *rtwdev, pkt_info->report = true; } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0) void rtw_tx_report_purge_timer(struct timer_list *t) +#else +void rtw_tx_report_purge_timer(void *cntx) +#endif { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0) struct rtw_dev *rtwdev = from_timer(rtwdev, t, tx_report.purge_timer); +#else + struct rtw_dev *rtwdev = (struct rtw_dev *)cntx; +#endif struct rtw_tx_report *tx_report = &rtwdev->tx_report; unsigned long flags; if (skb_queue_len(&tx_report->queue) == 0) return; - WARN(1, "purge skb(s) not reported by firmware\n"); + rtw_warn(rtwdev, "failed to get tx report from firmware\n"); spin_lock_irqsave(&tx_report->q_lock, flags); skb_queue_purge(&tx_report->queue); @@ -229,17 +275,34 @@ void rtw_tx_report_handle(struct rtw_dev *rtwdev, struct sk_buff *skb, int src) spin_unlock_irqrestore(&tx_report->q_lock, flags); } +static u8 rtw_get_mgmt_rate(struct rtw_dev *rtwdev, struct sk_buff *skb, + u8 lowest_rate, bool ignore_rate) +{ + struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); + struct ieee80211_vif *vif = tx_info->control.vif; + bool force_lowest = test_bit(RTW_FLAG_FORCE_LOWEST_RATE, rtwdev->flags); + + if (!vif || !vif->bss_conf.basic_rates || ignore_rate || force_lowest) + return lowest_rate; + + return __ffs(vif->bss_conf.basic_rates) + lowest_rate; +} + static void rtw_tx_pkt_info_update_rate(struct rtw_dev *rtwdev, struct rtw_tx_pkt_info *pkt_info, - struct sk_buff *skb) + struct sk_buff *skb, + bool ignore_rate) { if (rtwdev->hal.current_band_type == RTW_BAND_2G) { pkt_info->rate_id = RTW_RATEID_B_20M; - pkt_info->rate = DESC_RATE1M; + pkt_info->rate = rtw_get_mgmt_rate(rtwdev, skb, DESC_RATE1M, + ignore_rate); } else { pkt_info->rate_id = RTW_RATEID_G; - pkt_info->rate = DESC_RATE6M; + pkt_info->rate = rtw_get_mgmt_rate(rtwdev, skb, DESC_RATE6M, + ignore_rate); } + pkt_info->use_rate = true; pkt_info->dis_rate_fallback = true; } @@ -276,7 +339,7 @@ static void rtw_tx_mgmt_pkt_info_update(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, struct sk_buff *skb) { - rtw_tx_pkt_info_update_rate(rtwdev, pkt_info, skb); + rtw_tx_pkt_info_update_rate(rtwdev, pkt_info, skb, false); pkt_info->dis_qselseq = true; pkt_info->en_hwseq = true; pkt_info->hw_ssn_sel = 0; @@ -290,7 +353,10 @@ static void rtw_tx_data_pkt_info_update(struct rtw_dev *rtwdev, { struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); + struct ieee80211_hw *hw = rtwdev->hw; + struct rtw_dm_info *dm_info = &rtwdev->dm_info; struct rtw_sta_info *si; + u8 fix_rate; u16 seq; u8 ampdu_factor = 0; u8 ampdu_density = 0; @@ -313,9 +379,19 @@ static void rtw_tx_data_pkt_info_update(struct rtw_dev *rtwdev, ampdu_density = get_tx_ampdu_density(sta); } - if (info->control.use_rts) + if (info->control.use_rts || skb->len > hw->wiphy->rts_threshold) pkt_info->rts = true; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) + if (sta->deflink.vht_cap.vht_supported) + rate = get_highest_vht_tx_rate(rtwdev, sta); + else if (sta->deflink.ht_cap.ht_supported) + rate = get_highest_ht_tx_rate(rtwdev, sta); + else if (sta->deflink.supp_rates[0] <= 0xf) + rate = DESC_RATE11M; + else + rate = DESC_RATE54M; +#else if (sta->vht_cap.vht_supported) rate = get_highest_vht_tx_rate(rtwdev, sta); else if (sta->ht_cap.ht_supported) @@ -324,12 +400,13 @@ static void rtw_tx_data_pkt_info_update(struct rtw_dev *rtwdev, rate = DESC_RATE11M; else rate = DESC_RATE54M; +#endif si = (struct rtw_sta_info *)sta->drv_priv; bw = si->bw_mode; rate_id = si->rate_id; - stbc = si->stbc_en; + stbc = rtwdev->hal.txrx_1ss ? false : si->stbc_en; ldpc = si->ldpc_en; out: @@ -342,6 +419,13 @@ static void rtw_tx_data_pkt_info_update(struct rtw_dev *rtwdev, pkt_info->bw = bw; pkt_info->stbc = stbc; pkt_info->ldpc = ldpc; + + fix_rate = dm_info->fix_rate; + if (fix_rate < DESC_RATE_MAX) { + pkt_info->rate = fix_rate; + pkt_info->dis_rate_fallback = true; + pkt_info->use_rate = true; + } } void rtw_tx_pkt_info_update(struct rtw_dev *rtwdev, @@ -349,7 +433,7 @@ void rtw_tx_pkt_info_update(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, struct sk_buff *skb) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; struct rtw_sta_info *si; @@ -389,7 +473,7 @@ void rtw_tx_rsvd_page_pkt_info_update(struct rtw_dev *rtwdev, struct sk_buff *skb, enum rtw_rsvd_packet_type type) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; bool bmc; @@ -399,7 +483,7 @@ void rtw_tx_rsvd_page_pkt_info_update(struct rtw_dev *rtwdev, if (type != RSVD_BEACON && type != RSVD_DUMMY) pkt_info->qsel = TX_DESC_QSEL_MGMT; - rtw_tx_pkt_info_update_rate(rtwdev, pkt_info, skb); + rtw_tx_pkt_info_update_rate(rtwdev, pkt_info, skb, true); bmc = is_broadcast_ether_addr(hdr->addr1) || is_multicast_ether_addr(hdr->addr1); @@ -417,6 +501,19 @@ void rtw_tx_rsvd_page_pkt_info_update(struct rtw_dev *rtwdev, if (type == RSVD_QOS_NULL) pkt_info->bt_null = true; + if (type == RSVD_BEACON) { + struct rtw_rsvd_page *rsvd_pkt; + int hdr_len; + + rsvd_pkt = list_first_entry_or_null(&rtwdev->rsvd_page_list, + struct rtw_rsvd_page, + build_list); + if (rsvd_pkt && rsvd_pkt->tim_offset != 0) { + hdr_len = sizeof(struct ieee80211_hdr_3addr); + pkt_info->tim_offset = rsvd_pkt->tim_offset - hdr_len; + } + } + rtw_tx_pkt_info_update_sec(rtwdev, pkt_info, skb); /* TODO: need to change hw port and hw ssn sel for multiple vifs */ @@ -427,7 +524,7 @@ rtw_tx_write_data_rsvd_page_get(struct rtw_dev *rtwdev, struct rtw_tx_pkt_info *pkt_info, u8 *buf, u32 size) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct sk_buff *skb; u32 tx_pkt_desc_sz; u32 length; @@ -453,7 +550,7 @@ rtw_tx_write_data_h2c_get(struct rtw_dev *rtwdev, struct rtw_tx_pkt_info *pkt_info, u8 *buf, u32 size) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; struct sk_buff *skb; u32 tx_pkt_desc_sz; u32 length; @@ -544,8 +641,6 @@ static int rtw_txq_push_skb(struct rtw_dev *rtwdev, rtw_err(rtwdev, "failed to write TX skb to HCI\n"); return ret; } - rtwtxq->last_push = jiffies; - return 0; } @@ -587,9 +682,8 @@ static void rtw_txq_push(struct rtw_dev *rtwdev, rcu_read_unlock(); } -void rtw_tx_tasklet(struct tasklet_struct *t) +void __rtw_tx_work(struct rtw_dev *rtwdev) { - struct rtw_dev *rtwdev = from_tasklet(rtwdev, t, tx_tasklet); struct rtw_txq *rtwtxq, *tmp; spin_lock_bh(&rtwdev->txq_lock); @@ -610,6 +704,13 @@ void rtw_tx_tasklet(struct tasklet_struct *t) spin_unlock_bh(&rtwdev->txq_lock); } +void rtw_tx_work(struct work_struct *w) +{ + struct rtw_dev *rtwdev = container_of(w, struct rtw_dev, tx_work); + + __rtw_tx_work(rtwdev); +} + void rtw_txq_init(struct rtw_dev *rtwdev, struct ieee80211_txq *txq) { struct rtw_txq *rtwtxq; @@ -634,3 +735,44 @@ void rtw_txq_cleanup(struct rtw_dev *rtwdev, struct ieee80211_txq *txq) list_del_init(&rtwtxq->list); spin_unlock_bh(&rtwdev->txq_lock); } + +static const enum rtw_tx_queue_type ac_to_hwq[] = { + [IEEE80211_AC_VO] = RTW_TX_QUEUE_VO, + [IEEE80211_AC_VI] = RTW_TX_QUEUE_VI, + [IEEE80211_AC_BE] = RTW_TX_QUEUE_BE, + [IEEE80211_AC_BK] = RTW_TX_QUEUE_BK, +}; + +static_assert(ARRAY_SIZE(ac_to_hwq) == IEEE80211_NUM_ACS); + +enum rtw_tx_queue_type rtw_tx_ac_to_hwq(enum ieee80211_ac_numbers ac) +{ + if (WARN_ON(unlikely(ac >= IEEE80211_NUM_ACS))) + return RTW_TX_QUEUE_BE; + + return ac_to_hwq[ac]; +} +EXPORT_SYMBOL(rtw_tx_ac_to_hwq); + +enum rtw_tx_queue_type rtw_tx_queue_mapping(struct sk_buff *skb) +{ + struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; + __le16 fc = hdr->frame_control; + u8 q_mapping = skb_get_queue_mapping(skb); + enum rtw_tx_queue_type queue; + + if (unlikely(ieee80211_is_beacon(fc))) + queue = RTW_TX_QUEUE_BCN; + else if (unlikely(ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))) + queue = RTW_TX_QUEUE_MGMT; + else if (is_broadcast_ether_addr(hdr->addr1) || + is_multicast_ether_addr(hdr->addr1)) + queue = RTW_TX_QUEUE_HI0; + else if (WARN_ON_ONCE(q_mapping >= ARRAY_SIZE(ac_to_hwq))) + queue = ac_to_hwq[IEEE80211_AC_BE]; + else + queue = ac_to_hwq[q_mapping]; + + return queue; +} +EXPORT_SYMBOL(rtw_tx_queue_mapping); diff --git a/drivers/net/wireless/realtek/rtw88/tx.h b/drivers/net/wireless/realtek/rtw88/tx.h index 6673dbcaa2..3241896062 100644 --- a/drivers/net/wireless/realtek/rtw88/tx.h +++ b/drivers/net/wireless/realtek/rtw88/tx.h @@ -9,60 +9,53 @@ #define RTW_TX_PROBE_TIMEOUT msecs_to_jiffies(500) -#define SET_TX_DESC_TXPKTSIZE(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, GENMASK(15, 0)) -#define SET_TX_DESC_OFFSET(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, GENMASK(23, 16)) -#define SET_TX_DESC_PKT_OFFSET(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(28, 24)) -#define SET_TX_DESC_QSEL(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(12, 8)) -#define SET_TX_DESC_BMC(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, BIT(24)) -#define SET_TX_DESC_RATE_ID(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(20, 16)) -#define SET_TX_DESC_DATARATE(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x04, value, GENMASK(6, 0)) -#define SET_TX_DESC_DISDATAFB(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(10)) -#define SET_TX_DESC_USE_RATE(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(8)) -#define SET_TX_DESC_SEC_TYPE(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(23, 22)) -#define SET_TX_DESC_DATA_BW(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, GENMASK(6, 5)) -#define SET_TX_DESC_SW_SEQ(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x09, value, GENMASK(23, 12)) -#define SET_TX_DESC_MAX_AGG_NUM(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, GENMASK(21, 17)) -#define SET_TX_DESC_USE_RTS(tx_desc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(12)) -#define SET_TX_DESC_AMPDU_DENSITY(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, GENMASK(22, 20)) -#define SET_TX_DESC_DATA_STBC(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, GENMASK(9, 8)) -#define SET_TX_DESC_DATA_LDPC(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, BIT(7)) -#define SET_TX_DESC_AGG_EN(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, BIT(12)) -#define SET_TX_DESC_LS(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, BIT(26)) -#define SET_TX_DESC_DATA_SHORT(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, BIT(4)) -#define SET_TX_DESC_SPE_RPT(tx_desc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, BIT(19)) -#define SET_TX_DESC_SW_DEFINE(tx_desc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x06, value, GENMASK(11, 0)) -#define SET_TX_DESC_DISQSELSEQ(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, BIT(31)) -#define SET_TX_DESC_EN_HWSEQ(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x08, value, BIT(15)) -#define SET_TX_DESC_HW_SSN_SEL(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, GENMASK(7, 6)) -#define SET_TX_DESC_NAVUSEHDR(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(15)) -#define SET_TX_DESC_BT_NULL(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, BIT(23)) +struct rtw_tx_desc { + __le32 w0; + __le32 w1; + __le32 w2; + __le32 w3; + __le32 w4; + __le32 w5; + __le32 w6; + __le32 w7; + __le32 w8; + __le32 w9; +} __packed; + +#define RTW_TX_DESC_W0_TXPKTSIZE GENMASK(15, 0) +#define RTW_TX_DESC_W0_OFFSET GENMASK(23, 16) +#define RTW_TX_DESC_W0_BMC BIT(24) +#define RTW_TX_DESC_W0_LS BIT(26) +#define RTW_TX_DESC_W0_DISQSELSEQ BIT(31) +#define RTW_TX_DESC_W1_QSEL GENMASK(12, 8) +#define RTW_TX_DESC_W1_RATE_ID GENMASK(20, 16) +#define RTW_TX_DESC_W1_SEC_TYPE GENMASK(23, 22) +#define RTW_TX_DESC_W1_PKT_OFFSET GENMASK(28, 24) +#define RTW_TX_DESC_W1_MORE_DATA BIT(29) +#define RTW_TX_DESC_W2_AGG_EN BIT(12) +#define RTW_TX_DESC_W2_SPE_RPT BIT(19) +#define RTW_TX_DESC_W2_AMPDU_DEN GENMASK(22, 20) +#define RTW_TX_DESC_W2_BT_NULL BIT(23) +#define RTW_TX_DESC_W3_HW_SSN_SEL GENMASK(7, 6) +#define RTW_TX_DESC_W3_USE_RATE BIT(8) +#define RTW_TX_DESC_W3_DISDATAFB BIT(10) +#define RTW_TX_DESC_W3_USE_RTS BIT(12) +#define RTW_TX_DESC_W3_NAVUSEHDR BIT(15) +#define RTW_TX_DESC_W3_MAX_AGG_NUM GENMASK(21, 17) +#define RTW_TX_DESC_W4_DATARATE GENMASK(6, 0) +#define RTW_TX_DESC_W4_RTSRATE GENMASK(28, 24) +#define RTW_TX_DESC_W5_DATA_SHORT BIT(4) +#define RTW_TX_DESC_W5_DATA_BW GENMASK(6, 5) +#define RTW_TX_DESC_W5_DATA_LDPC BIT(7) +#define RTW_TX_DESC_W5_DATA_STBC GENMASK(9, 8) +#define RTW_TX_DESC_W5_DATA_RTS_SHORT BIT(12) +#define RTW_TX_DESC_W6_SW_DEFINE GENMASK(11, 0) +#define RTW_TX_DESC_W7_TXDESC_CHECKSUM GENMASK(15, 0) +#define RTW_TX_DESC_W7_DMA_TXAGG_NUM GENMASK(31, 24) +#define RTW_TX_DESC_W8_EN_HWSEQ BIT(15) +#define RTW_TX_DESC_W9_SW_SEQ GENMASK(23, 12) +#define RTW_TX_DESC_W9_TIM_EN BIT(7) +#define RTW_TX_DESC_W9_TIM_OFFSET GENMASK(6, 0) enum rtw_tx_desc_queue_select { TX_DESC_QSEL_TID0 = 0, @@ -94,7 +87,8 @@ void rtw_tx(struct rtw_dev *rtwdev, struct sk_buff *skb); void rtw_txq_init(struct rtw_dev *rtwdev, struct ieee80211_txq *txq); void rtw_txq_cleanup(struct rtw_dev *rtwdev, struct ieee80211_txq *txq); -void rtw_tx_tasklet(struct tasklet_struct *t); +void rtw_tx_work(struct work_struct *w); +void __rtw_tx_work(struct rtw_dev *rtwdev); void rtw_tx_pkt_info_update(struct rtw_dev *rtwdev, struct rtw_tx_pkt_info *pkt_info, struct ieee80211_sta *sta, @@ -115,4 +109,32 @@ rtw_tx_write_data_h2c_get(struct rtw_dev *rtwdev, struct rtw_tx_pkt_info *pkt_info, u8 *buf, u32 size); +enum rtw_tx_queue_type rtw_tx_ac_to_hwq(enum ieee80211_ac_numbers ac); +enum rtw_tx_queue_type rtw_tx_queue_mapping(struct sk_buff *skb); + +static inline +void fill_txdesc_checksum_common(u8 *txdesc, size_t words) +{ + __le16 chksum = 0; + __le16 *data = (__le16 *)(txdesc); + struct rtw_tx_desc *tx_desc = (struct rtw_tx_desc *)txdesc; + + le32p_replace_bits(&tx_desc->w7, 0, RTW_TX_DESC_W7_TXDESC_CHECKSUM); + + while (words--) + chksum ^= *data++; + + le32p_replace_bits(&tx_desc->w7, __le16_to_cpu(chksum), + RTW_TX_DESC_W7_TXDESC_CHECKSUM); +} + +static inline void rtw_tx_fill_txdesc_checksum(struct rtw_dev *rtwdev, + struct rtw_tx_pkt_info *pkt_info, + u8 *txdesc) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + + chip->ops->fill_txdesc_checksum(rtwdev, pkt_info, txdesc); +} + #endif diff --git a/drivers/net/wireless/realtek/rtw88/usb.c b/drivers/net/wireless/realtek/rtw88/usb.c new file mode 100644 index 0000000000..f9add1ec33 --- /dev/null +++ b/drivers/net/wireless/realtek/rtw88/usb.c @@ -0,0 +1,916 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* Copyright(c) 2018-2019 Realtek Corporation + */ + +#include +#include +#include +#include "main.h" +#include "debug.h" +#include "reg.h" +#include "tx.h" +#include "rx.h" +#include "fw.h" +#include "ps.h" +#include "usb.h" + +#define RTW_USB_MAX_RXQ_LEN 512 + +struct rtw_usb_txcb { + struct rtw_dev *rtwdev; + struct sk_buff_head tx_ack_queue; +}; + +static void rtw_usb_fill_tx_checksum(struct rtw_usb *rtwusb, + struct sk_buff *skb, int agg_num) +{ + struct rtw_tx_desc *tx_desc = (struct rtw_tx_desc *)skb->data; + struct rtw_dev *rtwdev = rtwusb->rtwdev; + struct rtw_tx_pkt_info pkt_info; + + le32p_replace_bits(&tx_desc->w7, agg_num, RTW_TX_DESC_W7_DMA_TXAGG_NUM); + pkt_info.pkt_offset = le32_get_bits(tx_desc->w1, RTW_TX_DESC_W1_PKT_OFFSET); + rtw_tx_fill_txdesc_checksum(rtwdev, &pkt_info, skb->data); +} + +static u32 rtw_usb_read(struct rtw_dev *rtwdev, u32 addr, u16 len) +{ + struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); + struct usb_device *udev = rtwusb->udev; + __le32 *data; + unsigned long flags; + int idx, ret; + static int count; + + spin_lock_irqsave(&rtwusb->usb_lock, flags); + + idx = rtwusb->usb_data_index; + rtwusb->usb_data_index = (idx + 1) & (RTW_USB_MAX_RXTX_COUNT - 1); + + spin_unlock_irqrestore(&rtwusb->usb_lock, flags); + + data = &rtwusb->usb_data[idx]; + + ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0), + RTW_USB_CMD_REQ, RTW_USB_CMD_READ, addr, + RTW_USB_VENQT_CMD_IDX, data, len, 1000); + if (ret < 0 && ret != -ENODEV && count++ < 4) + rtw_err(rtwdev, "read register 0x%x failed with %d\n", + addr, ret); + + return le32_to_cpu(*data); +} + +static u8 rtw_usb_read8(struct rtw_dev *rtwdev, u32 addr) +{ + return (u8)rtw_usb_read(rtwdev, addr, 1); +} + +static u16 rtw_usb_read16(struct rtw_dev *rtwdev, u32 addr) +{ + return (u16)rtw_usb_read(rtwdev, addr, 2); +} + +static u32 rtw_usb_read32(struct rtw_dev *rtwdev, u32 addr) +{ + return (u32)rtw_usb_read(rtwdev, addr, 4); +} + +static void rtw_usb_write(struct rtw_dev *rtwdev, u32 addr, u32 val, int len) +{ + struct rtw_usb *rtwusb = (struct rtw_usb *)rtwdev->priv; + struct usb_device *udev = rtwusb->udev; + unsigned long flags; + __le32 *data; + int idx, ret; + static int count; + + spin_lock_irqsave(&rtwusb->usb_lock, flags); + + idx = rtwusb->usb_data_index; + rtwusb->usb_data_index = (idx + 1) & (RTW_USB_MAX_RXTX_COUNT - 1); + + spin_unlock_irqrestore(&rtwusb->usb_lock, flags); + + data = &rtwusb->usb_data[idx]; + + *data = cpu_to_le32(val); + + ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), + RTW_USB_CMD_REQ, RTW_USB_CMD_WRITE, + addr, 0, data, len, 30000); + if (ret < 0 && ret != -ENODEV && count++ < 4) + rtw_err(rtwdev, "write register 0x%x failed with %d\n", + addr, ret); +} + +static void rtw_usb_write8(struct rtw_dev *rtwdev, u32 addr, u8 val) +{ + rtw_usb_write(rtwdev, addr, val, 1); +} + +static void rtw_usb_write16(struct rtw_dev *rtwdev, u32 addr, u16 val) +{ + rtw_usb_write(rtwdev, addr, val, 2); +} + +static void rtw_usb_write32(struct rtw_dev *rtwdev, u32 addr, u32 val) +{ + rtw_usb_write(rtwdev, addr, val, 4); +} + +static int dma_mapping_to_ep(enum rtw_dma_mapping dma_mapping) +{ + switch (dma_mapping) { + case RTW_DMA_MAPPING_HIGH: + return 0; + case RTW_DMA_MAPPING_NORMAL: + return 1; + case RTW_DMA_MAPPING_LOW: + return 2; + case RTW_DMA_MAPPING_EXTRA: + return 3; + default: + return -EINVAL; + } +} + +static int rtw_usb_parse(struct rtw_dev *rtwdev, + struct usb_interface *interface) +{ + struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); + struct usb_host_interface *host_interface = &interface->altsetting[0]; + struct usb_interface_descriptor *interface_desc = &host_interface->desc; + struct usb_endpoint_descriptor *endpoint; + int num_out_pipes = 0; + int i; + u8 num; + const struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_rqpn *rqpn; + + for (i = 0; i < interface_desc->bNumEndpoints; i++) { + endpoint = &host_interface->endpoint[i].desc; + num = usb_endpoint_num(endpoint); + + if (usb_endpoint_dir_in(endpoint) && + usb_endpoint_xfer_bulk(endpoint)) { + if (rtwusb->pipe_in) { + rtw_err(rtwdev, "IN pipes overflow\n"); + return -EINVAL; + } + + rtwusb->pipe_in = num; + } + + if (usb_endpoint_dir_in(endpoint) && + usb_endpoint_xfer_int(endpoint)) { + if (rtwusb->pipe_interrupt) { + rtw_err(rtwdev, "INT pipes overflow\n"); + return -EINVAL; + } + + rtwusb->pipe_interrupt = num; + } + + if (usb_endpoint_dir_out(endpoint) && + usb_endpoint_xfer_bulk(endpoint)) { + if (num_out_pipes >= ARRAY_SIZE(rtwusb->out_ep)) { + rtw_err(rtwdev, "OUT pipes overflow\n"); + return -EINVAL; + } + + rtwusb->out_ep[num_out_pipes++] = num; + } + } + + rtwdev->hci.bulkout_num = num_out_pipes; + + if (num_out_pipes < 1 || num_out_pipes > 4) { + rtw_err(rtwdev, "invalid number of endpoints %d\n", num_out_pipes); + return -EINVAL; + } + + rqpn = &chip->rqpn_table[num_out_pipes]; + + rtwusb->qsel_to_ep[TX_DESC_QSEL_TID0] = dma_mapping_to_ep(rqpn->dma_map_be); + rtwusb->qsel_to_ep[TX_DESC_QSEL_TID1] = dma_mapping_to_ep(rqpn->dma_map_bk); + rtwusb->qsel_to_ep[TX_DESC_QSEL_TID2] = dma_mapping_to_ep(rqpn->dma_map_bk); + rtwusb->qsel_to_ep[TX_DESC_QSEL_TID3] = dma_mapping_to_ep(rqpn->dma_map_be); + rtwusb->qsel_to_ep[TX_DESC_QSEL_TID4] = dma_mapping_to_ep(rqpn->dma_map_vi); + rtwusb->qsel_to_ep[TX_DESC_QSEL_TID5] = dma_mapping_to_ep(rqpn->dma_map_vi); + rtwusb->qsel_to_ep[TX_DESC_QSEL_TID6] = dma_mapping_to_ep(rqpn->dma_map_vo); + rtwusb->qsel_to_ep[TX_DESC_QSEL_TID7] = dma_mapping_to_ep(rqpn->dma_map_vo); + rtwusb->qsel_to_ep[TX_DESC_QSEL_TID8] = -EINVAL; + rtwusb->qsel_to_ep[TX_DESC_QSEL_TID9] = -EINVAL; + rtwusb->qsel_to_ep[TX_DESC_QSEL_TID10] = -EINVAL; + rtwusb->qsel_to_ep[TX_DESC_QSEL_TID11] = -EINVAL; + rtwusb->qsel_to_ep[TX_DESC_QSEL_TID12] = -EINVAL; + rtwusb->qsel_to_ep[TX_DESC_QSEL_TID13] = -EINVAL; + rtwusb->qsel_to_ep[TX_DESC_QSEL_TID14] = -EINVAL; + rtwusb->qsel_to_ep[TX_DESC_QSEL_TID15] = -EINVAL; + rtwusb->qsel_to_ep[TX_DESC_QSEL_BEACON] = dma_mapping_to_ep(rqpn->dma_map_hi); + rtwusb->qsel_to_ep[TX_DESC_QSEL_HIGH] = dma_mapping_to_ep(rqpn->dma_map_hi); + rtwusb->qsel_to_ep[TX_DESC_QSEL_MGMT] = dma_mapping_to_ep(rqpn->dma_map_mg); + rtwusb->qsel_to_ep[TX_DESC_QSEL_H2C] = dma_mapping_to_ep(rqpn->dma_map_hi); + + return 0; +} + +static void rtw_usb_write_port_tx_complete(struct urb *urb) +{ + struct rtw_usb_txcb *txcb = urb->context; + struct rtw_dev *rtwdev = txcb->rtwdev; + struct ieee80211_hw *hw = rtwdev->hw; + + while (true) { + struct sk_buff *skb = skb_dequeue(&txcb->tx_ack_queue); + struct ieee80211_tx_info *info; + struct rtw_usb_tx_data *tx_data; + + if (!skb) + break; + + info = IEEE80211_SKB_CB(skb); + tx_data = rtw_usb_get_tx_data(skb); + + /* enqueue to wait for tx report */ + if (info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS) { + rtw_tx_report_enqueue(rtwdev, skb, tx_data->sn); + continue; + } + + /* always ACK for others, then they won't be marked as drop */ + ieee80211_tx_info_clear_status(info); + if (info->flags & IEEE80211_TX_CTL_NO_ACK) + info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; + else + info->flags |= IEEE80211_TX_STAT_ACK; + + ieee80211_tx_status_irqsafe(hw, skb); + } + + kfree(txcb); +} + +static int qsel_to_ep(struct rtw_usb *rtwusb, unsigned int qsel) +{ + if (qsel >= ARRAY_SIZE(rtwusb->qsel_to_ep)) + return -EINVAL; + + return rtwusb->qsel_to_ep[qsel]; +} + +static int rtw_usb_write_port(struct rtw_dev *rtwdev, u8 qsel, struct sk_buff *skb, + usb_complete_t cb, void *context) +{ + struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); + struct usb_device *usbd = rtwusb->udev; + struct urb *urb; + unsigned int pipe; + int ret; + int ep = qsel_to_ep(rtwusb, qsel); + + if (ep < 0) + return ep; + + pipe = usb_sndbulkpipe(usbd, rtwusb->out_ep[ep]); + urb = usb_alloc_urb(0, GFP_ATOMIC); + if (!urb) + return -ENOMEM; + + usb_fill_bulk_urb(urb, usbd, pipe, skb->data, skb->len, cb, context); + urb->transfer_flags |= URB_ZERO_PACKET; + ret = usb_submit_urb(urb, GFP_ATOMIC); + + usb_free_urb(urb); + + return ret; +} + +static bool rtw_usb_tx_agg_skb(struct rtw_usb *rtwusb, struct sk_buff_head *list) +{ + struct rtw_dev *rtwdev = rtwusb->rtwdev; + struct rtw_tx_desc *tx_desc; + struct rtw_usb_txcb *txcb; + struct sk_buff *skb_head; + struct sk_buff *skb_iter; + int agg_num = 0; + unsigned int align_next = 0; + u8 qsel; + + if (skb_queue_empty(list)) + return false; + + txcb = kmalloc(sizeof(*txcb), GFP_ATOMIC); + if (!txcb) + return false; + + txcb->rtwdev = rtwdev; + skb_queue_head_init(&txcb->tx_ack_queue); + + skb_iter = skb_dequeue(list); + + if (skb_queue_empty(list)) { + skb_head = skb_iter; + goto queue; + } + + skb_head = dev_alloc_skb(RTW_USB_MAX_XMITBUF_SZ); + if (!skb_head) { + skb_head = skb_iter; + goto queue; + } + + while (skb_iter) { + unsigned long flags; + + skb_put(skb_head, align_next); + skb_put_data(skb_head, skb_iter->data, skb_iter->len); + + align_next = ALIGN(skb_iter->len, 8) - skb_iter->len; + + agg_num++; + + skb_queue_tail(&txcb->tx_ack_queue, skb_iter); + + spin_lock_irqsave(&list->lock, flags); + + skb_iter = skb_peek(list); + + if (skb_iter && skb_iter->len + skb_head->len <= RTW_USB_MAX_XMITBUF_SZ) + __skb_unlink(skb_iter, list); + else + skb_iter = NULL; + spin_unlock_irqrestore(&list->lock, flags); + } + + if (agg_num > 1) + rtw_usb_fill_tx_checksum(rtwusb, skb_head, agg_num); + +queue: + skb_queue_tail(&txcb->tx_ack_queue, skb_head); + tx_desc = (struct rtw_tx_desc *)skb_head->data; + qsel = le32_get_bits(tx_desc->w1, RTW_TX_DESC_W1_QSEL); + + rtw_usb_write_port(rtwdev, qsel, skb_head, rtw_usb_write_port_tx_complete, txcb); + + return true; +} + +static void rtw_usb_tx_handler(struct work_struct *work) +{ + struct rtw_usb *rtwusb = container_of(work, struct rtw_usb, tx_work); + int i, limit; + + for (i = ARRAY_SIZE(rtwusb->tx_queue) - 1; i >= 0; i--) { + for (limit = 0; limit < 200; limit++) { + struct sk_buff_head *list = &rtwusb->tx_queue[i]; + + if (!rtw_usb_tx_agg_skb(rtwusb, list)) + break; + } + } +} + +static void rtw_usb_tx_queue_purge(struct rtw_usb *rtwusb) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(rtwusb->tx_queue); i++) + skb_queue_purge(&rtwusb->tx_queue[i]); +} + +static void rtw_usb_write_port_complete(struct urb *urb) +{ + struct sk_buff *skb = urb->context; + + dev_kfree_skb_any(skb); +} + +static int rtw_usb_write_data(struct rtw_dev *rtwdev, + struct rtw_tx_pkt_info *pkt_info, + u8 *buf) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + struct sk_buff *skb; + unsigned int desclen, headsize, size; + u8 qsel; + int ret = 0; + + size = pkt_info->tx_pkt_size; + qsel = pkt_info->qsel; + desclen = chip->tx_pkt_desc_sz; + headsize = pkt_info->offset ? pkt_info->offset : desclen; + + skb = dev_alloc_skb(headsize + size); + if (unlikely(!skb)) + return -ENOMEM; + + skb_reserve(skb, headsize); + skb_put_data(skb, buf, size); + skb_push(skb, headsize); + memset(skb->data, 0, headsize); + rtw_tx_fill_tx_desc(pkt_info, skb); + rtw_tx_fill_txdesc_checksum(rtwdev, pkt_info, skb->data); + + ret = rtw_usb_write_port(rtwdev, qsel, skb, + rtw_usb_write_port_complete, skb); + if (unlikely(ret)) + rtw_err(rtwdev, "failed to do USB write, ret=%d\n", ret); + + return ret; +} + +static int rtw_usb_write_data_rsvd_page(struct rtw_dev *rtwdev, u8 *buf, + u32 size) +{ + const struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_tx_pkt_info pkt_info = {0}; + + pkt_info.tx_pkt_size = size; + pkt_info.qsel = TX_DESC_QSEL_BEACON; + pkt_info.offset = chip->tx_pkt_desc_sz; + + return rtw_usb_write_data(rtwdev, &pkt_info, buf); +} + +static int rtw_usb_write_data_h2c(struct rtw_dev *rtwdev, u8 *buf, u32 size) +{ + struct rtw_tx_pkt_info pkt_info = {0}; + + pkt_info.tx_pkt_size = size; + pkt_info.qsel = TX_DESC_QSEL_H2C; + + return rtw_usb_write_data(rtwdev, &pkt_info, buf); +} + +static u8 rtw_usb_tx_queue_mapping_to_qsel(struct sk_buff *skb) +{ + struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; + __le16 fc = hdr->frame_control; + u8 qsel; + + if (unlikely(ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))) + qsel = TX_DESC_QSEL_MGMT; + else if (is_broadcast_ether_addr(hdr->addr1) || + is_multicast_ether_addr(hdr->addr1)) + qsel = TX_DESC_QSEL_HIGH; + else if (skb_get_queue_mapping(skb) <= IEEE80211_AC_BK) + qsel = skb->priority; + else + qsel = TX_DESC_QSEL_BEACON; + + return qsel; +} + +static int rtw_usb_tx_write(struct rtw_dev *rtwdev, + struct rtw_tx_pkt_info *pkt_info, + struct sk_buff *skb) +{ + struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); + const struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_usb_tx_data *tx_data; + u8 *pkt_desc; + int ep; + + pkt_info->qsel = rtw_usb_tx_queue_mapping_to_qsel(skb); + pkt_desc = skb_push(skb, chip->tx_pkt_desc_sz); + memset(pkt_desc, 0, chip->tx_pkt_desc_sz); + ep = qsel_to_ep(rtwusb, pkt_info->qsel); + rtw_tx_fill_tx_desc(pkt_info, skb); + rtw_tx_fill_txdesc_checksum(rtwdev, pkt_info, skb->data); + tx_data = rtw_usb_get_tx_data(skb); + tx_data->sn = pkt_info->sn; + + skb_queue_tail(&rtwusb->tx_queue[ep], skb); + + return 0; +} + +static void rtw_usb_tx_kick_off(struct rtw_dev *rtwdev) +{ + struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); + + queue_work(rtwusb->txwq, &rtwusb->tx_work); +} + +static void rtw_usb_rx_handler(struct work_struct *work) +{ + struct rtw_usb *rtwusb = container_of(work, struct rtw_usb, rx_work); + struct rtw_dev *rtwdev = rtwusb->rtwdev; + const struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_rx_pkt_stat pkt_stat; + struct ieee80211_rx_status rx_status; + struct sk_buff *skb; + u32 pkt_desc_sz = chip->rx_pkt_desc_sz; + u32 pkt_offset; + u8 *rx_desc; + int limit; + + for (limit = 0; limit < 200; limit++) { + skb = skb_dequeue(&rtwusb->rx_queue); + if (!skb) + break; + + rx_desc = skb->data; + chip->ops->query_rx_desc(rtwdev, rx_desc, &pkt_stat, + &rx_status); + pkt_offset = pkt_desc_sz + pkt_stat.drv_info_sz + + pkt_stat.shift; + + if (pkt_stat.is_c2h) { + skb_put(skb, pkt_stat.pkt_len + pkt_offset); + rtw_fw_c2h_cmd_rx_irqsafe(rtwdev, pkt_offset, skb); + continue; + } + + if (skb_queue_len(&rtwusb->rx_queue) >= RTW_USB_MAX_RXQ_LEN) { + dev_dbg_ratelimited(rtwdev->dev, "failed to get rx_queue, overflow\n"); + dev_kfree_skb_any(skb); + continue; + } + + skb_put(skb, pkt_stat.pkt_len); + skb_reserve(skb, pkt_offset); + memcpy(skb->cb, &rx_status, sizeof(rx_status)); + ieee80211_rx_irqsafe(rtwdev->hw, skb); + } +} + +static void rtw_usb_read_port_complete(struct urb *urb); + +static void rtw_usb_rx_resubmit(struct rtw_usb *rtwusb, struct rx_usb_ctrl_block *rxcb) +{ + struct rtw_dev *rtwdev = rtwusb->rtwdev; + int error; + + rxcb->rx_skb = alloc_skb(RTW_USB_MAX_RECVBUF_SZ, GFP_ATOMIC); + if (!rxcb->rx_skb) + return; + + usb_fill_bulk_urb(rxcb->rx_urb, rtwusb->udev, + usb_rcvbulkpipe(rtwusb->udev, rtwusb->pipe_in), + rxcb->rx_skb->data, RTW_USB_MAX_RECVBUF_SZ, + rtw_usb_read_port_complete, rxcb); + + error = usb_submit_urb(rxcb->rx_urb, GFP_ATOMIC); + if (error) { + kfree_skb(rxcb->rx_skb); + if (error != -ENODEV) + rtw_err(rtwdev, "Err sending rx data urb %d\n", + error); + } +} + +static void rtw_usb_read_port_complete(struct urb *urb) +{ + struct rx_usb_ctrl_block *rxcb = urb->context; + struct rtw_dev *rtwdev = rxcb->rtwdev; + struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); + struct sk_buff *skb = rxcb->rx_skb; + + if (urb->status == 0) { + if (urb->actual_length >= RTW_USB_MAX_RECVBUF_SZ || + urb->actual_length < 24) { + rtw_err(rtwdev, "failed to get urb length:%d\n", + urb->actual_length); + if (skb) + dev_kfree_skb_any(skb); + } else { + skb_queue_tail(&rtwusb->rx_queue, skb); + queue_work(rtwusb->rxwq, &rtwusb->rx_work); + } + rtw_usb_rx_resubmit(rtwusb, rxcb); + } else { + switch (urb->status) { + case -EINVAL: + case -EPIPE: + case -ENODEV: + case -ESHUTDOWN: + case -ENOENT: + case -EPROTO: + case -EILSEQ: + case -ETIME: + case -ECOMM: + case -EOVERFLOW: + case -EINPROGRESS: + break; + default: + rtw_err(rtwdev, "status %d\n", urb->status); + break; + } + if (skb) + dev_kfree_skb_any(skb); + } +} + +static void rtw_usb_cancel_rx_bufs(struct rtw_usb *rtwusb) +{ + struct rx_usb_ctrl_block *rxcb; + int i; + + for (i = 0; i < RTW_USB_RXCB_NUM; i++) { + rxcb = &rtwusb->rx_cb[i]; + if (rxcb->rx_urb) + usb_kill_urb(rxcb->rx_urb); + } +} + +static void rtw_usb_free_rx_bufs(struct rtw_usb *rtwusb) +{ + struct rx_usb_ctrl_block *rxcb; + int i; + + for (i = 0; i < RTW_USB_RXCB_NUM; i++) { + rxcb = &rtwusb->rx_cb[i]; + if (rxcb->rx_urb) { + usb_kill_urb(rxcb->rx_urb); + usb_free_urb(rxcb->rx_urb); + } + } +} + +static int rtw_usb_alloc_rx_bufs(struct rtw_usb *rtwusb) +{ + int i; + + for (i = 0; i < RTW_USB_RXCB_NUM; i++) { + struct rx_usb_ctrl_block *rxcb = &rtwusb->rx_cb[i]; + + rxcb->rtwdev = rtwusb->rtwdev; + rxcb->rx_urb = usb_alloc_urb(0, GFP_KERNEL); + if (!rxcb->rx_urb) + goto err; + } + + return 0; +err: + rtw_usb_free_rx_bufs(rtwusb); + return -ENOMEM; +} + +static int rtw_usb_setup(struct rtw_dev *rtwdev) +{ + /* empty function for rtw_hci_ops */ + return 0; +} + +static int rtw_usb_start(struct rtw_dev *rtwdev) +{ + return 0; +} + +static void rtw_usb_stop(struct rtw_dev *rtwdev) +{ +} + +static void rtw_usb_deep_ps(struct rtw_dev *rtwdev, bool enter) +{ + /* empty function for rtw_hci_ops */ +} + +static void rtw_usb_link_ps(struct rtw_dev *rtwdev, bool enter) +{ + /* empty function for rtw_hci_ops */ +} + +static void rtw_usb_interface_cfg(struct rtw_dev *rtwdev) +{ + /* empty function for rtw_hci_ops */ +} + +static struct rtw_hci_ops rtw_usb_ops = { + .tx_write = rtw_usb_tx_write, + .tx_kick_off = rtw_usb_tx_kick_off, + .setup = rtw_usb_setup, + .start = rtw_usb_start, + .stop = rtw_usb_stop, + .deep_ps = rtw_usb_deep_ps, + .link_ps = rtw_usb_link_ps, + .interface_cfg = rtw_usb_interface_cfg, + + .write8 = rtw_usb_write8, + .write16 = rtw_usb_write16, + .write32 = rtw_usb_write32, + .read8 = rtw_usb_read8, + .read16 = rtw_usb_read16, + .read32 = rtw_usb_read32, + + .write_data_rsvd_page = rtw_usb_write_data_rsvd_page, + .write_data_h2c = rtw_usb_write_data_h2c, +}; + +static int rtw_usb_init_rx(struct rtw_dev *rtwdev) +{ + struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); + int i; + + rtwusb->rxwq = create_singlethread_workqueue("rtw88_usb: rx wq"); + if (!rtwusb->rxwq) { + rtw_err(rtwdev, "failed to create RX work queue\n"); + return -ENOMEM; + } + + skb_queue_head_init(&rtwusb->rx_queue); + + INIT_WORK(&rtwusb->rx_work, rtw_usb_rx_handler); + + for (i = 0; i < RTW_USB_RXCB_NUM; i++) { + struct rx_usb_ctrl_block *rxcb = &rtwusb->rx_cb[i]; + + rtw_usb_rx_resubmit(rtwusb, rxcb); + } + + return 0; +} + +static void rtw_usb_deinit_rx(struct rtw_dev *rtwdev) +{ + struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); + + skb_queue_purge(&rtwusb->rx_queue); + + flush_workqueue(rtwusb->rxwq); + destroy_workqueue(rtwusb->rxwq); +} + +static int rtw_usb_init_tx(struct rtw_dev *rtwdev) +{ + struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); + int i; + + rtwusb->txwq = create_singlethread_workqueue("rtw88_usb: tx wq"); + if (!rtwusb->txwq) { + rtw_err(rtwdev, "failed to create TX work queue\n"); + return -ENOMEM; + } + + for (i = 0; i < ARRAY_SIZE(rtwusb->tx_queue); i++) + skb_queue_head_init(&rtwusb->tx_queue[i]); + + INIT_WORK(&rtwusb->tx_work, rtw_usb_tx_handler); + + return 0; +} + +static void rtw_usb_deinit_tx(struct rtw_dev *rtwdev) +{ + struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); + + rtw_usb_tx_queue_purge(rtwusb); + flush_workqueue(rtwusb->txwq); + destroy_workqueue(rtwusb->txwq); +} + +static int rtw_usb_intf_init(struct rtw_dev *rtwdev, + struct usb_interface *intf) +{ + struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); + struct usb_device *udev = usb_get_dev(interface_to_usbdev(intf)); + int ret; + + rtwusb->udev = udev; + ret = rtw_usb_parse(rtwdev, intf); + if (ret) + return ret; + + rtwusb->usb_data = kcalloc(RTW_USB_MAX_RXTX_COUNT, sizeof(u32), + GFP_KERNEL); + if (!rtwusb->usb_data) + return -ENOMEM; + + usb_set_intfdata(intf, rtwdev->hw); + + SET_IEEE80211_DEV(rtwdev->hw, &intf->dev); + spin_lock_init(&rtwusb->usb_lock); + + return 0; +} + +static void rtw_usb_intf_deinit(struct rtw_dev *rtwdev, + struct usb_interface *intf) +{ + struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); + + usb_put_dev(rtwusb->udev); + kfree(rtwusb->usb_data); + usb_set_intfdata(intf, NULL); +} + +int rtw_usb_probe(struct usb_interface *intf, const struct usb_device_id *id) +{ + struct rtw_dev *rtwdev; + struct ieee80211_hw *hw; + struct rtw_usb *rtwusb; + int drv_data_size; + int ret; + + drv_data_size = sizeof(struct rtw_dev) + sizeof(struct rtw_usb); + hw = ieee80211_alloc_hw(drv_data_size, &rtw_ops); + if (!hw) + return -ENOMEM; + + rtwdev = hw->priv; + rtwdev->hw = hw; + rtwdev->dev = &intf->dev; + rtwdev->chip = (struct rtw_chip_info *)id->driver_info; + rtwdev->hci.ops = &rtw_usb_ops; + rtwdev->hci.type = RTW_HCI_TYPE_USB; + + rtwusb = rtw_get_usb_priv(rtwdev); + rtwusb->rtwdev = rtwdev; + + ret = rtw_usb_alloc_rx_bufs(rtwusb); + if (ret) + goto err_release_hw; + + ret = rtw_core_init(rtwdev); + if (ret) + goto err_free_rx_bufs; + + ret = rtw_usb_intf_init(rtwdev, intf); + if (ret) { + rtw_err(rtwdev, "failed to init USB interface\n"); + goto err_deinit_core; + } + + ret = rtw_usb_init_tx(rtwdev); + if (ret) { + rtw_err(rtwdev, "failed to init USB TX\n"); + goto err_destroy_usb; + } + + ret = rtw_usb_init_rx(rtwdev); + if (ret) { + rtw_err(rtwdev, "failed to init USB RX\n"); + goto err_destroy_txwq; + } + + ret = rtw_chip_info_setup(rtwdev); + if (ret) { + rtw_err(rtwdev, "failed to setup chip information\n"); + goto err_destroy_rxwq; + } + + ret = rtw_register_hw(rtwdev, rtwdev->hw); + if (ret) { + rtw_err(rtwdev, "failed to register hw\n"); + goto err_destroy_rxwq; + } + + return 0; + +err_destroy_rxwq: + rtw_usb_deinit_rx(rtwdev); + +err_destroy_txwq: + rtw_usb_deinit_tx(rtwdev); + +err_destroy_usb: + rtw_usb_intf_deinit(rtwdev, intf); + +err_deinit_core: + rtw_core_deinit(rtwdev); + +err_free_rx_bufs: + rtw_usb_free_rx_bufs(rtwusb); + +err_release_hw: + ieee80211_free_hw(hw); + + return ret; +} +EXPORT_SYMBOL(rtw_usb_probe); + +void rtw_usb_disconnect(struct usb_interface *intf) +{ + struct ieee80211_hw *hw = usb_get_intfdata(intf); + struct rtw_dev *rtwdev; + struct rtw_usb *rtwusb; + + if (!hw) + return; + + rtwdev = hw->priv; + rtwusb = rtw_get_usb_priv(rtwdev); + + rtw_usb_cancel_rx_bufs(rtwusb); + + rtw_unregister_hw(rtwdev, hw); + rtw_usb_deinit_tx(rtwdev); + rtw_usb_deinit_rx(rtwdev); + + if (rtwusb->udev->state != USB_STATE_NOTATTACHED) + usb_reset_device(rtwusb->udev); + + rtw_usb_free_rx_bufs(rtwusb); + + rtw_usb_intf_deinit(rtwdev, intf); + rtw_core_deinit(rtwdev); + ieee80211_free_hw(hw); +} +EXPORT_SYMBOL(rtw_usb_disconnect); + +MODULE_AUTHOR("Realtek Corporation"); +MODULE_DESCRIPTION("Realtek 802.11ac wireless USB driver"); +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/net/wireless/realtek/rtw88/usb.h b/drivers/net/wireless/realtek/rtw88/usb.h new file mode 100644 index 0000000000..86697a5c01 --- /dev/null +++ b/drivers/net/wireless/realtek/rtw88/usb.h @@ -0,0 +1,100 @@ +/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ +/* Copyright(c) 2018-2019 Realtek Corporation + */ + +#ifndef __RTW_USB_H_ +#define __RTW_USB_H_ + +#define FW_8192C_START_ADDRESS 0x1000 +#define FW_8192C_END_ADDRESS 0x5fff + +#define RTW_USB_MAX_RXTX_COUNT 128 +#define RTW_USB_VENQT_MAX_BUF_SIZE 254 +#define MAX_USBCTRL_VENDORREQ_TIMES 10 + +#define RTW_USB_CMD_READ 0xc0 +#define RTW_USB_CMD_WRITE 0x40 +#define RTW_USB_CMD_REQ 0x05 + +#define RTW_USB_VENQT_CMD_IDX 0x00 + +#define RTW_USB_TX_SEL_HQ BIT(0) +#define RTW_USB_TX_SEL_LQ BIT(1) +#define RTW_USB_TX_SEL_NQ BIT(2) +#define RTW_USB_TX_SEL_EQ BIT(3) + +#define RTW_USB_BULK_IN_ADDR 0x80 +#define RTW_USB_INT_IN_ADDR 0x81 + +#define RTW_USB_HW_QUEUE_ENTRY 8 + +#define RTW_USB_PACKET_OFFSET_SZ 8 +#define RTW_USB_MAX_XMITBUF_SZ (1024 * 20) +#define RTW_USB_MAX_RECVBUF_SZ 32768 + +#define RTW_USB_RECVBUFF_ALIGN_SZ 8 + +#define RTW_USB_RXAGG_SIZE 6 +#define RTW_USB_RXAGG_TIMEOUT 10 + +#define RTW_USB_RXCB_NUM 4 + +#define RTW_USB_EP_MAX 4 + +#define TX_DESC_QSEL_MAX 20 + +#define RTW_USB_VENDOR_ID_REALTEK 0x0bda + +static inline struct rtw_usb *rtw_get_usb_priv(struct rtw_dev *rtwdev) +{ + return (struct rtw_usb *)rtwdev->priv; +} + +struct rx_usb_ctrl_block { + struct rtw_dev *rtwdev; + struct urb *rx_urb; + struct sk_buff *rx_skb; +}; + +struct rtw_usb_tx_data { + u8 sn; +}; + +struct rtw_usb { + struct rtw_dev *rtwdev; + struct usb_device *udev; + + /* protects usb_data_index */ + spinlock_t usb_lock; + __le32 *usb_data; + unsigned int usb_data_index; + + u8 pipe_interrupt; + u8 pipe_in; + u8 out_ep[RTW_USB_EP_MAX]; + int qsel_to_ep[TX_DESC_QSEL_MAX]; + + struct workqueue_struct *txwq, *rxwq; + + struct sk_buff_head tx_queue[RTW_USB_EP_MAX]; + struct work_struct tx_work; + + struct rx_usb_ctrl_block rx_cb[RTW_USB_RXCB_NUM]; + struct sk_buff_head rx_queue; + struct work_struct rx_work; +}; + +static inline struct rtw_usb_tx_data *rtw_usb_get_tx_data(struct sk_buff *skb) +{ + struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); + + BUILD_BUG_ON(sizeof(struct rtw_usb_tx_data) > + sizeof(info->status.status_driver_data)); + + return (struct rtw_usb_tx_data *)info->status.status_driver_data; +} + +int rtw_usb_probe(struct usb_interface *intf, const struct usb_device_id *id); +void rtw_usb_disconnect(struct usb_interface *intf); + +#endif diff --git a/drivers/net/wireless/realtek/rtw88/util.c b/drivers/net/wireless/realtek/rtw88/util.c index 2c515af214..e222d3c01a 100644 --- a/drivers/net/wireless/realtek/rtw88/util.c +++ b/drivers/net/wireless/realtek/rtw88/util.c @@ -23,7 +23,7 @@ EXPORT_SYMBOL(check_hw_ready); bool ltecoex_read_reg(struct rtw_dev *rtwdev, u16 offset, u32 *val) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; const struct rtw_ltecoex_addr *ltecoex = chip->ltecoex_addr; if (!check_hw_ready(rtwdev, ltecoex->ctrl, LTECOEX_READY, 1)) @@ -37,7 +37,7 @@ bool ltecoex_read_reg(struct rtw_dev *rtwdev, u16 offset, u32 *val) bool ltecoex_reg_write(struct rtw_dev *rtwdev, u16 offset, u32 value) { - struct rtw_chip_info *chip = rtwdev->chip; + const struct rtw_chip_info *chip = rtwdev->chip; const struct rtw_ltecoex_addr *ltecoex = chip->ltecoex_addr; if (!check_hw_ready(rtwdev, ltecoex->ctrl, LTECOEX_READY, 1)) @@ -105,3 +105,103 @@ void rtw_desc_to_mcsrate(u16 rate, u8 *mcs, u8 *nss) *mcs = rate - DESC_RATEMCS0; } } + +struct rtw_stas_entry { + struct list_head list; + struct ieee80211_sta *sta; +}; + +struct rtw_iter_stas_data { + struct rtw_dev *rtwdev; + struct list_head list; +}; + +static void rtw_collect_sta_iter(void *data, struct ieee80211_sta *sta) +{ + struct rtw_iter_stas_data *iter_stas = data; + struct rtw_stas_entry *stas_entry; + + stas_entry = kmalloc(sizeof(*stas_entry), GFP_ATOMIC); + if (!stas_entry) + return; + + stas_entry->sta = sta; + list_add_tail(&stas_entry->list, &iter_stas->list); +} + +void rtw_iterate_stas(struct rtw_dev *rtwdev, + void (*iterator)(void *data, + struct ieee80211_sta *sta), + void *data) +{ + struct rtw_iter_stas_data iter_data; + struct rtw_stas_entry *sta_entry, *tmp; + + /* &rtwdev->mutex makes sure no stations can be removed between + * collecting the stations and iterating over them. + */ + lockdep_assert_held(&rtwdev->mutex); + + iter_data.rtwdev = rtwdev; + INIT_LIST_HEAD(&iter_data.list); + + ieee80211_iterate_stations_atomic(rtwdev->hw, rtw_collect_sta_iter, + &iter_data); + + list_for_each_entry_safe(sta_entry, tmp, &iter_data.list, + list) { + list_del_init(&sta_entry->list); + iterator(data, sta_entry->sta); + kfree(sta_entry); + } +} + +struct rtw_vifs_entry { + struct list_head list; + struct ieee80211_vif *vif; +}; + +struct rtw_iter_vifs_data { + struct rtw_dev *rtwdev; + struct list_head list; +}; + +static void rtw_collect_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) +{ + struct rtw_iter_vifs_data *iter_stas = data; + struct rtw_vifs_entry *vifs_entry; + + vifs_entry = kmalloc(sizeof(*vifs_entry), GFP_ATOMIC); + if (!vifs_entry) + return; + + vifs_entry->vif = vif; + list_add_tail(&vifs_entry->list, &iter_stas->list); +} + +void rtw_iterate_vifs(struct rtw_dev *rtwdev, + void (*iterator)(void *data, struct ieee80211_vif *vif), + void *data) +{ + struct rtw_iter_vifs_data iter_data; + struct rtw_vifs_entry *vif_entry, *tmp; + + /* &rtwdev->mutex makes sure no interfaces can be removed between + * collecting the interfaces and iterating over them. + */ + lockdep_assert_held(&rtwdev->mutex); + + iter_data.rtwdev = rtwdev; + INIT_LIST_HEAD(&iter_data.list); + + ieee80211_iterate_active_interfaces_atomic(rtwdev->hw, + IEEE80211_IFACE_ITER_NORMAL, + rtw_collect_vif_iter, &iter_data); + + list_for_each_entry_safe(vif_entry, tmp, &iter_data.list, + list) { + list_del_init(&vif_entry->list); + iterator(data, vif_entry->vif); + kfree(vif_entry); + } +} diff --git a/drivers/net/wireless/realtek/rtw88/util.h b/drivers/net/wireless/realtek/rtw88/util.h index 0c23b5069b..f8399128a9 100644 --- a/drivers/net/wireless/realtek/rtw88/util.h +++ b/drivers/net/wireless/realtek/rtw88/util.h @@ -7,9 +7,6 @@ struct rtw_dev; -#define rtw_iterate_vifs(rtwdev, iterator, data) \ - ieee80211_iterate_active_interfaces(rtwdev->hw, \ - IEEE80211_IFACE_ITER_NORMAL, iterator, data) #define rtw_iterate_vifs_atomic(rtwdev, iterator, data) \ ieee80211_iterate_active_interfaces_atomic(rtwdev->hw, \ IEEE80211_IFACE_ITER_NORMAL, iterator, data) @@ -20,6 +17,14 @@ struct rtw_dev; #define rtw_iterate_keys_rcu(rtwdev, vif, iterator, data) \ ieee80211_iter_keys_rcu((rtwdev)->hw, vif, iterator, data) +void rtw_iterate_vifs(struct rtw_dev *rtwdev, + void (*iterator)(void *data, struct ieee80211_vif *vif), + void *data); +void rtw_iterate_stas(struct rtw_dev *rtwdev, + void (*iterator)(void *data, + struct ieee80211_sta *sta), + void *data); + static inline u8 *get_hdr_bssid(struct ieee80211_hdr *hdr) { __le16 fc = hdr->frame_control; diff --git a/drivers/net/wireless/realtek/rtw88/wow.c b/drivers/net/wireless/realtek/rtw88/wow.c index bb2fd4e544..16ddee577e 100644 --- a/drivers/net/wireless/realtek/rtw88/wow.c +++ b/drivers/net/wireless/realtek/rtw88/wow.c @@ -12,26 +12,54 @@ static void rtw_wow_show_wakeup_reason(struct rtw_dev *rtwdev) { + struct cfg80211_wowlan_nd_info nd_info; + struct cfg80211_wowlan_wakeup wakeup = { + .pattern_idx = -1, + }; u8 reason; reason = rtw_read8(rtwdev, REG_WOWLAN_WAKE_REASON); - if (reason == RTW_WOW_RSN_RX_DEAUTH) + switch (reason) { + case RTW_WOW_RSN_RX_DEAUTH: + wakeup.disconnect = true; rtw_dbg(rtwdev, RTW_DBG_WOW, "WOW: Rx deauth\n"); - else if (reason == RTW_WOW_RSN_DISCONNECT) + break; + case RTW_WOW_RSN_DISCONNECT: + wakeup.disconnect = true; rtw_dbg(rtwdev, RTW_DBG_WOW, "WOW: AP is off\n"); - else if (reason == RTW_WOW_RSN_RX_MAGIC_PKT) + break; + case RTW_WOW_RSN_RX_MAGIC_PKT: + wakeup.magic_pkt = true; rtw_dbg(rtwdev, RTW_DBG_WOW, "WOW: Rx magic packet\n"); - else if (reason == RTW_WOW_RSN_RX_GTK_REKEY) + break; + case RTW_WOW_RSN_RX_GTK_REKEY: + wakeup.gtk_rekey_failure = true; rtw_dbg(rtwdev, RTW_DBG_WOW, "WOW: Rx gtk rekey\n"); - else if (reason == RTW_WOW_RSN_RX_PTK_REKEY) - rtw_dbg(rtwdev, RTW_DBG_WOW, "WOW: Rx ptk rekey\n"); - else if (reason == RTW_WOW_RSN_RX_PATTERN_MATCH) + break; + case RTW_WOW_RSN_RX_PATTERN_MATCH: + /* Current firmware and driver don't report pattern index + * Use pattern_idx to 0 defaultly. + */ + wakeup.pattern_idx = 0; rtw_dbg(rtwdev, RTW_DBG_WOW, "WOW: Rx pattern match packet\n"); - else if (reason == RTW_WOW_RSN_RX_NLO) + break; + case RTW_WOW_RSN_RX_NLO: + /* Current firmware and driver don't report ssid index. + * Use 0 for n_matches based on its comment. + */ + nd_info.n_matches = 0; + wakeup.net_detect = &nd_info; rtw_dbg(rtwdev, RTW_DBG_WOW, "Rx NLO\n"); - else + break; + default: rtw_warn(rtwdev, "Unknown wakeup reason %x\n", reason); + ieee80211_report_wowlan_wakeup(rtwdev->wow.wow_vif, NULL, + GFP_KERNEL); + return; + } + ieee80211_report_wowlan_wakeup(rtwdev->wow.wow_vif, &wakeup, + GFP_KERNEL); } static void rtw_wow_pattern_write_cam(struct rtw_dev *rtwdev, u8 addr, @@ -343,7 +371,8 @@ static void rtw_wow_fw_security_type_iter(struct ieee80211_hw *hw, key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX; break; default: - rtw_err(rtwdev, "Unsupported key type for wowlan mode\n"); + rtw_err(rtwdev, "Unsupported key type for wowlan mode: %#x\n", + key->cipher); hw_key_type = 0; break; } @@ -442,37 +471,31 @@ static void rtw_wow_fw_media_status(struct rtw_dev *rtwdev, bool connect) rtw_iterate_stas_atomic(rtwdev, rtw_wow_fw_media_status_iter, &data); } -static void rtw_wow_config_pno_rsvd_page(struct rtw_dev *rtwdev, - struct rtw_vif *rtwvif) -{ - rtw_add_rsvd_page_pno(rtwdev, rtwvif); -} - -static void rtw_wow_config_linked_rsvd_page(struct rtw_dev *rtwdev, - struct rtw_vif *rtwvif) +static int rtw_wow_config_wow_fw_rsvd_page(struct rtw_dev *rtwdev) { - rtw_add_rsvd_page_sta(rtwdev, rtwvif); -} + struct ieee80211_vif *wow_vif = rtwdev->wow.wow_vif; + struct rtw_vif *rtwvif = (struct rtw_vif *)wow_vif->drv_priv; -static void rtw_wow_config_rsvd_page(struct rtw_dev *rtwdev, - struct rtw_vif *rtwvif) -{ rtw_remove_rsvd_page(rtwdev, rtwvif); - if (rtw_wow_mgd_linked(rtwdev)) { - rtw_wow_config_linked_rsvd_page(rtwdev, rtwvif); - } else if (test_bit(RTW_FLAG_WOWLAN, rtwdev->flags) && - rtw_wow_no_link(rtwdev)) { - rtw_wow_config_pno_rsvd_page(rtwdev, rtwvif); - } + if (rtw_wow_no_link(rtwdev)) + rtw_add_rsvd_page_pno(rtwdev, rtwvif); + else + rtw_add_rsvd_page_sta(rtwdev, rtwvif); + + return rtw_fw_download_rsvd_page(rtwdev); } -static int rtw_wow_dl_fw_rsvd_page(struct rtw_dev *rtwdev) +static int rtw_wow_config_normal_fw_rsvd_page(struct rtw_dev *rtwdev) { struct ieee80211_vif *wow_vif = rtwdev->wow.wow_vif; struct rtw_vif *rtwvif = (struct rtw_vif *)wow_vif->drv_priv; - rtw_wow_config_rsvd_page(rtwdev, rtwvif); + rtw_remove_rsvd_page(rtwdev, rtwvif); + rtw_add_rsvd_page_sta(rtwdev, rtwvif); + + if (rtw_wow_no_link(rtwdev)) + return 0; return rtw_fw_download_rsvd_page(rtwdev); } @@ -566,10 +589,10 @@ static int rtw_wow_leave_no_link_ps(struct rtw_dev *rtwdev) int ret = 0; if (test_bit(RTW_FLAG_WOWLAN, rtwdev->flags)) { - if (rtw_fw_lps_deep_mode) + if (rtw_get_lps_deep_mode(rtwdev) != LPS_DEEP_MODE_NONE) rtw_leave_lps_deep(rtwdev); } else { - if (test_bit(RTW_FLAG_INACTIVE_PS, rtwdev->flags)) { + if (!test_bit(RTW_FLAG_POWERON, rtwdev->flags)) { rtw_wow->ips_enabled = true; ret = rtw_leave_ips(rtwdev); if (ret) @@ -627,7 +650,8 @@ static int rtw_wow_enter_ps(struct rtw_dev *rtwdev) if (rtw_wow_mgd_linked(rtwdev)) ret = rtw_wow_enter_linked_ps(rtwdev); - else if (rtw_wow_no_link(rtwdev) && rtw_fw_lps_deep_mode) + else if (rtw_wow_no_link(rtwdev) && + rtw_get_lps_deep_mode(rtwdev) != LPS_DEEP_MODE_NONE) ret = rtw_wow_enter_no_link_ps(rtwdev); return ret; @@ -669,7 +693,7 @@ static int rtw_wow_enable(struct rtw_dev *rtwdev) set_bit(RTW_FLAG_WOWLAN, rtwdev->flags); - ret = rtw_wow_dl_fw_rsvd_page(rtwdev); + ret = rtw_wow_config_wow_fw_rsvd_page(rtwdev); if (ret) { rtw_err(rtwdev, "failed to download wowlan rsvd page\n"); goto error; @@ -742,7 +766,7 @@ static int rtw_wow_disable(struct rtw_dev *rtwdev) goto out; } - ret = rtw_wow_dl_fw_rsvd_page(rtwdev); + ret = rtw_wow_config_normal_fw_rsvd_page(rtwdev); if (ret) rtw_err(rtwdev, "failed to download normal rsvd page\n"); diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 64e2f5e379..9a515c2904 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -305,6 +305,16 @@ config PCIE_HISI_ERR Say Y here if you want error handling support for the PCIe controller's errors on HiSilicon HIP SoCs +config PCIE_PHYTIUM_EP + tristate "Phytium PCIe endpoint controller" + depends on OF + depends on PCI_ENDPOINT + help + Say Y here if you want to support Phytium PCIe controller in + endpoint mode on Phytium SoC. The controller can act as Root Port + or End Point with different phytium firmware. But End Point mode only support + one physical function. + source "drivers/pci/controller/dwc/Kconfig" source "drivers/pci/controller/mobiveil/Kconfig" source "drivers/pci/controller/cadence/Kconfig" diff --git a/drivers/pci/controller/Makefile b/drivers/pci/controller/Makefile index 04c6edc285..1ba948a733 100644 --- a/drivers/pci/controller/Makefile +++ b/drivers/pci/controller/Makefile @@ -32,6 +32,7 @@ obj-$(CONFIG_VMD) += vmd.o obj-$(CONFIG_PCIE_BRCMSTB) += pcie-brcmstb.o obj-$(CONFIG_PCI_LOONGSON) += pci-loongson.o obj-$(CONFIG_PCIE_HISI_ERR) += pcie-hisi-error.o +obj-$(CONFIG_PCIE_PHYTIUM_EP) += pcie-phytium-ep.o # pcie-hisi.o quirks are needed even without CONFIG_PCIE_DW obj-y += dwc/ obj-y += mobiveil/ diff --git a/drivers/pci/controller/pcie-phytium-ep.c b/drivers/pci/controller/pcie-phytium-ep.c new file mode 100644 index 0000000000..5f66810e84 --- /dev/null +++ b/drivers/pci/controller/pcie-phytium-ep.c @@ -0,0 +1,476 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Phytium pd2008 pcie endpoint driver + * + * Copyright (c) 2021 Phytium Limited. + * + * Author: + * Yang Xun + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "pcie-phytium-ep.h" +#include "pcie-phytium-register.h" + +#define PHYTIUM_PCIE_EP_IRQ_PCI_ADDR_NONE 0x0 +#define PHYTIUM_PCIE_EP_IRQ_PCI_ADDR_LEGACY 0x1 + +static int phytium_pcie_ep_write_header(struct pci_epc *epc, u8 fn, + struct pci_epf_header *hdr) +{ + struct phytium_pcie_ep *priv = epc_get_drvdata(epc); + u16 tmp = 0; + + phytium_pcie_writew(priv, fn, PHYTIUM_PCI_VENDOR_ID, hdr->vendorid); + phytium_pcie_writew(priv, fn, PHYTIUM_PCI_DEVICE_ID, hdr->deviceid); + phytium_pcie_writeb(priv, fn, PHYTIUM_PCI_REVISION_ID, hdr->revid); + phytium_pcie_writeb(priv, fn, PHYTIUM_PCI_CLASS_PROG, hdr->progif_code); + phytium_pcie_writew(priv, fn, PHYTIUM_PCI_CLASS_DEVICE, + hdr->subclass_code | (hdr->baseclass_code << 8)); + + phytium_pcie_writew(priv, fn, PHYTIUM_PCI_SUBSYS_VENDOR_ID, + hdr->subsys_vendor_id); + phytium_pcie_writew(priv, fn, PHYTIUM_PCI_SUBSYS_DEVICE_ID, + hdr->subsys_id); + + tmp = phytium_pcie_readw(priv, fn, PHYTIUM_PCI_INTERRUPT_PIN); + tmp = ((tmp & (~INTERRUPT_PIN_MASK)) | hdr->interrupt_pin); + phytium_pcie_writew(priv, fn, PHYTIUM_PCI_INTERRUPT_PIN, tmp); + + tmp = phytium_pcie_readw(priv, fn, PHYTIUM_PCI_MSIX_CAP); + phytium_pcie_writew(priv, fn, PHYTIUM_PCI_MSIX_CAP, MSIX_DISABLE); + + return 0; +} + +static int phytium_pcie_ep_set_bar(struct pci_epc *epc, u8 fn, + struct pci_epf_bar *epf_bar) +{ + struct phytium_pcie_ep *priv = epc_get_drvdata(epc); + u64 sz = 0, sz_mask, atr_size; + int flags = epf_bar->flags; + u32 setting, src_addr0, src_addr1, trsl_addr0, trsl_addr1, trsl_param; + enum pci_barno barno = epf_bar->barno; + struct pci_epc_mem *mem = epc->mem; + + if ((flags & PCI_BASE_ADDRESS_MEM_TYPE_64) && (barno & 1)) { + dev_err(&epc->dev, "bar %d do not support mem64\n", barno); + return -EINVAL; + } + + if (barno & 1) { + dev_err(&epc->dev, "not support bar 1/3/5\n"); + return -EINVAL; + } + dev_dbg(epc->dev.parent, "set bar%d mapping address 0x%pa size 0x%lx\n", + barno, &(epf_bar->phys_addr), epf_bar->size); + + if ((flags & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) { + setting = BAR_IO_TYPE; + sz = max_t(size_t, epf_bar->size, BAR_IO_MIN_APERTURE); + sz = 1 << fls64(sz - 1); + sz_mask = ~(sz - 1); + setting |= sz_mask; + trsl_param = TRSL_ID_IO; + } else { + setting = BAR_MEM_TYPE; + sz = max_t(size_t, epf_bar->size, BAR_MEM_MIN_APERTURE); + sz = 1 << fls64(sz - 1); + sz_mask = ~(sz - 1); + setting |= lower_32_bits(sz_mask); + + if (flags & PCI_BASE_ADDRESS_MEM_TYPE_64) + setting |= BAR_MEM_64BIT; + + if (flags & PCI_BASE_ADDRESS_MEM_PREFETCH) + setting |= BAR_MEM_PREFETCHABLE; + + trsl_param = TRSL_ID_MASTER; + } + + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_BAR(barno), setting); + if (flags & PCI_BASE_ADDRESS_MEM_TYPE_64) + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_BAR(barno + 1), + upper_32_bits(sz_mask)); + dev_dbg(epc->dev.parent, "set bar%d mapping address 0x%pa size 0x%llx 0x%x\n", + barno, &(epf_bar->phys_addr), sz, lower_32_bits(epf_bar->phys_addr)); + sz = ALIGN(sz, mem->window.page_size); + atr_size = fls64(sz - 1) - 1; + src_addr0 = ATR_IMPL | ((atr_size & ATR_SIZE_MASK) << ATR_SIZE_SHIFT); + src_addr1 = 0; + trsl_addr0 = (lower_32_bits(epf_bar->phys_addr) & TRSL_ADDR_32_12_MASK); + trsl_addr1 = upper_32_bits(epf_bar->phys_addr); + + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_WIN0_SRC_ADDR0(barno), + src_addr0); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_WIN0_SRC_ADDR1(barno), + src_addr1); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_WIN0_TRSL_ADDR0(barno), + trsl_addr0); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_WIN0_TRSL_ADDR1(barno), + trsl_addr1); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_WIN0_TRSL_PARAM(barno), + trsl_param); + + return 0; +} + +static void phytium_pcie_ep_clear_bar(struct pci_epc *epc, u8 fn, + struct pci_epf_bar *epf_bar) +{ + struct phytium_pcie_ep *priv = epc_get_drvdata(epc); + int flags = epf_bar->flags; + enum pci_barno barno = epf_bar->barno; + + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_BAR(barno), 0); + if (flags & PCI_BASE_ADDRESS_MEM_TYPE_64) + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_BAR(barno + 1), 0); + + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_WIN0_SRC_ADDR0(barno), 0); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_WIN0_SRC_ADDR1(barno), 0); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_WIN0_TRSL_ADDR0(barno), 0); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_WIN0_TRSL_ADDR1(barno), 0); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_WIN0_TRSL_PARAM(barno), 0); +} + +static int phytium_pcie_ep_map_addr(struct pci_epc *epc, u8 fn, + phys_addr_t addr, u64 pci_addr, + size_t size) +{ + struct phytium_pcie_ep *priv = epc_get_drvdata(epc); + u32 src_addr0, src_addr1, trsl_addr0, trsl_addr1, trsl_param, atr_size; + u64 sz = 0; + u32 r; + struct pci_epc_mem *mem = epc->mem; + + r = find_first_zero_bit(&priv->ob_region_map, BITS_PER_LONG); + if (r >= priv->max_regions) { + dev_err(&epc->dev, "no free outbound region\n"); + return -EINVAL; + } + + dev_dbg(epc->dev.parent, "set slave %d: mapping address 0x%pa to pci 0x%llx, size 0x%zx\n", + r, &addr, pci_addr, size); + + sz = ALIGN(size, mem->window.page_size); + atr_size = fls64(sz - 1) - 1; + src_addr0 = ATR_IMPL | ((atr_size & ATR_SIZE_MASK) << ATR_SIZE_SHIFT); + src_addr0 |= (lower_32_bits(addr) & SRC_ADDR_32_12_MASK); + src_addr1 = upper_32_bits(addr); + trsl_addr0 = (lower_32_bits(pci_addr) & TRSL_ADDR_32_12_MASK); + trsl_addr1 = upper_32_bits(pci_addr); + trsl_param = TRSL_ID_PCIE_TR; + + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_SLAVE0_SRC_ADDR0(r), + src_addr0); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_SLAVE0_SRC_ADDR1(r), + src_addr1); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_SLAVE0_TRSL_ADDR0(r), + trsl_addr0); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_SLAVE0_TRSL_ADDR1(r), + trsl_addr1); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_SLAVE0_TRSL_PARAM(r), + trsl_param); + set_bit(r, &priv->ob_region_map); + priv->ob_addr[r] = addr; + + return 0; +} + +static void phytium_pcie_ep_unmap_addr(struct pci_epc *epc, u8 fn, + phys_addr_t addr) +{ + struct phytium_pcie_ep *priv = epc_get_drvdata(epc); + u32 r; + + for (r = 0; r < priv->max_regions; r++) + if (priv->ob_addr[r] == addr) + break; + + if (r == priv->max_regions) { + dev_err(&epc->dev, "used unmap addr 0x%pa\n", &addr); + return; + } + dev_dbg(epc->dev.parent, "set slave %d: unmapping address 0x%pa\n", r, &addr); + + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_SLAVE0_SRC_ADDR0(r), 0); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_SLAVE0_SRC_ADDR1(r), 0); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_SLAVE0_TRSL_ADDR0(r), 0); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_SLAVE0_TRSL_ADDR1(r), 0); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_SLAVE0_TRSL_PARAM(r), 0); + priv->ob_addr[r] = 0; + clear_bit(r, &priv->ob_region_map); +} + +static int phytium_pcie_ep_set_msi(struct pci_epc *epc, u8 fn, u8 mmc) +{ + struct phytium_pcie_ep *priv = epc_get_drvdata(epc); + u16 flags = 0; + + flags = (mmc & MSI_NUM_MASK) << MSI_NUM_SHIFT; + flags &= ~MSI_MASK_SUPPORT; + phytium_pcie_writew(priv, fn, PHYTIUM_PCI_INTERRUPT_PIN, flags); + + return 0; +} + +static int phytium_pcie_ep_get_msi(struct pci_epc *epc, u8 fn) +{ + struct phytium_pcie_ep *priv = epc_get_drvdata(epc); + u16 flags, mme; + u32 cap = PHYTIUM_PCI_CF_MSI_BASE; + + flags = phytium_pcie_readw(priv, fn, cap + PCI_MSI_FLAGS); + if (!(flags & PCI_MSI_FLAGS_ENABLE)) + return -EINVAL; + + mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4; + + return mme; +} + +static int phytium_pcie_ep_send_msi_irq(struct phytium_pcie_ep *priv, u8 fn, + u8 interrupt_num) +{ + u32 cap = PHYTIUM_PCI_CF_MSI_BASE; + u16 flags, mme, data_mask, data; + u8 msi_count; + u64 pci_addr, pci_addr_mask = IRQ_MAPPING_SIZE - 1; + u32 src_addr0, src_addr1, trsl_addr0, trsl_addr1, trsl_param, atr_size; + + flags = phytium_pcie_readw(priv, fn, cap + PCI_MSI_FLAGS); + if (!(flags & PCI_MSI_FLAGS_ENABLE)) + return -EINVAL; + + mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4; + msi_count = 1 << mme; + if (!interrupt_num || interrupt_num > msi_count) + return -EINVAL; + + data_mask = msi_count - 1; + data = phytium_pcie_readw(priv, fn, cap + PCI_MSI_DATA_64); + data = (data & ~data_mask) | ((interrupt_num - 1) & data_mask); + + /* Get the PCI address */ + pci_addr = phytium_pcie_readl(priv, fn, cap + PCI_MSI_ADDRESS_HI); + pci_addr <<= 32; + pci_addr |= phytium_pcie_readl(priv, fn, cap + PCI_MSI_ADDRESS_LO); + pci_addr &= GENMASK_ULL(63, 2); + + if (priv->irq_pci_addr != (pci_addr & ~pci_addr_mask) || (priv->irq_pci_fn != fn)) { + /* First region for IRQ writes. */ + atr_size = fls64(pci_addr_mask) - 1; + src_addr0 = ATR_IMPL | ((atr_size & ATR_SIZE_MASK) << ATR_SIZE_SHIFT); + src_addr0 |= (lower_32_bits(priv->irq_phys_addr) & SRC_ADDR_32_12_MASK); + src_addr1 = upper_32_bits(priv->irq_phys_addr); + trsl_addr0 = (lower_32_bits(pci_addr) & TRSL_ADDR_32_12_MASK); + trsl_addr1 = upper_32_bits(pci_addr); + trsl_param = TRSL_ID_PCIE_TR; + + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_SLAVE0_SRC_ADDR0(0), + src_addr0); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_SLAVE0_SRC_ADDR1(0), + src_addr1); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_SLAVE0_TRSL_ADDR0(0), + trsl_addr0); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_SLAVE0_TRSL_ADDR1(0), + trsl_addr1); + phytium_pcie_writel(priv, fn, PHYTIUM_PCI_SLAVE0_TRSL_PARAM(0), + trsl_param); + priv->irq_pci_addr = (pci_addr & ~pci_addr_mask); + priv->irq_pci_fn = fn; + } + + dev_dbg(priv->epc->dev.parent, "send event %d\n", data); + writew(data, priv->irq_cpu_addr + (pci_addr & pci_addr_mask)); + + return 0; +} + +static int phytium_pcie_ep_raise_irq(struct pci_epc *epc, u8 fn, + enum pci_epc_irq_type type, + u16 interrupt_num) +{ + struct phytium_pcie_ep *priv = epc_get_drvdata(epc); + + switch (type) { + case PCI_EPC_IRQ_MSI: + return phytium_pcie_ep_send_msi_irq(priv, fn, interrupt_num); + + default: + break; + } + + return -EINVAL; +} + +static int phytium_pcie_ep_start(struct pci_epc *epc) +{ + struct pci_epf *epf; + u32 cfg; + + cfg = BIT(0); + list_for_each_entry(epf, &epc->pci_epf, list) + cfg |= BIT(epf->func_no); + + return 0; +} + +static const struct pci_epc_ops phytium_pcie_epc_ops = { + .write_header = phytium_pcie_ep_write_header, + .set_bar = phytium_pcie_ep_set_bar, + .clear_bar = phytium_pcie_ep_clear_bar, + .map_addr = phytium_pcie_ep_map_addr, + .unmap_addr = phytium_pcie_ep_unmap_addr, + .set_msi = phytium_pcie_ep_set_msi, + .get_msi = phytium_pcie_ep_get_msi, + .raise_irq = phytium_pcie_ep_raise_irq, + .start = phytium_pcie_ep_start, +}; + + + +static int phytium_pcie_ep_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct phytium_pcie_ep *priv = NULL; + struct resource *res; + struct device_node *np = dev->of_node; + struct pci_epc *epc; + int ret = 0, value; + + dev_dbg(dev, "enter %s\n", __func__); + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "reg"); + priv->reg_base = devm_ioremap_resource(dev, res); + if (IS_ERR(priv->reg_base)) { + dev_err(dev, "missing \"reg\"\n"); + return PTR_ERR(priv->reg_base); + } + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem"); + if (!res) { + dev_err(dev, "missing \"mem\"\n"); + return -EINVAL; + } + priv->mem_res = res; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hpb"); + priv->hpb_base = devm_ioremap_resource(dev, res); + if (IS_ERR(priv->hpb_base)) { + dev_err(dev, "missing \"hpb\"\n"); + return PTR_ERR(priv->hpb_base); + } + + ret = of_property_read_u32(np, "max-outbound-regions", &priv->max_regions); + if (ret < 0) { + dev_err(dev, "missing \"max-outbound-regions\"\n"); + return ret; + } + dev_info(dev, "%s max-outbound-regions %d\n", __func__, priv->max_regions); + + priv->ob_addr = devm_kcalloc(dev, priv->max_regions, + sizeof(*priv->ob_addr), GFP_KERNEL); + if (!priv->ob_addr) + return -ENOMEM; + + platform_set_drvdata(pdev, priv); + + epc = devm_pci_epc_create(dev, &phytium_pcie_epc_ops); + if (IS_ERR(epc)) { + dev_err(dev, "failed to create epc device\n"); + return PTR_ERR(epc); + } + + priv->epc = epc; + epc_set_drvdata(epc, priv); + + if (of_property_read_u8(np, "max-functions", &epc->max_functions) < 0) + epc->max_functions = 1; + dev_info(dev, "%s epc->max_functions %d\n", __func__, epc->max_functions); + + + ret = pci_epc_mem_init(epc, priv->mem_res->start, + resource_size(priv->mem_res), PAGE_SIZE); + if (ret < 0) { + dev_err(dev, "failed to initialize the memory space\n"); + return ret; + } + + priv->irq_cpu_addr = pci_epc_mem_alloc_addr(epc, &priv->irq_phys_addr, + SZ_4K); + if (!priv->irq_cpu_addr) { + dev_err(dev, "failed to reserve memory space for MSI\n"); + ret = -ENOMEM; + goto err_alloc_irq_mem; + } + priv->irq_pci_addr = PHYTIUM_PCIE_EP_IRQ_PCI_ADDR_NONE; + /* Reserve region 0 for IRQS */ + set_bit(0, &priv->ob_region_map); + + value = ((lower_32_bits(priv->mem_res->start) >> C0_PREF_VALUE_SHIFT) + & C0_PREF_BASE_MASK) << C0_PREF_BASE_SHIFT; + value |= (((lower_32_bits(priv->mem_res->end) >> C0_PREF_VALUE_SHIFT) + & C0_PREF_LIMIT_MASK) << C0_PREF_LIMIT_SHIFT); + phytium_hpb_writel(priv, PHYTIUM_HPB_C0_PREF_BASE_LIMIT, value); + + value = ((upper_32_bits(priv->mem_res->start) >> C0_PREF_UP32_VALUE_SHIFT) + & C0_PREF_BASE_UP32_MASK) << C0_PREF_BASE_UP32_SHIFT; + value |= (((upper_32_bits(priv->mem_res->end) >> C0_PREF_UP32_VALUE_SHIFT) + & C0_PREF_LIMIT_UP32_MASK) << C0_PREF_LIMIT_UP32_SHIFT); + phytium_hpb_writel(priv, PHYTIUM_HPB_C0_PREF_BASE_LIMIT_UP32, value); + + dev_dbg(dev, "exit %s successful\n", __func__); + return 0; + +err_alloc_irq_mem: + pci_epc_mem_exit(epc); + return ret; +} + +static int phytium_pcie_ep_remove(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct phytium_pcie_ep *priv = dev_get_drvdata(dev); + struct pci_epc *epc = priv->epc; + + pci_epc_mem_exit(epc); + + return 0; +} + +static const struct of_device_id phytium_pcie_ep_of_match[] = { + { .compatible = "phytium,pd2008-pcie-ep" }, + { }, +}; + +static struct platform_driver phytium_pcie_ep_driver = { + .driver = { + .name = "phytium-pcie-ep", + .of_match_table = phytium_pcie_ep_of_match, + }, + .probe = phytium_pcie_ep_probe, + .remove = phytium_pcie_ep_remove, +}; + +module_platform_driver(phytium_pcie_ep_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Yang Xun "); +MODULE_DESCRIPTION("Phytium Pcie Controller Endpoint driver"); diff --git a/drivers/pci/controller/pcie-phytium-ep.h b/drivers/pci/controller/pcie-phytium-ep.h new file mode 100644 index 0000000000..10b6a81da2 --- /dev/null +++ b/drivers/pci/controller/pcie-phytium-ep.h @@ -0,0 +1,95 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Phytium pd2008 pcie endpoint driver + * + * Copyright (c) 2021 Phytium Limited. + * + * Author: + * Yang Xun + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __PCIE_PHYTIUM_EP_H__ +#define __PCIE_PHYTIUM_EP_H__ + +#include "pcie-phytium-register.h" + +#define IRQ_MAPPING_SIZE 0x1000 +struct phytium_pcie_ep { + void __iomem *reg_base; + struct resource *mem_res; + void __iomem *hpb_base; + unsigned int max_regions; + unsigned long ob_region_map; + phys_addr_t *ob_addr; + phys_addr_t irq_phys_addr; + void __iomem *irq_cpu_addr; + unsigned long irq_pci_addr; + u8 irq_pci_fn; + struct pci_epc *epc; +}; + +static inline void +phytium_pcie_writeb(struct phytium_pcie_ep *priv, u8 fn, u32 reg, u8 value) +{ + pr_debug("Write 32'h%08lx 32'h%08x\n", PHYTIUM_PCIE_FUNC_BASE(fn) + reg, value); + writeb(value, priv->reg_base + PHYTIUM_PCIE_FUNC_BASE(fn) + reg); +} + +static inline unsigned char +phytium_pcie_readb(struct phytium_pcie_ep *priv, u8 fn, u32 reg) +{ + unsigned char value; + + value = readb(priv->reg_base + PHYTIUM_PCIE_FUNC_BASE(fn) + reg); + pr_debug("Read 32'h%08lx 32'h%08x\n", PHYTIUM_PCIE_FUNC_BASE(fn) + reg, value); + + return value; +} + +static inline void +phytium_pcie_writew(struct phytium_pcie_ep *priv, u8 fn, u32 reg, u16 value) +{ + pr_debug("Write 32'h%08lx 32'h%08x\n", PHYTIUM_PCIE_FUNC_BASE(fn) + reg, value); + writew(value, priv->reg_base + PHYTIUM_PCIE_FUNC_BASE(fn) + reg); +} + +static inline unsigned short +phytium_pcie_readw(struct phytium_pcie_ep *priv, u8 fn, u32 reg) +{ + unsigned short value; + + value = readw(priv->reg_base + PHYTIUM_PCIE_FUNC_BASE(fn) + reg); + pr_debug("Read 32'h%08lx 32'h%08x\n", PHYTIUM_PCIE_FUNC_BASE(fn) + reg, value); + + return value; +} + +static inline void +phytium_pcie_writel(struct phytium_pcie_ep *priv, u8 fn, u32 reg, u32 value) +{ + pr_debug("Write 32'h%08lx 32'h%08x\n", PHYTIUM_PCIE_FUNC_BASE(fn) + reg, value); + writel(value, priv->reg_base + PHYTIUM_PCIE_FUNC_BASE(fn) + reg); +} + +static inline unsigned int +phytium_pcie_readl(struct phytium_pcie_ep *priv, u8 fn, u32 reg) +{ + unsigned int value; + + value = readl(priv->reg_base + PHYTIUM_PCIE_FUNC_BASE(fn) + reg); + pr_debug("Read 32'h%08lx 32'h%08x\n", PHYTIUM_PCIE_FUNC_BASE(fn) + reg, value); + + return value; +} + +static inline void +phytium_hpb_writel(struct phytium_pcie_ep *priv, u32 reg, u32 value) +{ + pr_debug("Write 32'h%08x 32'h%08x\n", reg, value); + writel(value, priv->hpb_base + reg); +} +#endif diff --git a/drivers/pci/controller/pcie-phytium-register.h b/drivers/pci/controller/pcie-phytium-register.h new file mode 100644 index 0000000000..fb006bbf84 --- /dev/null +++ b/drivers/pci/controller/pcie-phytium-register.h @@ -0,0 +1,87 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Phytium Pd2008 pcie endpoint driver + * + * Copyright (c) 2021 Phytium Limited. + * + * Author: + * Yang Xun + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __PCIE_PHYTIUM_REGISTER_H__ +#define __PCIE_PHYTIUM_REGISTER_H__ + +#define PHYTIUM_PCIE_FUNC_BASE(fn) (((fn) << 14) & GENMASK(16, 14)) +#define PHYTIUM_PCI_VENDOR_ID 0x98 +#define PHYTIUM_PCI_DEVICE_ID 0x9a +#define PHYTIUM_PCI_REVISION_ID 0x9c +#define PHYTIUM_PCI_CLASS_PROG 0x9d +#define PHYTIUM_PCI_CLASS_DEVICE 0x9e +#define PHYTIUM_PCI_SUBSYS_VENDOR_ID 0xa0 +#define PHYTIUM_PCI_SUBSYS_DEVICE_ID 0xa2 +#define PHYTIUM_PCI_INTERRUPT_PIN 0xa8 +#define INTERRUPT_PIN_MASK 0x7 +#define MSI_DISABLE (1 << 3) +#define MSI_NUM_MASK (0x7) +#define MSI_NUM_SHIFT 4 +#define MSI_MASK_SUPPORT (1 << 7) +#define PHYTIUM_PCI_MSIX_CAP 0xaa + #define MSIX_DISABLE (0 << 15) + +#define PHYTIUM_PCI_BAR_0 0xe4 +#define PHYTIUM_PCI_BAR(bar_num) (0xe4 + bar_num * 4) +#define BAR_IO_TYPE (1 << 0) +#define BAR_MEM_TYPE (0 << 0) +#define BAR_MEM_64BIT (1 << 2) +#define BAR_MEM_PREFETCHABLE (1 << 3) +#define BAR_IO_MIN_APERTURE 4 +#define BAR_MEM_MIN_APERTURE 16 + + +#define PHYTIUM_PCI_WIN0_BASE 0x600 +#define PHYTIUM_PCI_WIN0_SRC_ADDR0(table) (PHYTIUM_PCI_WIN0_BASE + 0X20 * table + 0x0) +#define ATR_IMPL 0x1 +#define ATR_SIZE_MASK 0x3f +#define ATR_SIZE_SHIFT 1 +#define ATR_SIZE_ALIGN 0x1000 +#define SRC_ADDR_32_12_MASK 0xfffff000 + +#define PHYTIUM_PCI_WIN0_SRC_ADDR1(table) (PHYTIUM_PCI_WIN0_BASE + 0X20 * table + 0x4) +#define PHYTIUM_PCI_WIN0_TRSL_ADDR0(table) (PHYTIUM_PCI_WIN0_BASE + 0X20 * table + 0x8) +#define TRSL_ADDR_32_12_MASK 0xfffff000 + +#define PHYTIUM_PCI_WIN0_TRSL_ADDR1(table) (PHYTIUM_PCI_WIN0_BASE + 0X20 * table + 0xc) +#define PHYTIUM_PCI_WIN0_TRSL_PARAM(table) (PHYTIUM_PCI_WIN0_BASE + 0X20 * table + 0x10) +#define TRSL_ID_IO 0x1 +#define TRSL_ID_MASTER 0x4 +#define TRSL_ID_PCIE_TR 0x0 + +#define PHYTIUM_PCI_SLAVE0_BASE 0x800 +#define PHYTIUM_PCI_SLAVE0_SRC_ADDR0(table) (PHYTIUM_PCI_SLAVE0_BASE + 0X20 * table + 0x0) +#define PHYTIUM_PCI_SLAVE0_SRC_ADDR1(table) (PHYTIUM_PCI_SLAVE0_BASE + 0X20 * table + 0x4) +#define PHYTIUM_PCI_SLAVE0_TRSL_ADDR0(table) (PHYTIUM_PCI_SLAVE0_BASE + 0X20 * table + 0x8) +#define PHYTIUM_PCI_SLAVE0_TRSL_ADDR1(table) (PHYTIUM_PCI_SLAVE0_BASE + 0X20 * table + 0xc) +#define PHYTIUM_PCI_SLAVE0_TRSL_PARAM(table) (PHYTIUM_PCI_SLAVE0_BASE + 0X20 * table + 0x10) + +#define PHYTIUM_PCI_CF_MSI_BASE 0x10e0 +#define PHYTIUM_PCI_CF_MSI_CONTROL 0x10e2 + +#define PHYTIUM_HPB_C0_PREF_BASE_LIMIT 0xa30 + #define C0_PREF_LIMIT_MASK 0xfff + #define C0_PREF_LIMIT_SHIFT 20 + #define C0_PREF_BASE_MASK 0xfff + #define C0_PREF_BASE_SHIFT 4 + #define C0_PREF_VALUE_SHIFT 20 +#define PHYTIUM_HPB_C0_PREF_BASE_LIMIT_UP32 0xa34 + #define C0_PREF_LIMIT_UP32_MASK 0xff + #define C0_PREF_LIMIT_UP32_SHIFT 8 + #define C0_PREF_BASE_UP32_MASK 0xff + #define C0_PREF_BASE_UP32_SHIFT 0 + #define C0_PREF_UP32_VALUE_SHIFT 0 +#endif + + diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 3da69b26e6..f266eaa991 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -624,11 +624,11 @@ static int msi_verify_entries(struct pci_dev *dev) struct msi_desc *entry; for_each_pci_msi_entry(entry, dev) { - if (!dev->no_64bit_msi || !entry->msg.address_hi) - continue; - pci_err(dev, "Device has broken 64-bit MSI but arch" - " tried to assign one above 4G\n"); + if (entry->msg.address_hi && dev->no_64bit_msi) { + pci_err(dev, "arch assigned 64-bit MSI address %#x%08x but device only supports 32 bits\n", + entry->msg.address_hi, entry->msg.address_lo); return -EIO; + } } return 0; } diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index ece90a2393..616fe70fa2 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -1718,6 +1718,8 @@ static u8 pci_hdr_type(struct pci_dev *dev) static void pci_msi_setup_pci_dev(struct pci_dev *dev) { + u16 ctrl; + /* * Disable the MSI hardware to avoid screaming interrupts * during boot. This is the power on reset default so @@ -1727,6 +1729,10 @@ static void pci_msi_setup_pci_dev(struct pci_dev *dev) if (dev->msi_cap) pci_msi_set_enable(dev, 0); + pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &ctrl); + if (!(ctrl & PCI_MSI_FLAGS_64BIT)) + dev->no_64bit_msi = 1; + dev->msix_cap = pci_find_capability(dev, PCI_CAP_ID_MSIX); if (dev->msix_cap) pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0); diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 2ce636937c..a72beccbc1 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -579,6 +579,9 @@ static void pci_setup_bridge_io(struct pci_dev *bridge) u8 io_base_lo, io_limit_lo; u16 l; u32 io_upper16; +#ifdef CONFIG_ARCH_PHYTIUM + u32 io_base_limit = 0; +#endif io_mask = PCI_IO_RANGE_MASK; if (bridge->io_window_1k) @@ -606,6 +609,19 @@ static void pci_setup_bridge_io(struct pci_dev *bridge) pci_write_config_word(bridge, PCI_IO_BASE, l); /* Update upper 16 bits of I/O base/limit */ pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_upper16); + +#ifdef CONFIG_ARCH_PHYTIUM + if (bridge->dev.parent) { + if (!fwnode_property_read_u32(dev_fwnode(bridge->dev.parent), + "io-upper", &io_base_limit)) + pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_base_limit); + } + if (bridge->dev.parent->parent) { + if (!fwnode_property_read_u32(dev_fwnode(bridge->dev.parent->parent), + "io-upper", &io_base_limit)) + pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_base_limit); + } +#endif } static void pci_setup_bridge_mmio(struct pci_dev *bridge) diff --git a/drivers/usb/phytium/host.c b/drivers/usb/phytium/host.c index 00d9724876..1be7c1a630 100644 --- a/drivers/usb/phytium/host.c +++ b/drivers/usb/phytium/host.c @@ -778,6 +778,38 @@ static void hostStartReq(struct HOST_CTRL *priv, struct HOST_REQ *req) } } +static void abortTransfer(struct HOST_CTRL *priv, + struct HOST_REQ *usbReq, struct HostEp *hwEp) +{ + struct HOST_EP *usbEp; + struct HOST_EP_PRIV *usbHEpPriv; + uint32_t status; + + if (!priv || !usbReq || !hwEp || !hwEp->scheduledUsbHEp) + return; + + usbEp = hwEp->scheduledUsbHEp; + usbHEpPriv = (struct HOST_EP_PRIV *)usbEp->hcPriv; + if (!usbHEpPriv) + return; + + status = (usbReq->status == EINPROGRESS) ? 0 : usbReq->status; + givebackRequest(priv, usbReq, status); + + if (list_empty(&usbEp->reqList)) { + usbHEpPriv->epIsReady = 0; + usbHEpPriv->currentHwEp = NULL; + hwEp->scheduledUsbHEp = NULL; + + if (hwEp->channel) { + priv->dmaDrv->dma_channelRelease(priv->dmaController, hwEp->channel); + hwEp->channel = NULL; + } + + if (usb_endpoint_xfer_int(&usbEp->desc)) + list_del(&usbHEpPriv->node); + } +} static void scheduleNextTransfer(struct HOST_CTRL *priv, struct HOST_REQ *usbReq, struct HostEp *hwEp) @@ -1917,8 +1949,7 @@ int32_t hostEpDisable(struct HOST_CTRL *priv, struct HOST_EP *ep) return 0; } -unsigned int get_endpoint_interval(struct usb_endpoint_descriptor desc, - int speed) +unsigned int get_endpoint_interval(struct usb_endpoint_descriptor desc, int speed) { unsigned int interval = 0; @@ -1932,7 +1963,7 @@ unsigned int get_endpoint_interval(struct usb_endpoint_descriptor desc, interval = 1 << interval; if (interval != desc.bInterval) pr_debug("rounding to %d microframes, desc %d microframes\n", - interval, desc.bInterval); + interval, desc.bInterval); break; } @@ -1941,16 +1972,15 @@ unsigned int get_endpoint_interval(struct usb_endpoint_descriptor desc, interval = 1 << interval; if (interval != desc.bInterval - 1) pr_debug("rounding to %d %sframes\n", interval, - speed == USB_SPEED_FULL ? "" : "micro"); + speed == USB_SPEED_FULL ? "" : "micro"); } break; case USB_SPEED_FULL: if (usb_endpoint_xfer_isoc(&desc)) { - interval = clamp_val(desc.bInterval, 1, 16) - 1; - if (interval != desc.bInterval - 1) + interval = clamp_val(desc.bInterval, 1, 16); + if (interval != desc.bInterval) pr_debug("rounding to %d %sframes\n", 1 << interval, - speed == USB_SPEED_FULL ? "" : "micro"); - interval += 3; + speed == USB_SPEED_FULL ? "" : "micro"); break; } /* fall through */ @@ -1960,7 +1990,7 @@ unsigned int get_endpoint_interval(struct usb_endpoint_descriptor desc, interval = clamp_val(interval, 3, 10); if ((1 << interval) != desc.bInterval * 8) pr_debug("rounding to %d microframes, desc %d microframes\n", - 1 << interval, desc.bInterval); + 1 << interval, desc.bInterval); } } @@ -2053,8 +2083,6 @@ static int abortActuallyUsbRequest(struct HOST_CTRL *priv, { struct HOST_EP_PRIV *usbEpPriv; struct HostEp *hostEp; - uint16_t rxerrien = 0; - uint16_t txerrien = 0; uint8_t rxcon, txcon; if (!priv || !req || !usbEp) @@ -2064,31 +2092,20 @@ static int abortActuallyUsbRequest(struct HOST_CTRL *priv, hostEp = usbEpPriv->currentHwEp; usbEpPriv->transferFinished = 1; - if (hostEp->isInEp) { if (hostEp->hwEpNum) { rxcon = phytium_read8(&priv->regs->ep[hostEp->hwEpNum - 1].rxcon); rxcon = rxcon & (~BIT(7)); phytium_write8(&priv->regs->ep[hostEp->hwEpNum - 1].rxcon, rxcon); } - rxerrien = phytium_read16(&priv->regs->rxerrien); - rxerrien &= ~(1 << hostEp->hwEpNum); - phytium_write16(&priv->regs->rxerrien, rxerrien); - phytium_write8(&priv->regs->endprst, ENDPRST_FIFORST | - ENDPRST_IO_TX | hostEp->hwEpNum); } else { if (hostEp->hwEpNum) { txcon = phytium_read8(&priv->regs->ep[hostEp->hwEpNum - 1].txcon); txcon = txcon & (~BIT(7)); phytium_write8(&priv->regs->ep[hostEp->hwEpNum - 1].txcon, txcon); } - txerrien = phytium_read16(&priv->regs->txerrien); - txerrien &= ~(1 << hostEp->hwEpNum); - phytium_write16(&priv->regs->txerrien, txerrien); - phytium_write8(&priv->regs->endprst, ENDPRST_FIFORST | hostEp->hwEpNum); } - - scheduleNextTransfer(priv, req, hostEp); + abortTransfer(priv, req, hostEp); return 0; } -- Gitee